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79 lines
2.3 KiB
79 lines
2.3 KiB
# SPDX-License-Identifier: GPL-2.0 |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/pinctrl/fsl,imx8ulp-pinctrl.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Freescale IMX8ULP IOMUX Controller |
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maintainers: |
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- Jacky Bai <[email protected]> |
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description: |
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Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory |
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for common binding part and usage. |
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properties: |
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compatible: |
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const: fsl,imx8ulp-iomuxc1 |
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reg: |
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maxItems: 1 |
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# Client device subnode's properties |
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patternProperties: |
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'grp$': |
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type: object |
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description: |
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Pinctrl node's client devices use subnodes for desired pin configuration. |
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Client device subnodes use below standard properties. |
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properties: |
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fsl,pins: |
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description: |
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each entry consists of 5 integers and represents the mux and config |
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setting for one pin. The first 4 integers <mux_config_reg input_reg |
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mux_mode input_val> are specified using a PIN_FUNC_ID macro, which can |
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be found in <arch/arm64/boot/dts/freescale/imx8ulp-pinfunc.h>. The last |
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integer CONFIG is the pad setting value like pull-up on this pin. Please |
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refer to i.MX8ULP Reference Manual for detailed CONFIG settings. |
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$ref: /schemas/types.yaml#/definitions/uint32-matrix |
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items: |
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items: |
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- description: | |
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"mux_config_reg" indicates the offset of mux register. |
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- description: | |
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"input_reg" indicates the offset of select input register. |
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- description: | |
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"mux_mode" indicates the mux value to be applied. |
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- description: | |
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"input_val" indicates the select input value to be applied. |
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- description: | |
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"pad_setting" indicates the pad configuration value to be applied. |
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required: |
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- fsl,pins |
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additionalProperties: false |
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required: |
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- compatible |
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- reg |
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additionalProperties: false |
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examples: |
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# Pinmux controller node |
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- | |
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iomuxc: pinctrl@298c0000 { |
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compatible = "fsl,imx8ulp-iomuxc1"; |
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reg = <0x298c0000 0x10000>; |
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pinctrl_lpuart5: lpuart5grp { |
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fsl,pins = |
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<0x0138 0x08F0 0x4 0x3 0x3>, |
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<0x013C 0x08EC 0x4 0x3 0x3>; |
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}; |
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}; |
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...
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