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167 lines
4.7 KiB
167 lines
4.7 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/net/can/fsl,flexcan.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: |
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Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC). |
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maintainers: |
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- Marc Kleine-Budde <[email protected]> |
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allOf: |
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- $ref: can-controller.yaml# |
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properties: |
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compatible: |
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oneOf: |
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- enum: |
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- fsl,imx8qm-flexcan |
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- fsl,imx8mp-flexcan |
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- fsl,imx6q-flexcan |
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- fsl,imx28-flexcan |
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- fsl,imx25-flexcan |
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- fsl,p1010-flexcan |
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- fsl,vf610-flexcan |
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- fsl,ls1021ar2-flexcan |
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- fsl,lx2160ar1-flexcan |
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- items: |
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- enum: |
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- fsl,imx53-flexcan |
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- fsl,imx35-flexcan |
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- const: fsl,imx25-flexcan |
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- items: |
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- enum: |
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- fsl,imx7d-flexcan |
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- fsl,imx6ul-flexcan |
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- fsl,imx6sx-flexcan |
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- const: fsl,imx6q-flexcan |
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- items: |
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- enum: |
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- fsl,ls1028ar1-flexcan |
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- const: fsl,lx2160ar1-flexcan |
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reg: |
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maxItems: 1 |
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interrupts: |
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maxItems: 1 |
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clocks: |
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maxItems: 2 |
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clock-names: |
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items: |
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- const: ipg |
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- const: per |
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clock-frequency: |
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description: | |
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The oscillator frequency driving the flexcan device, filled in by the |
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boot loader. This property should only be used the used operating system |
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doesn't support the clocks and clock-names property. |
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xceiver-supply: |
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description: Regulator that powers the CAN transceiver. |
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big-endian: |
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$ref: /schemas/types.yaml#/definitions/flag |
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description: | |
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This means the registers of FlexCAN controller are big endian. This is |
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optional property.i.e. if this property is not present in device tree |
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node then controller is assumed to be little endian. If this property is |
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present then controller is assumed to be big endian. |
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fsl,stop-mode: |
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description: | |
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Register bits of stop mode control. |
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The format should be as follows: |
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<gpr req_gpr req_bit> |
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gpr is the phandle to general purpose register node. |
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req_gpr is the gpr register offset of CAN stop request. |
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req_bit is the bit offset of CAN stop request. |
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$ref: /schemas/types.yaml#/definitions/phandle-array |
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items: |
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items: |
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- description: The 'gpr' is the phandle to general purpose register node. |
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- description: The 'req_gpr' is the gpr register offset of CAN stop request. |
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maximum: 0xff |
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- description: The 'req_bit' is the bit offset of CAN stop request. |
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maximum: 0x1f |
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fsl,clk-source: |
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description: | |
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Select the clock source to the CAN Protocol Engine (PE). It's SoC |
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implementation dependent. Refer to RM for detailed definition. If this |
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property is not set in device tree node then driver selects clock source 1 |
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by default. |
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0: clock source 0 (oscillator clock) |
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1: clock source 1 (peripheral clock) |
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$ref: /schemas/types.yaml#/definitions/uint8 |
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default: 1 |
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minimum: 0 |
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maximum: 1 |
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wakeup-source: |
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$ref: /schemas/types.yaml#/definitions/flag |
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description: |
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Enable CAN remote wakeup. |
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fsl,scu-index: |
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description: | |
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The scu index of CAN instance. |
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For SoCs with SCU support, need setup stop mode via SCU firmware, so this |
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property can help indicate a resource. It supports up to 3 CAN instances |
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now. |
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$ref: /schemas/types.yaml#/definitions/uint8 |
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minimum: 0 |
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maximum: 2 |
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termination-gpios: true |
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termination-ohms: true |
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required: |
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- compatible |
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- reg |
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- interrupts |
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additionalProperties: false |
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examples: |
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- | |
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can@1c000 { |
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compatible = "fsl,p1010-flexcan"; |
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reg = <0x1c000 0x1000>; |
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interrupts = <48 0x2>; |
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interrupt-parent = <&mpic>; |
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clock-frequency = <200000000>; |
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fsl,clk-source = /bits/ 8 <0>; |
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}; |
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- | |
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#include <dt-bindings/interrupt-controller/irq.h> |
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can@2090000 { |
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compatible = "fsl,imx6q-flexcan"; |
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reg = <0x02090000 0x4000>; |
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interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&clks 1>, <&clks 2>; |
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clock-names = "ipg", "per"; |
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fsl,stop-mode = <&gpr 0x34 28>; |
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fsl,scu-index = /bits/ 8 <1>; |
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}; |
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- | |
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#include <dt-bindings/interrupt-controller/irq.h> |
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#include <dt-bindings/gpio/gpio.h> |
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can@2090000 { |
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compatible = "fsl,imx6q-flexcan"; |
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reg = <0x02090000 0x4000>; |
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interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&clks 1>, <&clks 2>; |
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clock-names = "ipg", "per"; |
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fsl,stop-mode = <&gpr 0x34 28>; |
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termination-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; |
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termination-ohms = <120>; |
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};
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