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145 lines
3.4 KiB
145 lines
3.4 KiB
# SPDX-License-Identifier: GPL-2.0-only |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Synopsys DesignWare APB I2C Controller |
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maintainers: |
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- Jarkko Nikula <[email protected]> |
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allOf: |
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- $ref: /schemas/i2c/i2c-controller.yaml# |
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- if: |
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properties: |
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compatible: |
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not: |
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contains: |
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const: mscc,ocelot-i2c |
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then: |
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properties: |
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reg: |
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maxItems: 1 |
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properties: |
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compatible: |
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oneOf: |
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- description: Generic Synopsys DesignWare I2C controller |
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const: snps,designware-i2c |
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- description: Microsemi Ocelot SoCs I2C controller |
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items: |
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- const: mscc,ocelot-i2c |
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- const: snps,designware-i2c |
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- description: Baikal-T1 SoC System I2C controller |
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const: baikal,bt1-sys-i2c |
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reg: |
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minItems: 1 |
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items: |
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- description: DW APB I2C controller memory mapped registers |
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- description: | |
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ICPU_CFG:TWI_DELAY registers to setup the SDA hold time. |
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This registers are specific to the Ocelot I2C-controller. |
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interrupts: |
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maxItems: 1 |
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clocks: |
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minItems: 1 |
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items: |
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- description: I2C controller reference clock source |
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- description: APB interface clock source |
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clock-names: |
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minItems: 1 |
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items: |
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- const: ref |
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- const: pclk |
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resets: |
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maxItems: 1 |
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clock-frequency: |
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description: Desired I2C bus clock frequency in Hz |
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enum: [100000, 400000, 1000000, 3400000] |
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default: 400000 |
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i2c-sda-hold-time-ns: |
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description: | |
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The property should contain the SDA hold time in nanoseconds. This option |
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is only supported in hardware blocks version 1.11a or newer or on |
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Microsemi SoCs. |
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i2c-scl-falling-time-ns: |
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description: | |
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The property should contain the SCL falling time in nanoseconds. |
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This value is used to compute the tLOW period. |
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default: 300 |
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i2c-sda-falling-time-ns: |
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description: | |
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The property should contain the SDA falling time in nanoseconds. |
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This value is used to compute the tHIGH period. |
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default: 300 |
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dmas: |
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items: |
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- description: TX DMA Channel |
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- description: RX DMA Channel |
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dma-names: |
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items: |
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- const: tx |
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- const: rx |
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unevaluatedProperties: false |
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required: |
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- compatible |
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- reg |
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- interrupts |
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examples: |
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- | |
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i2c@f0000 { |
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compatible = "snps,designware-i2c"; |
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reg = <0xf0000 0x1000>; |
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interrupts = <11>; |
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clock-frequency = <400000>; |
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}; |
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- | |
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i2c@1120000 { |
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compatible = "snps,designware-i2c"; |
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reg = <0x1120000 0x1000>; |
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interrupts = <12 1>; |
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clock-frequency = <400000>; |
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i2c-sda-hold-time-ns = <300>; |
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i2c-sda-falling-time-ns = <300>; |
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i2c-scl-falling-time-ns = <300>; |
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}; |
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- | |
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i2c@2000 { |
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compatible = "snps,designware-i2c"; |
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reg = <0x2000 0x100>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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clock-frequency = <400000>; |
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clocks = <&i2cclk>; |
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interrupts = <0>; |
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eeprom@64 { |
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compatible = "atmel,24c02"; |
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reg = <0x64>; |
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}; |
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}; |
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- | |
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i2c@100400 { |
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compatible = "mscc,ocelot-i2c", "snps,designware-i2c"; |
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reg = <0x100400 0x100>, <0x198 0x8>; |
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pinctrl-0 = <&i2c_pins>; |
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pinctrl-names = "default"; |
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interrupts = <8>; |
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clocks = <&ahb_clk>; |
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}; |
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...
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