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61 lines
1.3 KiB
61 lines
1.3 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/arm/hisilicon/low-pin-count.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Hisilicon HiP06 Low Pin Count device |
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maintainers: |
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- Wei Xu <[email protected]> |
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description: | |
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Hisilicon HiP06 SoCs implement a Low Pin Count (LPC) controller, which |
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provides I/O access to some legacy ISA devices. |
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HiP06 is based on arm64 architecture where there is no I/O space. So, the |
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I/O ports here are not CPU addresses, and there is no 'ranges' property in |
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LPC device node. |
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properties: |
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$nodename: |
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pattern: '^isa@[0-9a-f]+$' |
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description: | |
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The node name before '@' must be "isa" to represent the binding stick |
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to the ISA/EISA binding specification. |
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compatible: |
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enum: |
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- hisilicon,hip06-lpc |
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- hisilicon,hip07-lpc |
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reg: |
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maxItems: 1 |
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'#address-cells': |
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const: 2 |
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'#size-cells': |
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const: 1 |
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required: |
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- compatible |
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- reg |
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additionalProperties: |
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type: object |
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examples: |
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- | |
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isa@a01b0000 { |
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compatible = "hisilicon,hip06-lpc"; |
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#address-cells = <2>; |
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#size-cells = <1>; |
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reg = <0xa01b0000 0x1000>; |
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ipmi0: bt@e4 { |
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compatible = "ipmi-bt"; |
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device_type = "ipmi"; |
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reg = <0x01 0xe4 0x04>; |
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}; |
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}; |
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...
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