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533 lines
14 KiB
533 lines
14 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Intel_SCU 0.2: An Intel SCU IOH Based Watchdog Device |
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* for Intel part #(s): |
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* - AF82MP20 PCH |
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* |
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* Copyright (C) 2009-2010 Intel Corporation. All rights reserved. |
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*/ |
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
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#include <linux/compiler.h> |
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#include <linux/kernel.h> |
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#include <linux/moduleparam.h> |
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#include <linux/types.h> |
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#include <linux/miscdevice.h> |
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#include <linux/watchdog.h> |
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#include <linux/fs.h> |
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#include <linux/notifier.h> |
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#include <linux/reboot.h> |
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#include <linux/init.h> |
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#include <linux/jiffies.h> |
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#include <linux/uaccess.h> |
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#include <linux/slab.h> |
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#include <linux/io.h> |
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#include <linux/interrupt.h> |
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#include <linux/delay.h> |
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#include <linux/sched.h> |
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#include <linux/signal.h> |
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#include <linux/sfi.h> |
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#include <asm/irq.h> |
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#include <linux/atomic.h> |
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#include <asm/intel_scu_ipc.h> |
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#include <asm/apb_timer.h> |
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#include <asm/intel-mid.h> |
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#include "intel_scu_watchdog.h" |
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/* Bounds number of times we will retry loading time count */ |
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/* This retry is a work around for a silicon bug. */ |
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#define MAX_RETRY 16 |
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#define IPC_SET_WATCHDOG_TIMER 0xF8 |
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static int timer_margin = DEFAULT_SOFT_TO_HARD_MARGIN; |
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module_param(timer_margin, int, 0); |
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MODULE_PARM_DESC(timer_margin, |
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"Watchdog timer margin" |
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"Time between interrupt and resetting the system" |
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"The range is from 1 to 160" |
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"This is the time for all keep alives to arrive"); |
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static int timer_set = DEFAULT_TIME; |
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module_param(timer_set, int, 0); |
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MODULE_PARM_DESC(timer_set, |
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"Default Watchdog timer setting" |
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"Complete cycle time" |
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"The range is from 1 to 170" |
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"This is the time for all keep alives to arrive"); |
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/* After watchdog device is closed, check force_boot. If: |
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* force_boot == 0, then force boot on next watchdog interrupt after close, |
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* force_boot == 1, then force boot immediately when device is closed. |
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*/ |
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static int force_boot; |
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module_param(force_boot, int, 0); |
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MODULE_PARM_DESC(force_boot, |
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"A value of 1 means that the driver will reboot" |
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"the system immediately if the /dev/watchdog device is closed" |
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"A value of 0 means that when /dev/watchdog device is closed" |
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"the watchdog timer will be refreshed for one more interval" |
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"of length: timer_set. At the end of this interval, the" |
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"watchdog timer will reset the system." |
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); |
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/* there is only one device in the system now; this can be made into |
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* an array in the future if we have more than one device */ |
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static struct intel_scu_watchdog_dev watchdog_device; |
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/* Forces restart, if force_reboot is set */ |
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static void watchdog_fire(void) |
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{ |
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if (force_boot) { |
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pr_crit("Initiating system reboot\n"); |
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emergency_restart(); |
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pr_crit("Reboot didn't ?????\n"); |
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} |
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else { |
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pr_crit("Immediate Reboot Disabled\n"); |
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pr_crit("System will reset when watchdog timer times out!\n"); |
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} |
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} |
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static int check_timer_margin(int new_margin) |
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{ |
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if ((new_margin < MIN_TIME_CYCLE) || |
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(new_margin > MAX_TIME - timer_set)) { |
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pr_debug("value of new_margin %d is out of the range %d to %d\n", |
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new_margin, MIN_TIME_CYCLE, MAX_TIME - timer_set); |
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return -EINVAL; |
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} |
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return 0; |
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} |
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/* |
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* IPC operations |
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*/ |
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static int watchdog_set_ipc(int soft_threshold, int threshold) |
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{ |
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u32 *ipc_wbuf; |
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u8 cbuf[16] = { '\0' }; |
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int ipc_ret = 0; |
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ipc_wbuf = (u32 *)&cbuf; |
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ipc_wbuf[0] = soft_threshold; |
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ipc_wbuf[1] = threshold; |
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ipc_ret = intel_scu_ipc_command( |
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IPC_SET_WATCHDOG_TIMER, |
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0, |
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ipc_wbuf, |
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2, |
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NULL, |
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0); |
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if (ipc_ret != 0) |
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pr_err("Error setting SCU watchdog timer: %x\n", ipc_ret); |
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return ipc_ret; |
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}; |
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/* |
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* Intel_SCU operations |
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*/ |
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/* timer interrupt handler */ |
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static irqreturn_t watchdog_timer_interrupt(int irq, void *dev_id) |
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{ |
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int int_status; |
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int_status = ioread32(watchdog_device.timer_interrupt_status_addr); |
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pr_debug("irq, int_status: %x\n", int_status); |
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if (int_status != 0) |
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return IRQ_NONE; |
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/* has the timer been started? If not, then this is spurious */ |
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if (watchdog_device.timer_started == 0) { |
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pr_debug("spurious interrupt received\n"); |
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return IRQ_HANDLED; |
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} |
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/* temporarily disable the timer */ |
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iowrite32(0x00000002, watchdog_device.timer_control_addr); |
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/* set the timer to the threshold */ |
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iowrite32(watchdog_device.threshold, |
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watchdog_device.timer_load_count_addr); |
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/* allow the timer to run */ |
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iowrite32(0x00000003, watchdog_device.timer_control_addr); |
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return IRQ_HANDLED; |
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} |
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static int intel_scu_keepalive(void) |
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{ |
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/* read eoi register - clears interrupt */ |
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ioread32(watchdog_device.timer_clear_interrupt_addr); |
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/* temporarily disable the timer */ |
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iowrite32(0x00000002, watchdog_device.timer_control_addr); |
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/* set the timer to the soft_threshold */ |
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iowrite32(watchdog_device.soft_threshold, |
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watchdog_device.timer_load_count_addr); |
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/* allow the timer to run */ |
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iowrite32(0x00000003, watchdog_device.timer_control_addr); |
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return 0; |
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} |
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static int intel_scu_stop(void) |
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{ |
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iowrite32(0, watchdog_device.timer_control_addr); |
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return 0; |
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} |
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static int intel_scu_set_heartbeat(u32 t) |
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{ |
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int ipc_ret; |
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int retry_count; |
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u32 soft_value; |
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u32 hw_value; |
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watchdog_device.timer_set = t; |
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watchdog_device.threshold = |
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timer_margin * watchdog_device.timer_tbl_ptr->freq_hz; |
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watchdog_device.soft_threshold = |
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(watchdog_device.timer_set - timer_margin) |
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* watchdog_device.timer_tbl_ptr->freq_hz; |
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pr_debug("set_heartbeat: timer freq is %d\n", |
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watchdog_device.timer_tbl_ptr->freq_hz); |
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pr_debug("set_heartbeat: timer_set is %x (hex)\n", |
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watchdog_device.timer_set); |
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pr_debug("set_heartbeat: timer_margin is %x (hex)\n", timer_margin); |
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pr_debug("set_heartbeat: threshold is %x (hex)\n", |
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watchdog_device.threshold); |
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pr_debug("set_heartbeat: soft_threshold is %x (hex)\n", |
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watchdog_device.soft_threshold); |
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/* Adjust thresholds by FREQ_ADJUSTMENT factor, to make the */ |
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/* watchdog timing come out right. */ |
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watchdog_device.threshold = |
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watchdog_device.threshold / FREQ_ADJUSTMENT; |
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watchdog_device.soft_threshold = |
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watchdog_device.soft_threshold / FREQ_ADJUSTMENT; |
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/* temporarily disable the timer */ |
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iowrite32(0x00000002, watchdog_device.timer_control_addr); |
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/* send the threshold and soft_threshold via IPC to the processor */ |
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ipc_ret = watchdog_set_ipc(watchdog_device.soft_threshold, |
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watchdog_device.threshold); |
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if (ipc_ret != 0) { |
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/* Make sure the watchdog timer is stopped */ |
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intel_scu_stop(); |
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return ipc_ret; |
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} |
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/* Soft Threshold set loop. Early versions of silicon did */ |
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/* not always set this count correctly. This loop checks */ |
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/* the value and retries if it was not set correctly. */ |
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retry_count = 0; |
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soft_value = watchdog_device.soft_threshold & 0xFFFF0000; |
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do { |
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/* Make sure timer is stopped */ |
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intel_scu_stop(); |
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if (MAX_RETRY < retry_count++) { |
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/* Unable to set timer value */ |
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pr_err("Unable to set timer\n"); |
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return -ENODEV; |
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} |
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/* set the timer to the soft threshold */ |
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iowrite32(watchdog_device.soft_threshold, |
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watchdog_device.timer_load_count_addr); |
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/* read count value before starting timer */ |
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ioread32(watchdog_device.timer_load_count_addr); |
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/* Start the timer */ |
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iowrite32(0x00000003, watchdog_device.timer_control_addr); |
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/* read the value the time loaded into its count reg */ |
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hw_value = ioread32(watchdog_device.timer_load_count_addr); |
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hw_value = hw_value & 0xFFFF0000; |
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} while (soft_value != hw_value); |
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watchdog_device.timer_started = 1; |
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return 0; |
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} |
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/* |
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* /dev/watchdog handling |
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*/ |
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static int intel_scu_open(struct inode *inode, struct file *file) |
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{ |
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/* Set flag to indicate that watchdog device is open */ |
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if (test_and_set_bit(0, &watchdog_device.driver_open)) |
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return -EBUSY; |
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/* Check for reopen of driver. Reopens are not allowed */ |
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if (watchdog_device.driver_closed) |
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return -EPERM; |
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return stream_open(inode, file); |
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} |
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static int intel_scu_release(struct inode *inode, struct file *file) |
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{ |
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/* |
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* This watchdog should not be closed, after the timer |
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* is started with the WDIPC_SETTIMEOUT ioctl |
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* If force_boot is set watchdog_fire() will cause an |
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* immediate reset. If force_boot is not set, the watchdog |
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* timer is refreshed for one more interval. At the end |
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* of that interval, the watchdog timer will reset the system. |
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*/ |
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if (!test_and_clear_bit(0, &watchdog_device.driver_open)) { |
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pr_debug("intel_scu_release, without open\n"); |
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return -ENOTTY; |
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} |
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if (!watchdog_device.timer_started) { |
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/* Just close, since timer has not been started */ |
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pr_debug("closed, without starting timer\n"); |
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return 0; |
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} |
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pr_crit("Unexpected close of /dev/watchdog!\n"); |
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/* Since the timer was started, prevent future reopens */ |
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watchdog_device.driver_closed = 1; |
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/* Refresh the timer for one more interval */ |
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intel_scu_keepalive(); |
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/* Reboot system (if force_boot is set) */ |
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watchdog_fire(); |
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/* We should only reach this point if force_boot is not set */ |
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return 0; |
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} |
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static ssize_t intel_scu_write(struct file *file, |
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char const *data, |
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size_t len, |
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loff_t *ppos) |
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{ |
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if (watchdog_device.timer_started) |
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/* Watchdog already started, keep it alive */ |
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intel_scu_keepalive(); |
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else |
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/* Start watchdog with timer value set by init */ |
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intel_scu_set_heartbeat(watchdog_device.timer_set); |
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return len; |
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} |
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static long intel_scu_ioctl(struct file *file, |
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unsigned int cmd, |
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unsigned long arg) |
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{ |
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void __user *argp = (void __user *)arg; |
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u32 __user *p = argp; |
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u32 new_margin; |
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static const struct watchdog_info ident = { |
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.options = WDIOF_SETTIMEOUT |
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| WDIOF_KEEPALIVEPING, |
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.firmware_version = 0, /* @todo Get from SCU via |
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ipc_get_scu_fw_version()? */ |
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.identity = "Intel_SCU IOH Watchdog" /* len < 32 */ |
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}; |
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switch (cmd) { |
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case WDIOC_GETSUPPORT: |
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return copy_to_user(argp, |
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&ident, |
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sizeof(ident)) ? -EFAULT : 0; |
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case WDIOC_GETSTATUS: |
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case WDIOC_GETBOOTSTATUS: |
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return put_user(0, p); |
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case WDIOC_KEEPALIVE: |
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intel_scu_keepalive(); |
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return 0; |
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case WDIOC_SETTIMEOUT: |
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if (get_user(new_margin, p)) |
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return -EFAULT; |
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if (check_timer_margin(new_margin)) |
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return -EINVAL; |
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if (intel_scu_set_heartbeat(new_margin)) |
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return -EINVAL; |
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return 0; |
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case WDIOC_GETTIMEOUT: |
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return put_user(watchdog_device.soft_threshold, p); |
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default: |
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return -ENOTTY; |
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} |
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} |
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/* |
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* Notifier for system down |
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*/ |
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static int intel_scu_notify_sys(struct notifier_block *this, |
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unsigned long code, |
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void *another_unused) |
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{ |
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if (code == SYS_DOWN || code == SYS_HALT) |
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/* Turn off the watchdog timer. */ |
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intel_scu_stop(); |
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return NOTIFY_DONE; |
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} |
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/* |
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* Kernel Interfaces |
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*/ |
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static const struct file_operations intel_scu_fops = { |
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.owner = THIS_MODULE, |
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.llseek = no_llseek, |
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.write = intel_scu_write, |
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.unlocked_ioctl = intel_scu_ioctl, |
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.compat_ioctl = compat_ptr_ioctl, |
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.open = intel_scu_open, |
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.release = intel_scu_release, |
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}; |
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static int __init intel_scu_watchdog_init(void) |
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{ |
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int ret; |
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u32 __iomem *tmp_addr; |
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/* |
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* We don't really need to check this as the SFI timer get will fail |
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* but if we do so we can exit with a clearer reason and no noise. |
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* |
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* If it isn't an intel MID device then it doesn't have this watchdog |
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*/ |
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if (!intel_mid_identify_cpu()) |
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return -ENODEV; |
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/* Check boot parameters to verify that their initial values */ |
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/* are in range. */ |
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/* Check value of timer_set boot parameter */ |
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if ((timer_set < MIN_TIME_CYCLE) || |
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(timer_set > MAX_TIME - MIN_TIME_CYCLE)) { |
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pr_err("value of timer_set %x (hex) is out of range from %x to %x (hex)\n", |
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timer_set, MIN_TIME_CYCLE, MAX_TIME - MIN_TIME_CYCLE); |
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return -EINVAL; |
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} |
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/* Check value of timer_margin boot parameter */ |
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if (check_timer_margin(timer_margin)) |
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return -EINVAL; |
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watchdog_device.timer_tbl_ptr = sfi_get_mtmr(sfi_mtimer_num-1); |
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if (watchdog_device.timer_tbl_ptr == NULL) { |
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pr_debug("timer is not available\n"); |
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return -ENODEV; |
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} |
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/* make sure the timer exists */ |
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if (watchdog_device.timer_tbl_ptr->phys_addr == 0) { |
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pr_debug("timer %d does not have valid physical memory\n", |
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sfi_mtimer_num); |
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return -ENODEV; |
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} |
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if (watchdog_device.timer_tbl_ptr->irq == 0) { |
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pr_debug("timer %d invalid irq\n", sfi_mtimer_num); |
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return -ENODEV; |
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} |
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tmp_addr = ioremap(watchdog_device.timer_tbl_ptr->phys_addr, |
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20); |
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if (tmp_addr == NULL) { |
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pr_debug("timer unable to ioremap\n"); |
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return -ENOMEM; |
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} |
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watchdog_device.timer_load_count_addr = tmp_addr++; |
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watchdog_device.timer_current_value_addr = tmp_addr++; |
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watchdog_device.timer_control_addr = tmp_addr++; |
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watchdog_device.timer_clear_interrupt_addr = tmp_addr++; |
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watchdog_device.timer_interrupt_status_addr = tmp_addr++; |
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/* Set the default time values in device structure */ |
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watchdog_device.timer_set = timer_set; |
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watchdog_device.threshold = |
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timer_margin * watchdog_device.timer_tbl_ptr->freq_hz; |
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watchdog_device.soft_threshold = |
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(watchdog_device.timer_set - timer_margin) |
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* watchdog_device.timer_tbl_ptr->freq_hz; |
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watchdog_device.intel_scu_notifier.notifier_call = |
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intel_scu_notify_sys; |
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ret = register_reboot_notifier(&watchdog_device.intel_scu_notifier); |
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if (ret) { |
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pr_err("cannot register notifier %d)\n", ret); |
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goto register_reboot_error; |
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} |
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watchdog_device.miscdev.minor = WATCHDOG_MINOR; |
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watchdog_device.miscdev.name = "watchdog"; |
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watchdog_device.miscdev.fops = &intel_scu_fops; |
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ret = misc_register(&watchdog_device.miscdev); |
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if (ret) { |
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pr_err("cannot register miscdev %d err =%d\n", |
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WATCHDOG_MINOR, ret); |
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goto misc_register_error; |
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} |
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ret = request_irq((unsigned int)watchdog_device.timer_tbl_ptr->irq, |
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watchdog_timer_interrupt, |
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IRQF_SHARED, "watchdog", |
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&watchdog_device.timer_load_count_addr); |
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if (ret) { |
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pr_err("error requesting irq %d\n", ret); |
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goto request_irq_error; |
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} |
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/* Make sure timer is disabled before returning */ |
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intel_scu_stop(); |
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return 0; |
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/* error cleanup */ |
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request_irq_error: |
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misc_deregister(&watchdog_device.miscdev); |
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misc_register_error: |
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unregister_reboot_notifier(&watchdog_device.intel_scu_notifier); |
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register_reboot_error: |
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intel_scu_stop(); |
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iounmap(watchdog_device.timer_load_count_addr); |
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return ret; |
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} |
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late_initcall(intel_scu_watchdog_init);
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