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1270 lines
36 KiB
1270 lines
36 KiB
/* |
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* linux/drivers/video/sa1100fb.c |
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* |
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* Copyright (C) 1999 Eric A. Thomas |
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* Based on acornfb.c Copyright (C) Russell King. |
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* |
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* This file is subject to the terms and conditions of the GNU General Public |
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* License. See the file COPYING in the main directory of this archive for |
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* more details. |
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* |
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* StrongARM 1100 LCD Controller Frame Buffer Driver |
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* |
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* Please direct your questions and comments on this driver to the following |
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* email address: |
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* |
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* [email protected] |
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* |
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* Clean patches should be sent to the ARM Linux Patch System. Please see the |
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* following web page for more information: |
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* |
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* https://www.arm.linux.org.uk/developer/patches/info.shtml |
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* |
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* Thank you. |
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* |
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* Known problems: |
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* - With the Neponset plugged into an Assabet, LCD powerdown |
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* doesn't work (LCD stays powered up). Therefore we shouldn't |
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* blank the screen. |
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* - We don't limit the CPU clock rate nor the mode selection |
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* according to the available SDRAM bandwidth. |
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* |
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* Other notes: |
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* - Linear grayscale palettes and the kernel. |
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* Such code does not belong in the kernel. The kernel frame buffer |
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* drivers do not expect a linear colourmap, but a colourmap based on |
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* the VT100 standard mapping. |
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* |
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* If your _userspace_ requires a linear colourmap, then the setup of |
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* such a colourmap belongs _in userspace_, not in the kernel. Code |
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* to set the colourmap correctly from user space has been sent to |
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* David Neuer. It's around 8 lines of C code, plus another 4 to |
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* detect if we are using grayscale. |
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* |
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* - The following must never be specified in a panel definition: |
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* LCCR0_LtlEnd, LCCR3_PixClkDiv, LCCR3_VrtSnchL, LCCR3_HorSnchL |
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* |
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* - The following should be specified: |
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* either LCCR0_Color or LCCR0_Mono |
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* either LCCR0_Sngl or LCCR0_Dual |
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* either LCCR0_Act or LCCR0_Pas |
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* either LCCR3_OutEnH or LCCD3_OutEnL |
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* either LCCR3_PixRsEdg or LCCR3_PixFlEdg |
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* either LCCR3_ACBsDiv or LCCR3_ACBsCntOff |
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* |
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* Code Status: |
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* 1999/04/01: |
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* - Driver appears to be working for Brutus 320x200x8bpp mode. Other |
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* resolutions are working, but only the 8bpp mode is supported. |
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* Changes need to be made to the palette encode and decode routines |
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* to support 4 and 16 bpp modes. |
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* Driver is not designed to be a module. The FrameBuffer is statically |
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* allocated since dynamic allocation of a 300k buffer cannot be |
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* guaranteed. |
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* |
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* 1999/06/17: |
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* - FrameBuffer memory is now allocated at run-time when the |
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* driver is initialized. |
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* |
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* 2000/04/10: Nicolas Pitre <[email protected]> |
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* - Big cleanup for dynamic selection of machine type at run time. |
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* |
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* 2000/07/19: Jamey Hicks <[email protected]> |
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* - Support for Bitsy aka Compaq iPAQ H3600 added. |
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* |
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* 2000/08/07: Tak-Shing Chan <[email protected]> |
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* Jeff Sutherland <[email protected]> |
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* - Resolved an issue caused by a change made to the Assabet's PLD |
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* earlier this year which broke the framebuffer driver for newer |
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* Phase 4 Assabets. Some other parameters were changed to optimize |
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* for the Sharp display. |
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* |
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* 2000/08/09: Kunihiko IMAI <[email protected]> |
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* - XP860 support added |
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* |
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* 2000/08/19: Mark Huang <[email protected]> |
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* - Allows standard options to be passed on the kernel command line |
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* for most common passive displays. |
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* |
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* 2000/08/29: |
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* - s/save_flags_cli/local_irq_save/ |
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* - remove unneeded extra save_flags_cli in sa1100fb_enable_lcd_controller |
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* |
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* 2000/10/10: Erik Mouw <[email protected]> |
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* - Updated LART stuff. Fixed some minor bugs. |
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* |
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* 2000/10/30: Murphy Chen <[email protected]> |
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* - Pangolin support added |
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* |
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* 2000/10/31: Roman Jordan <[email protected]> |
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* - Huw Webpanel support added |
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* |
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* 2000/11/23: Eric Peng <[email protected]> |
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* - Freebird add |
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* |
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* 2001/02/07: Jamey Hicks <[email protected]> |
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* Cliff Brake <[email protected]> |
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* - Added PM callback |
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* |
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* 2001/05/26: <[email protected]> |
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* - Fix 16bpp so that (a) we use the right colours rather than some |
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* totally random colour depending on what was in page 0, and (b) |
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* we don't de-reference a NULL pointer. |
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* - remove duplicated implementation of consistent_alloc() |
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* - convert dma address types to dma_addr_t |
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* - remove unused 'montype' stuff |
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* - remove redundant zero inits of init_var after the initial |
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* memset. |
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* - remove allow_modeset (acornfb idea does not belong here) |
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* |
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* 2001/05/28: <[email protected]> |
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* - massive cleanup - move machine dependent data into structures |
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* - I've left various #warnings in - if you see one, and know |
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* the hardware concerned, please get in contact with me. |
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* |
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* 2001/05/31: <[email protected]> |
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* - Fix LCCR1 HSW value, fix all machine type specifications to |
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* keep values in line. (Please check your machine type specs) |
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* |
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* 2001/06/10: <[email protected]> |
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* - Fiddle with the LCD controller from task context only; mainly |
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* so that we can run with interrupts on, and sleep. |
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* - Convert #warnings into #errors. No pain, no gain. ;) |
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* |
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* 2001/06/14: <[email protected]> |
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* - Make the palette BPS value for 12bpp come out correctly. |
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* - Take notice of "greyscale" on any colour depth. |
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* - Make truecolor visuals use the RGB channel encoding information. |
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* |
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* 2001/07/02: <[email protected]> |
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* - Fix colourmap problems. |
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* |
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* 2001/07/13: <[email protected]> |
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* - Added support for the ICP LCD-Kit01 on LART. This LCD is |
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* manufactured by Prime View, model no V16C6448AB |
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* |
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* 2001/07/23: <[email protected]> |
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* - Hand merge version from handhelds.org CVS tree. See patch |
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* notes for 595/1 for more information. |
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* - Drop 12bpp (it's 16bpp with different colour register mappings). |
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* - This hardware can not do direct colour. Therefore we don't |
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* support it. |
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* |
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* 2001/07/27: <[email protected]> |
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* - Halve YRES on dual scan LCDs. |
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* |
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* 2001/08/22: <[email protected]> |
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* - Add b/w iPAQ pixclock value. |
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* |
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* 2001/10/12: <[email protected]> |
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* - Add patch 681/1 and clean up stork definitions. |
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*/ |
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#include <linux/module.h> |
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#include <linux/kernel.h> |
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#include <linux/sched.h> |
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#include <linux/errno.h> |
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#include <linux/string.h> |
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#include <linux/interrupt.h> |
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#include <linux/slab.h> |
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#include <linux/mm.h> |
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#include <linux/fb.h> |
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#include <linux/delay.h> |
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#include <linux/init.h> |
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#include <linux/ioport.h> |
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#include <linux/cpufreq.h> |
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#include <linux/gpio/consumer.h> |
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#include <linux/platform_device.h> |
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#include <linux/dma-mapping.h> |
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#include <linux/mutex.h> |
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#include <linux/io.h> |
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#include <linux/clk.h> |
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|
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#include <video/sa1100fb.h> |
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|
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#include <mach/hardware.h> |
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#include <asm/mach-types.h> |
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#include <mach/shannon.h> |
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|
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/* |
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* Complain if VAR is out of range. |
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*/ |
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#define DEBUG_VAR 1 |
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#include "sa1100fb.h" |
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static const struct sa1100fb_rgb rgb_4 = { |
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.red = { .offset = 0, .length = 4, }, |
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.green = { .offset = 0, .length = 4, }, |
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.blue = { .offset = 0, .length = 4, }, |
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.transp = { .offset = 0, .length = 0, }, |
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}; |
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static const struct sa1100fb_rgb rgb_8 = { |
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.red = { .offset = 0, .length = 8, }, |
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.green = { .offset = 0, .length = 8, }, |
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.blue = { .offset = 0, .length = 8, }, |
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.transp = { .offset = 0, .length = 0, }, |
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}; |
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static const struct sa1100fb_rgb def_rgb_16 = { |
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.red = { .offset = 11, .length = 5, }, |
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.green = { .offset = 5, .length = 6, }, |
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.blue = { .offset = 0, .length = 5, }, |
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.transp = { .offset = 0, .length = 0, }, |
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}; |
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static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *); |
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static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state); |
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static inline void sa1100fb_schedule_work(struct sa1100fb_info *fbi, u_int state) |
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{ |
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unsigned long flags; |
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|
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local_irq_save(flags); |
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/* |
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* We need to handle two requests being made at the same time. |
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* There are two important cases: |
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* 1. When we are changing VT (C_REENABLE) while unblanking (C_ENABLE) |
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* We must perform the unblanking, which will do our REENABLE for us. |
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* 2. When we are blanking, but immediately unblank before we have |
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* blanked. We do the "REENABLE" thing here as well, just to be sure. |
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*/ |
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if (fbi->task_state == C_ENABLE && state == C_REENABLE) |
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state = (u_int) -1; |
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if (fbi->task_state == C_DISABLE && state == C_ENABLE) |
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state = C_REENABLE; |
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if (state != (u_int)-1) { |
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fbi->task_state = state; |
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schedule_work(&fbi->task); |
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} |
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local_irq_restore(flags); |
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} |
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static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) |
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{ |
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chan &= 0xffff; |
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chan >>= 16 - bf->length; |
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return chan << bf->offset; |
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} |
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/* |
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* Convert bits-per-pixel to a hardware palette PBS value. |
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*/ |
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static inline u_int palette_pbs(struct fb_var_screeninfo *var) |
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{ |
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int ret = 0; |
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switch (var->bits_per_pixel) { |
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case 4: ret = 0 << 12; break; |
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case 8: ret = 1 << 12; break; |
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case 16: ret = 2 << 12; break; |
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} |
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return ret; |
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} |
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static int |
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sa1100fb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, |
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u_int trans, struct fb_info *info) |
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{ |
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struct sa1100fb_info *fbi = |
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container_of(info, struct sa1100fb_info, fb); |
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u_int val, ret = 1; |
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if (regno < fbi->palette_size) { |
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val = ((red >> 4) & 0xf00); |
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val |= ((green >> 8) & 0x0f0); |
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val |= ((blue >> 12) & 0x00f); |
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if (regno == 0) |
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val |= palette_pbs(&fbi->fb.var); |
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fbi->palette_cpu[regno] = val; |
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ret = 0; |
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} |
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return ret; |
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} |
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static int |
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sa1100fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
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u_int trans, struct fb_info *info) |
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{ |
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struct sa1100fb_info *fbi = |
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container_of(info, struct sa1100fb_info, fb); |
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unsigned int val; |
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int ret = 1; |
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/* |
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* If inverse mode was selected, invert all the colours |
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* rather than the register number. The register number |
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* is what you poke into the framebuffer to produce the |
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* colour you requested. |
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*/ |
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if (fbi->inf->cmap_inverse) { |
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red = 0xffff - red; |
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green = 0xffff - green; |
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blue = 0xffff - blue; |
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} |
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/* |
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* If greyscale is true, then we convert the RGB value |
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* to greyscale no mater what visual we are using. |
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*/ |
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if (fbi->fb.var.grayscale) |
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red = green = blue = (19595 * red + 38470 * green + |
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7471 * blue) >> 16; |
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|
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switch (fbi->fb.fix.visual) { |
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case FB_VISUAL_TRUECOLOR: |
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/* |
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* 12 or 16-bit True Colour. We encode the RGB value |
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* according to the RGB bitfield information. |
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*/ |
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if (regno < 16) { |
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val = chan_to_field(red, &fbi->fb.var.red); |
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val |= chan_to_field(green, &fbi->fb.var.green); |
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val |= chan_to_field(blue, &fbi->fb.var.blue); |
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fbi->pseudo_palette[regno] = val; |
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ret = 0; |
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} |
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break; |
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case FB_VISUAL_STATIC_PSEUDOCOLOR: |
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case FB_VISUAL_PSEUDOCOLOR: |
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ret = sa1100fb_setpalettereg(regno, red, green, blue, trans, info); |
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break; |
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} |
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|
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return ret; |
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} |
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#ifdef CONFIG_CPU_FREQ |
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/* |
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* sa1100fb_display_dma_period() |
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* Calculate the minimum period (in picoseconds) between two DMA |
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* requests for the LCD controller. If we hit this, it means we're |
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* doing nothing but LCD DMA. |
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*/ |
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static inline unsigned int sa1100fb_display_dma_period(struct fb_var_screeninfo *var) |
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{ |
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/* |
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* Period = pixclock * bits_per_byte * bytes_per_transfer |
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* / memory_bits_per_pixel; |
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*/ |
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return var->pixclock * 8 * 16 / var->bits_per_pixel; |
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} |
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#endif |
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/* |
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* sa1100fb_check_var(): |
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* Round up in the following order: bits_per_pixel, xres, |
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* yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, |
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* bitfields, horizontal timing, vertical timing. |
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*/ |
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static int |
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sa1100fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
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{ |
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struct sa1100fb_info *fbi = |
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container_of(info, struct sa1100fb_info, fb); |
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int rgbidx; |
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|
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if (var->xres < MIN_XRES) |
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var->xres = MIN_XRES; |
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if (var->yres < MIN_YRES) |
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var->yres = MIN_YRES; |
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if (var->xres > fbi->inf->xres) |
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var->xres = fbi->inf->xres; |
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if (var->yres > fbi->inf->yres) |
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var->yres = fbi->inf->yres; |
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var->xres_virtual = max(var->xres_virtual, var->xres); |
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var->yres_virtual = max(var->yres_virtual, var->yres); |
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|
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dev_dbg(fbi->dev, "var->bits_per_pixel=%d\n", var->bits_per_pixel); |
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switch (var->bits_per_pixel) { |
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case 4: |
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rgbidx = RGB_4; |
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break; |
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case 8: |
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rgbidx = RGB_8; |
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break; |
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case 16: |
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rgbidx = RGB_16; |
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break; |
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default: |
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return -EINVAL; |
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} |
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|
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/* |
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* Copy the RGB parameters for this display |
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* from the machine specific parameters. |
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*/ |
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var->red = fbi->rgb[rgbidx]->red; |
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var->green = fbi->rgb[rgbidx]->green; |
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var->blue = fbi->rgb[rgbidx]->blue; |
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var->transp = fbi->rgb[rgbidx]->transp; |
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|
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dev_dbg(fbi->dev, "RGBT length = %d:%d:%d:%d\n", |
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var->red.length, var->green.length, var->blue.length, |
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var->transp.length); |
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|
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dev_dbg(fbi->dev, "RGBT offset = %d:%d:%d:%d\n", |
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var->red.offset, var->green.offset, var->blue.offset, |
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var->transp.offset); |
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|
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#ifdef CONFIG_CPU_FREQ |
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dev_dbg(fbi->dev, "dma period = %d ps, clock = %ld kHz\n", |
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sa1100fb_display_dma_period(var), |
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clk_get_rate(fbi->clk) / 1000); |
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#endif |
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|
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return 0; |
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} |
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|
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static void sa1100fb_set_visual(struct sa1100fb_info *fbi, u32 visual) |
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{ |
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if (fbi->inf->set_visual) |
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fbi->inf->set_visual(visual); |
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} |
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|
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/* |
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* sa1100fb_set_par(): |
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* Set the user defined part of the display for the specified console |
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*/ |
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static int sa1100fb_set_par(struct fb_info *info) |
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{ |
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struct sa1100fb_info *fbi = |
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container_of(info, struct sa1100fb_info, fb); |
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struct fb_var_screeninfo *var = &info->var; |
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unsigned long palette_mem_size; |
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|
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dev_dbg(fbi->dev, "set_par\n"); |
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|
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if (var->bits_per_pixel == 16) |
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fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR; |
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else if (!fbi->inf->cmap_static) |
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fbi->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR; |
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else { |
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/* |
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* Some people have weird ideas about wanting static |
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* pseudocolor maps. I suspect their user space |
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* applications are broken. |
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*/ |
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fbi->fb.fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; |
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} |
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|
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fbi->fb.fix.line_length = var->xres_virtual * |
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var->bits_per_pixel / 8; |
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fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; |
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|
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palette_mem_size = fbi->palette_size * sizeof(u16); |
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|
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dev_dbg(fbi->dev, "palette_mem_size = 0x%08lx\n", palette_mem_size); |
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|
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fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size); |
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fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size; |
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|
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/* |
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* Set (any) board control register to handle new color depth |
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*/ |
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sa1100fb_set_visual(fbi, fbi->fb.fix.visual); |
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sa1100fb_activate_var(var, fbi); |
|
|
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return 0; |
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} |
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|
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#if 0 |
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static int |
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sa1100fb_set_cmap(struct fb_cmap *cmap, int kspc, int con, |
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struct fb_info *info) |
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{ |
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struct sa1100fb_info *fbi = (struct sa1100fb_info *)info; |
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|
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/* |
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* Make sure the user isn't doing something stupid. |
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*/ |
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if (!kspc && (fbi->fb.var.bits_per_pixel == 16 || fbi->inf->cmap_static)) |
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return -EINVAL; |
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|
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return gen_set_cmap(cmap, kspc, con, info); |
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} |
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#endif |
|
|
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/* |
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* Formal definition of the VESA spec: |
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* On |
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* This refers to the state of the display when it is in full operation |
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* Stand-By |
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* This defines an optional operating state of minimal power reduction with |
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* the shortest recovery time |
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* Suspend |
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* This refers to a level of power management in which substantial power |
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* reduction is achieved by the display. The display can have a longer |
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* recovery time from this state than from the Stand-by state |
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* Off |
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* This indicates that the display is consuming the lowest level of power |
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* and is non-operational. Recovery from this state may optionally require |
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* the user to manually power on the monitor |
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* |
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* Now, the fbdev driver adds an additional state, (blank), where they |
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* turn off the video (maybe by colormap tricks), but don't mess with the |
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* video itself: think of it semantically between on and Stand-By. |
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* |
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* So here's what we should do in our fbdev blank routine: |
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* |
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* VESA_NO_BLANKING (mode 0) Video on, front/back light on |
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* VESA_VSYNC_SUSPEND (mode 1) Video on, front/back light off |
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* VESA_HSYNC_SUSPEND (mode 2) Video on, front/back light off |
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* VESA_POWERDOWN (mode 3) Video off, front/back light off |
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* |
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* This will match the matrox implementation. |
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*/ |
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/* |
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* sa1100fb_blank(): |
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* Blank the display by setting all palette values to zero. Note, the |
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* 12 and 16 bpp modes don't really use the palette, so this will not |
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* blank the display in all modes. |
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*/ |
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static int sa1100fb_blank(int blank, struct fb_info *info) |
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{ |
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struct sa1100fb_info *fbi = |
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container_of(info, struct sa1100fb_info, fb); |
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int i; |
|
|
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dev_dbg(fbi->dev, "sa1100fb_blank: blank=%d\n", blank); |
|
|
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switch (blank) { |
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case FB_BLANK_POWERDOWN: |
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case FB_BLANK_VSYNC_SUSPEND: |
|
case FB_BLANK_HSYNC_SUSPEND: |
|
case FB_BLANK_NORMAL: |
|
if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR || |
|
fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR) |
|
for (i = 0; i < fbi->palette_size; i++) |
|
sa1100fb_setpalettereg(i, 0, 0, 0, 0, info); |
|
sa1100fb_schedule_work(fbi, C_DISABLE); |
|
break; |
|
|
|
case FB_BLANK_UNBLANK: |
|
if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR || |
|
fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR) |
|
fb_set_cmap(&fbi->fb.cmap, info); |
|
sa1100fb_schedule_work(fbi, C_ENABLE); |
|
} |
|
return 0; |
|
} |
|
|
|
static int sa1100fb_mmap(struct fb_info *info, |
|
struct vm_area_struct *vma) |
|
{ |
|
struct sa1100fb_info *fbi = |
|
container_of(info, struct sa1100fb_info, fb); |
|
unsigned long off = vma->vm_pgoff << PAGE_SHIFT; |
|
|
|
if (off < info->fix.smem_len) { |
|
vma->vm_pgoff += 1; /* skip over the palette */ |
|
return dma_mmap_wc(fbi->dev, vma, fbi->map_cpu, fbi->map_dma, |
|
fbi->map_size); |
|
} |
|
|
|
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
|
|
|
return vm_iomap_memory(vma, info->fix.mmio_start, info->fix.mmio_len); |
|
} |
|
|
|
static const struct fb_ops sa1100fb_ops = { |
|
.owner = THIS_MODULE, |
|
.fb_check_var = sa1100fb_check_var, |
|
.fb_set_par = sa1100fb_set_par, |
|
// .fb_set_cmap = sa1100fb_set_cmap, |
|
.fb_setcolreg = sa1100fb_setcolreg, |
|
.fb_fillrect = cfb_fillrect, |
|
.fb_copyarea = cfb_copyarea, |
|
.fb_imageblit = cfb_imageblit, |
|
.fb_blank = sa1100fb_blank, |
|
.fb_mmap = sa1100fb_mmap, |
|
}; |
|
|
|
/* |
|
* Calculate the PCD value from the clock rate (in picoseconds). |
|
* We take account of the PPCR clock setting. |
|
*/ |
|
static inline unsigned int get_pcd(struct sa1100fb_info *fbi, |
|
unsigned int pixclock) |
|
{ |
|
unsigned int pcd = clk_get_rate(fbi->clk) / 100 / 1000; |
|
|
|
pcd *= pixclock; |
|
pcd /= 10000000; |
|
|
|
return pcd + 1; /* make up for integer math truncations */ |
|
} |
|
|
|
/* |
|
* sa1100fb_activate_var(): |
|
* Configures LCD Controller based on entries in var parameter. Settings are |
|
* only written to the controller if changes were made. |
|
*/ |
|
static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *fbi) |
|
{ |
|
struct sa1100fb_lcd_reg new_regs; |
|
u_int half_screen_size, yres, pcd; |
|
u_long flags; |
|
|
|
dev_dbg(fbi->dev, "Configuring SA1100 LCD\n"); |
|
|
|
dev_dbg(fbi->dev, "var: xres=%d hslen=%d lm=%d rm=%d\n", |
|
var->xres, var->hsync_len, |
|
var->left_margin, var->right_margin); |
|
dev_dbg(fbi->dev, "var: yres=%d vslen=%d um=%d bm=%d\n", |
|
var->yres, var->vsync_len, |
|
var->upper_margin, var->lower_margin); |
|
|
|
#if DEBUG_VAR |
|
if (var->xres < 16 || var->xres > 1024) |
|
dev_err(fbi->dev, "%s: invalid xres %d\n", |
|
fbi->fb.fix.id, var->xres); |
|
if (var->hsync_len < 1 || var->hsync_len > 64) |
|
dev_err(fbi->dev, "%s: invalid hsync_len %d\n", |
|
fbi->fb.fix.id, var->hsync_len); |
|
if (var->left_margin < 1 || var->left_margin > 255) |
|
dev_err(fbi->dev, "%s: invalid left_margin %d\n", |
|
fbi->fb.fix.id, var->left_margin); |
|
if (var->right_margin < 1 || var->right_margin > 255) |
|
dev_err(fbi->dev, "%s: invalid right_margin %d\n", |
|
fbi->fb.fix.id, var->right_margin); |
|
if (var->yres < 1 || var->yres > 1024) |
|
dev_err(fbi->dev, "%s: invalid yres %d\n", |
|
fbi->fb.fix.id, var->yres); |
|
if (var->vsync_len < 1 || var->vsync_len > 64) |
|
dev_err(fbi->dev, "%s: invalid vsync_len %d\n", |
|
fbi->fb.fix.id, var->vsync_len); |
|
if (var->upper_margin < 0 || var->upper_margin > 255) |
|
dev_err(fbi->dev, "%s: invalid upper_margin %d\n", |
|
fbi->fb.fix.id, var->upper_margin); |
|
if (var->lower_margin < 0 || var->lower_margin > 255) |
|
dev_err(fbi->dev, "%s: invalid lower_margin %d\n", |
|
fbi->fb.fix.id, var->lower_margin); |
|
#endif |
|
|
|
new_regs.lccr0 = fbi->inf->lccr0 | |
|
LCCR0_LEN | LCCR0_LDM | LCCR0_BAM | |
|
LCCR0_ERM | LCCR0_LtlEnd | LCCR0_DMADel(0); |
|
|
|
new_regs.lccr1 = |
|
LCCR1_DisWdth(var->xres) + |
|
LCCR1_HorSnchWdth(var->hsync_len) + |
|
LCCR1_BegLnDel(var->left_margin) + |
|
LCCR1_EndLnDel(var->right_margin); |
|
|
|
/* |
|
* If we have a dual scan LCD, then we need to halve |
|
* the YRES parameter. |
|
*/ |
|
yres = var->yres; |
|
if (fbi->inf->lccr0 & LCCR0_Dual) |
|
yres /= 2; |
|
|
|
new_regs.lccr2 = |
|
LCCR2_DisHght(yres) + |
|
LCCR2_VrtSnchWdth(var->vsync_len) + |
|
LCCR2_BegFrmDel(var->upper_margin) + |
|
LCCR2_EndFrmDel(var->lower_margin); |
|
|
|
pcd = get_pcd(fbi, var->pixclock); |
|
new_regs.lccr3 = LCCR3_PixClkDiv(pcd) | fbi->inf->lccr3 | |
|
(var->sync & FB_SYNC_HOR_HIGH_ACT ? LCCR3_HorSnchH : LCCR3_HorSnchL) | |
|
(var->sync & FB_SYNC_VERT_HIGH_ACT ? LCCR3_VrtSnchH : LCCR3_VrtSnchL); |
|
|
|
dev_dbg(fbi->dev, "nlccr0 = 0x%08lx\n", new_regs.lccr0); |
|
dev_dbg(fbi->dev, "nlccr1 = 0x%08lx\n", new_regs.lccr1); |
|
dev_dbg(fbi->dev, "nlccr2 = 0x%08lx\n", new_regs.lccr2); |
|
dev_dbg(fbi->dev, "nlccr3 = 0x%08lx\n", new_regs.lccr3); |
|
|
|
half_screen_size = var->bits_per_pixel; |
|
half_screen_size = half_screen_size * var->xres * var->yres / 16; |
|
|
|
/* Update shadow copy atomically */ |
|
local_irq_save(flags); |
|
fbi->dbar1 = fbi->palette_dma; |
|
fbi->dbar2 = fbi->screen_dma + half_screen_size; |
|
|
|
fbi->reg_lccr0 = new_regs.lccr0; |
|
fbi->reg_lccr1 = new_regs.lccr1; |
|
fbi->reg_lccr2 = new_regs.lccr2; |
|
fbi->reg_lccr3 = new_regs.lccr3; |
|
local_irq_restore(flags); |
|
|
|
/* |
|
* Only update the registers if the controller is enabled |
|
* and something has changed. |
|
*/ |
|
if (readl_relaxed(fbi->base + LCCR0) != fbi->reg_lccr0 || |
|
readl_relaxed(fbi->base + LCCR1) != fbi->reg_lccr1 || |
|
readl_relaxed(fbi->base + LCCR2) != fbi->reg_lccr2 || |
|
readl_relaxed(fbi->base + LCCR3) != fbi->reg_lccr3 || |
|
readl_relaxed(fbi->base + DBAR1) != fbi->dbar1 || |
|
readl_relaxed(fbi->base + DBAR2) != fbi->dbar2) |
|
sa1100fb_schedule_work(fbi, C_REENABLE); |
|
|
|
return 0; |
|
} |
|
|
|
/* |
|
* NOTE! The following functions are purely helpers for set_ctrlr_state. |
|
* Do not call them directly; set_ctrlr_state does the correct serialisation |
|
* to ensure that things happen in the right way 100% of time time. |
|
* -- rmk |
|
*/ |
|
static inline void __sa1100fb_backlight_power(struct sa1100fb_info *fbi, int on) |
|
{ |
|
dev_dbg(fbi->dev, "backlight o%s\n", on ? "n" : "ff"); |
|
|
|
if (fbi->inf->backlight_power) |
|
fbi->inf->backlight_power(on); |
|
} |
|
|
|
static inline void __sa1100fb_lcd_power(struct sa1100fb_info *fbi, int on) |
|
{ |
|
dev_dbg(fbi->dev, "LCD power o%s\n", on ? "n" : "ff"); |
|
|
|
if (fbi->inf->lcd_power) |
|
fbi->inf->lcd_power(on); |
|
} |
|
|
|
static void sa1100fb_setup_gpio(struct sa1100fb_info *fbi) |
|
{ |
|
u_int mask = 0; |
|
|
|
/* |
|
* Enable GPIO<9:2> for LCD use if: |
|
* 1. Active display, or |
|
* 2. Color Dual Passive display |
|
* |
|
* see table 11.8 on page 11-27 in the SA1100 manual |
|
* -- Erik. |
|
* |
|
* SA1110 spec update nr. 25 says we can and should |
|
* clear LDD15 to 12 for 4 or 8bpp modes with active |
|
* panels. |
|
*/ |
|
if ((fbi->reg_lccr0 & LCCR0_CMS) == LCCR0_Color && |
|
(fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) != 0) { |
|
mask = GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8; |
|
|
|
if (fbi->fb.var.bits_per_pixel > 8 || |
|
(fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) == LCCR0_Dual) |
|
mask |= GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12; |
|
|
|
} |
|
|
|
if (mask) { |
|
unsigned long flags; |
|
|
|
/* |
|
* SA-1100 requires the GPIO direction register set |
|
* appropriately for the alternate function. Hence |
|
* we set it here via bitmask rather than excessive |
|
* fiddling via the GPIO subsystem - and even then |
|
* we'll still have to deal with GAFR. |
|
*/ |
|
local_irq_save(flags); |
|
GPDR |= mask; |
|
GAFR |= mask; |
|
local_irq_restore(flags); |
|
} |
|
} |
|
|
|
static void sa1100fb_enable_controller(struct sa1100fb_info *fbi) |
|
{ |
|
dev_dbg(fbi->dev, "Enabling LCD controller\n"); |
|
|
|
/* |
|
* Make sure the mode bits are present in the first palette entry |
|
*/ |
|
fbi->palette_cpu[0] &= 0xcfff; |
|
fbi->palette_cpu[0] |= palette_pbs(&fbi->fb.var); |
|
|
|
/* enable LCD controller clock */ |
|
clk_prepare_enable(fbi->clk); |
|
|
|
/* Sequence from 11.7.10 */ |
|
writel_relaxed(fbi->reg_lccr3, fbi->base + LCCR3); |
|
writel_relaxed(fbi->reg_lccr2, fbi->base + LCCR2); |
|
writel_relaxed(fbi->reg_lccr1, fbi->base + LCCR1); |
|
writel_relaxed(fbi->reg_lccr0 & ~LCCR0_LEN, fbi->base + LCCR0); |
|
writel_relaxed(fbi->dbar1, fbi->base + DBAR1); |
|
writel_relaxed(fbi->dbar2, fbi->base + DBAR2); |
|
writel_relaxed(fbi->reg_lccr0 | LCCR0_LEN, fbi->base + LCCR0); |
|
|
|
if (fbi->shannon_lcden) |
|
gpiod_set_value(fbi->shannon_lcden, 1); |
|
|
|
dev_dbg(fbi->dev, "DBAR1: 0x%08x\n", readl_relaxed(fbi->base + DBAR1)); |
|
dev_dbg(fbi->dev, "DBAR2: 0x%08x\n", readl_relaxed(fbi->base + DBAR2)); |
|
dev_dbg(fbi->dev, "LCCR0: 0x%08x\n", readl_relaxed(fbi->base + LCCR0)); |
|
dev_dbg(fbi->dev, "LCCR1: 0x%08x\n", readl_relaxed(fbi->base + LCCR1)); |
|
dev_dbg(fbi->dev, "LCCR2: 0x%08x\n", readl_relaxed(fbi->base + LCCR2)); |
|
dev_dbg(fbi->dev, "LCCR3: 0x%08x\n", readl_relaxed(fbi->base + LCCR3)); |
|
} |
|
|
|
static void sa1100fb_disable_controller(struct sa1100fb_info *fbi) |
|
{ |
|
DECLARE_WAITQUEUE(wait, current); |
|
u32 lccr0; |
|
|
|
dev_dbg(fbi->dev, "Disabling LCD controller\n"); |
|
|
|
if (fbi->shannon_lcden) |
|
gpiod_set_value(fbi->shannon_lcden, 0); |
|
|
|
set_current_state(TASK_UNINTERRUPTIBLE); |
|
add_wait_queue(&fbi->ctrlr_wait, &wait); |
|
|
|
/* Clear LCD Status Register */ |
|
writel_relaxed(~0, fbi->base + LCSR); |
|
|
|
lccr0 = readl_relaxed(fbi->base + LCCR0); |
|
lccr0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */ |
|
writel_relaxed(lccr0, fbi->base + LCCR0); |
|
lccr0 &= ~LCCR0_LEN; /* Disable LCD Controller */ |
|
writel_relaxed(lccr0, fbi->base + LCCR0); |
|
|
|
schedule_timeout(20 * HZ / 1000); |
|
remove_wait_queue(&fbi->ctrlr_wait, &wait); |
|
|
|
/* disable LCD controller clock */ |
|
clk_disable_unprepare(fbi->clk); |
|
} |
|
|
|
/* |
|
* sa1100fb_handle_irq: Handle 'LCD DONE' interrupts. |
|
*/ |
|
static irqreturn_t sa1100fb_handle_irq(int irq, void *dev_id) |
|
{ |
|
struct sa1100fb_info *fbi = dev_id; |
|
unsigned int lcsr = readl_relaxed(fbi->base + LCSR); |
|
|
|
if (lcsr & LCSR_LDD) { |
|
u32 lccr0 = readl_relaxed(fbi->base + LCCR0) | LCCR0_LDM; |
|
writel_relaxed(lccr0, fbi->base + LCCR0); |
|
wake_up(&fbi->ctrlr_wait); |
|
} |
|
|
|
writel_relaxed(lcsr, fbi->base + LCSR); |
|
return IRQ_HANDLED; |
|
} |
|
|
|
/* |
|
* This function must be called from task context only, since it will |
|
* sleep when disabling the LCD controller, or if we get two contending |
|
* processes trying to alter state. |
|
*/ |
|
static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state) |
|
{ |
|
u_int old_state; |
|
|
|
mutex_lock(&fbi->ctrlr_lock); |
|
|
|
old_state = fbi->state; |
|
|
|
/* |
|
* Hack around fbcon initialisation. |
|
*/ |
|
if (old_state == C_STARTUP && state == C_REENABLE) |
|
state = C_ENABLE; |
|
|
|
switch (state) { |
|
case C_DISABLE_CLKCHANGE: |
|
/* |
|
* Disable controller for clock change. If the |
|
* controller is already disabled, then do nothing. |
|
*/ |
|
if (old_state != C_DISABLE && old_state != C_DISABLE_PM) { |
|
fbi->state = state; |
|
sa1100fb_disable_controller(fbi); |
|
} |
|
break; |
|
|
|
case C_DISABLE_PM: |
|
case C_DISABLE: |
|
/* |
|
* Disable controller |
|
*/ |
|
if (old_state != C_DISABLE) { |
|
fbi->state = state; |
|
|
|
__sa1100fb_backlight_power(fbi, 0); |
|
if (old_state != C_DISABLE_CLKCHANGE) |
|
sa1100fb_disable_controller(fbi); |
|
__sa1100fb_lcd_power(fbi, 0); |
|
} |
|
break; |
|
|
|
case C_ENABLE_CLKCHANGE: |
|
/* |
|
* Enable the controller after clock change. Only |
|
* do this if we were disabled for the clock change. |
|
*/ |
|
if (old_state == C_DISABLE_CLKCHANGE) { |
|
fbi->state = C_ENABLE; |
|
sa1100fb_enable_controller(fbi); |
|
} |
|
break; |
|
|
|
case C_REENABLE: |
|
/* |
|
* Re-enable the controller only if it was already |
|
* enabled. This is so we reprogram the control |
|
* registers. |
|
*/ |
|
if (old_state == C_ENABLE) { |
|
sa1100fb_disable_controller(fbi); |
|
sa1100fb_setup_gpio(fbi); |
|
sa1100fb_enable_controller(fbi); |
|
} |
|
break; |
|
|
|
case C_ENABLE_PM: |
|
/* |
|
* Re-enable the controller after PM. This is not |
|
* perfect - think about the case where we were doing |
|
* a clock change, and we suspended half-way through. |
|
*/ |
|
if (old_state != C_DISABLE_PM) |
|
break; |
|
fallthrough; |
|
|
|
case C_ENABLE: |
|
/* |
|
* Power up the LCD screen, enable controller, and |
|
* turn on the backlight. |
|
*/ |
|
if (old_state != C_ENABLE) { |
|
fbi->state = C_ENABLE; |
|
sa1100fb_setup_gpio(fbi); |
|
__sa1100fb_lcd_power(fbi, 1); |
|
sa1100fb_enable_controller(fbi); |
|
__sa1100fb_backlight_power(fbi, 1); |
|
} |
|
break; |
|
} |
|
mutex_unlock(&fbi->ctrlr_lock); |
|
} |
|
|
|
/* |
|
* Our LCD controller task (which is called when we blank or unblank) |
|
* via keventd. |
|
*/ |
|
static void sa1100fb_task(struct work_struct *w) |
|
{ |
|
struct sa1100fb_info *fbi = container_of(w, struct sa1100fb_info, task); |
|
u_int state = xchg(&fbi->task_state, -1); |
|
|
|
set_ctrlr_state(fbi, state); |
|
} |
|
|
|
#ifdef CONFIG_CPU_FREQ |
|
/* |
|
* CPU clock speed change handler. We need to adjust the LCD timing |
|
* parameters when the CPU clock is adjusted by the power management |
|
* subsystem. |
|
*/ |
|
static int |
|
sa1100fb_freq_transition(struct notifier_block *nb, unsigned long val, |
|
void *data) |
|
{ |
|
struct sa1100fb_info *fbi = TO_INF(nb, freq_transition); |
|
u_int pcd; |
|
|
|
switch (val) { |
|
case CPUFREQ_PRECHANGE: |
|
set_ctrlr_state(fbi, C_DISABLE_CLKCHANGE); |
|
break; |
|
|
|
case CPUFREQ_POSTCHANGE: |
|
pcd = get_pcd(fbi, fbi->fb.var.pixclock); |
|
fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | LCCR3_PixClkDiv(pcd); |
|
set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE); |
|
break; |
|
} |
|
return 0; |
|
} |
|
#endif |
|
|
|
#ifdef CONFIG_PM |
|
/* |
|
* Power management hooks. Note that we won't be called from IRQ context, |
|
* unlike the blank functions above, so we may sleep. |
|
*/ |
|
static int sa1100fb_suspend(struct platform_device *dev, pm_message_t state) |
|
{ |
|
struct sa1100fb_info *fbi = platform_get_drvdata(dev); |
|
|
|
set_ctrlr_state(fbi, C_DISABLE_PM); |
|
return 0; |
|
} |
|
|
|
static int sa1100fb_resume(struct platform_device *dev) |
|
{ |
|
struct sa1100fb_info *fbi = platform_get_drvdata(dev); |
|
|
|
set_ctrlr_state(fbi, C_ENABLE_PM); |
|
return 0; |
|
} |
|
#else |
|
#define sa1100fb_suspend NULL |
|
#define sa1100fb_resume NULL |
|
#endif |
|
|
|
/* |
|
* sa1100fb_map_video_memory(): |
|
* Allocates the DRAM memory for the frame buffer. This buffer is |
|
* remapped into a non-cached, non-buffered, memory region to |
|
* allow palette and pixel writes to occur without flushing the |
|
* cache. Once this area is remapped, all virtual memory |
|
* access to the video memory should occur at the new region. |
|
*/ |
|
static int sa1100fb_map_video_memory(struct sa1100fb_info *fbi) |
|
{ |
|
/* |
|
* We reserve one page for the palette, plus the size |
|
* of the framebuffer. |
|
*/ |
|
fbi->map_size = PAGE_ALIGN(fbi->fb.fix.smem_len + PAGE_SIZE); |
|
fbi->map_cpu = dma_alloc_wc(fbi->dev, fbi->map_size, &fbi->map_dma, |
|
GFP_KERNEL); |
|
|
|
if (fbi->map_cpu) { |
|
fbi->fb.screen_base = fbi->map_cpu + PAGE_SIZE; |
|
fbi->screen_dma = fbi->map_dma + PAGE_SIZE; |
|
/* |
|
* FIXME: this is actually the wrong thing to place in |
|
* smem_start. But fbdev suffers from the problem that |
|
* it needs an API which doesn't exist (in this case, |
|
* dma_writecombine_mmap) |
|
*/ |
|
fbi->fb.fix.smem_start = fbi->screen_dma; |
|
} |
|
|
|
return fbi->map_cpu ? 0 : -ENOMEM; |
|
} |
|
|
|
/* Fake monspecs to fill in fbinfo structure */ |
|
static const struct fb_monspecs monspecs = { |
|
.hfmin = 30000, |
|
.hfmax = 70000, |
|
.vfmin = 50, |
|
.vfmax = 65, |
|
}; |
|
|
|
|
|
static struct sa1100fb_info *sa1100fb_init_fbinfo(struct device *dev) |
|
{ |
|
struct sa1100fb_mach_info *inf = dev_get_platdata(dev); |
|
struct sa1100fb_info *fbi; |
|
unsigned i; |
|
|
|
fbi = devm_kzalloc(dev, sizeof(struct sa1100fb_info), GFP_KERNEL); |
|
if (!fbi) |
|
return NULL; |
|
|
|
fbi->dev = dev; |
|
|
|
strcpy(fbi->fb.fix.id, SA1100_NAME); |
|
|
|
fbi->fb.fix.type = FB_TYPE_PACKED_PIXELS; |
|
fbi->fb.fix.type_aux = 0; |
|
fbi->fb.fix.xpanstep = 0; |
|
fbi->fb.fix.ypanstep = 0; |
|
fbi->fb.fix.ywrapstep = 0; |
|
fbi->fb.fix.accel = FB_ACCEL_NONE; |
|
|
|
fbi->fb.var.nonstd = 0; |
|
fbi->fb.var.activate = FB_ACTIVATE_NOW; |
|
fbi->fb.var.height = -1; |
|
fbi->fb.var.width = -1; |
|
fbi->fb.var.accel_flags = 0; |
|
fbi->fb.var.vmode = FB_VMODE_NONINTERLACED; |
|
|
|
fbi->fb.fbops = &sa1100fb_ops; |
|
fbi->fb.flags = FBINFO_DEFAULT; |
|
fbi->fb.monspecs = monspecs; |
|
fbi->fb.pseudo_palette = fbi->pseudo_palette; |
|
|
|
fbi->rgb[RGB_4] = &rgb_4; |
|
fbi->rgb[RGB_8] = &rgb_8; |
|
fbi->rgb[RGB_16] = &def_rgb_16; |
|
|
|
/* |
|
* People just don't seem to get this. We don't support |
|
* anything but correct entries now, so panic if someone |
|
* does something stupid. |
|
*/ |
|
if (inf->lccr3 & (LCCR3_VrtSnchL|LCCR3_HorSnchL|0xff) || |
|
inf->pixclock == 0) |
|
panic("sa1100fb error: invalid LCCR3 fields set or zero " |
|
"pixclock."); |
|
|
|
fbi->fb.var.xres = inf->xres; |
|
fbi->fb.var.xres_virtual = inf->xres; |
|
fbi->fb.var.yres = inf->yres; |
|
fbi->fb.var.yres_virtual = inf->yres; |
|
fbi->fb.var.bits_per_pixel = inf->bpp; |
|
fbi->fb.var.pixclock = inf->pixclock; |
|
fbi->fb.var.hsync_len = inf->hsync_len; |
|
fbi->fb.var.left_margin = inf->left_margin; |
|
fbi->fb.var.right_margin = inf->right_margin; |
|
fbi->fb.var.vsync_len = inf->vsync_len; |
|
fbi->fb.var.upper_margin = inf->upper_margin; |
|
fbi->fb.var.lower_margin = inf->lower_margin; |
|
fbi->fb.var.sync = inf->sync; |
|
fbi->fb.var.grayscale = inf->cmap_greyscale; |
|
fbi->state = C_STARTUP; |
|
fbi->task_state = (u_char)-1; |
|
fbi->fb.fix.smem_len = inf->xres * inf->yres * |
|
inf->bpp / 8; |
|
fbi->inf = inf; |
|
|
|
/* Copy the RGB bitfield overrides */ |
|
for (i = 0; i < NR_RGB; i++) |
|
if (inf->rgb[i]) |
|
fbi->rgb[i] = inf->rgb[i]; |
|
|
|
init_waitqueue_head(&fbi->ctrlr_wait); |
|
INIT_WORK(&fbi->task, sa1100fb_task); |
|
mutex_init(&fbi->ctrlr_lock); |
|
|
|
return fbi; |
|
} |
|
|
|
static int sa1100fb_probe(struct platform_device *pdev) |
|
{ |
|
struct sa1100fb_info *fbi; |
|
int ret, irq; |
|
|
|
if (!dev_get_platdata(&pdev->dev)) { |
|
dev_err(&pdev->dev, "no platform LCD data\n"); |
|
return -EINVAL; |
|
} |
|
|
|
irq = platform_get_irq(pdev, 0); |
|
if (irq < 0) |
|
return -EINVAL; |
|
|
|
fbi = sa1100fb_init_fbinfo(&pdev->dev); |
|
if (!fbi) |
|
return -ENOMEM; |
|
|
|
fbi->base = devm_platform_ioremap_resource(pdev, 0); |
|
if (IS_ERR(fbi->base)) |
|
return PTR_ERR(fbi->base); |
|
|
|
fbi->clk = devm_clk_get(&pdev->dev, NULL); |
|
if (IS_ERR(fbi->clk)) |
|
return PTR_ERR(fbi->clk); |
|
|
|
ret = devm_request_irq(&pdev->dev, irq, sa1100fb_handle_irq, 0, |
|
"LCD", fbi); |
|
if (ret) { |
|
dev_err(&pdev->dev, "request_irq failed: %d\n", ret); |
|
return ret; |
|
} |
|
|
|
fbi->shannon_lcden = gpiod_get_optional(&pdev->dev, "shannon-lcden", |
|
GPIOD_OUT_LOW); |
|
if (IS_ERR(fbi->shannon_lcden)) |
|
return PTR_ERR(fbi->shannon_lcden); |
|
|
|
/* Initialize video memory */ |
|
ret = sa1100fb_map_video_memory(fbi); |
|
if (ret) |
|
return ret; |
|
|
|
/* |
|
* This makes sure that our colour bitfield |
|
* descriptors are correctly initialised. |
|
*/ |
|
sa1100fb_check_var(&fbi->fb.var, &fbi->fb); |
|
|
|
platform_set_drvdata(pdev, fbi); |
|
|
|
ret = register_framebuffer(&fbi->fb); |
|
if (ret < 0) { |
|
dma_free_wc(fbi->dev, fbi->map_size, fbi->map_cpu, |
|
fbi->map_dma); |
|
return ret; |
|
} |
|
|
|
#ifdef CONFIG_CPU_FREQ |
|
fbi->freq_transition.notifier_call = sa1100fb_freq_transition; |
|
cpufreq_register_notifier(&fbi->freq_transition, CPUFREQ_TRANSITION_NOTIFIER); |
|
#endif |
|
|
|
/* This driver cannot be unloaded at the moment */ |
|
return 0; |
|
} |
|
|
|
static struct platform_driver sa1100fb_driver = { |
|
.probe = sa1100fb_probe, |
|
.suspend = sa1100fb_suspend, |
|
.resume = sa1100fb_resume, |
|
.driver = { |
|
.name = "sa11x0-fb", |
|
}, |
|
}; |
|
|
|
int __init sa1100fb_init(void) |
|
{ |
|
if (fb_get_options("sa1100fb", NULL)) |
|
return -ENODEV; |
|
|
|
return platform_driver_register(&sa1100fb_driver); |
|
} |
|
|
|
int __init sa1100fb_setup(char *options) |
|
{ |
|
#if 0 |
|
char *this_opt; |
|
|
|
if (!options || !*options) |
|
return 0; |
|
|
|
while ((this_opt = strsep(&options, ",")) != NULL) { |
|
|
|
if (!strncmp(this_opt, "bpp:", 4)) |
|
current_par.max_bpp = |
|
simple_strtoul(this_opt + 4, NULL, 0); |
|
|
|
if (!strncmp(this_opt, "lccr0:", 6)) |
|
lcd_shadow.lccr0 = |
|
simple_strtoul(this_opt + 6, NULL, 0); |
|
if (!strncmp(this_opt, "lccr1:", 6)) { |
|
lcd_shadow.lccr1 = |
|
simple_strtoul(this_opt + 6, NULL, 0); |
|
current_par.max_xres = |
|
(lcd_shadow.lccr1 & 0x3ff) + 16; |
|
} |
|
if (!strncmp(this_opt, "lccr2:", 6)) { |
|
lcd_shadow.lccr2 = |
|
simple_strtoul(this_opt + 6, NULL, 0); |
|
current_par.max_yres = |
|
(lcd_shadow. |
|
lccr0 & LCCR0_SDS) ? ((lcd_shadow. |
|
lccr2 & 0x3ff) + |
|
1) * |
|
2 : ((lcd_shadow.lccr2 & 0x3ff) + 1); |
|
} |
|
if (!strncmp(this_opt, "lccr3:", 6)) |
|
lcd_shadow.lccr3 = |
|
simple_strtoul(this_opt + 6, NULL, 0); |
|
} |
|
#endif |
|
return 0; |
|
} |
|
|
|
module_init(sa1100fb_init); |
|
MODULE_DESCRIPTION("StrongARM-1100/1110 framebuffer driver"); |
|
MODULE_LICENSE("GPL");
|
|
|