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1018 lines
24 KiB
1018 lines
24 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* Copyright (C) 2007,2008 Freescale semiconductor, Inc. |
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* |
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* Author: Li Yang <[email protected]> |
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* Jerry Huang <[email protected]> |
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* |
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* Initialization based on code from Shlomi Gridish. |
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*/ |
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#include <linux/module.h> |
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#include <linux/kernel.h> |
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#include <linux/delay.h> |
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#include <linux/slab.h> |
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#include <linux/proc_fs.h> |
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#include <linux/errno.h> |
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#include <linux/interrupt.h> |
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#include <linux/io.h> |
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#include <linux/timer.h> |
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#include <linux/usb.h> |
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#include <linux/device.h> |
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#include <linux/usb/ch9.h> |
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#include <linux/usb/gadget.h> |
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#include <linux/workqueue.h> |
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#include <linux/time.h> |
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#include <linux/fsl_devices.h> |
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#include <linux/platform_device.h> |
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#include <linux/uaccess.h> |
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#include <asm/unaligned.h> |
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#include "phy-fsl-usb.h" |
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#ifdef VERBOSE |
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#define VDBG(fmt, args...) pr_debug("[%s] " fmt, \ |
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__func__, ## args) |
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#else |
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#define VDBG(stuff...) do {} while (0) |
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#endif |
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#define DRIVER_VERSION "Rev. 1.55" |
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#define DRIVER_AUTHOR "Jerry Huang/Li Yang" |
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#define DRIVER_DESC "Freescale USB OTG Transceiver Driver" |
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#define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION |
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static const char driver_name[] = "fsl-usb2-otg"; |
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const pm_message_t otg_suspend_state = { |
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.event = 1, |
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}; |
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#define HA_DATA_PULSE |
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static struct usb_dr_mmap *usb_dr_regs; |
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static struct fsl_otg *fsl_otg_dev; |
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static int srp_wait_done; |
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/* FSM timers */ |
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struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr, |
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*b_ase0_brst_tmr, *b_se0_srp_tmr; |
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|
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/* Driver specific timers */ |
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struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr, |
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*b_srp_wait_tmr, *a_wait_enum_tmr; |
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static struct list_head active_timers; |
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static const struct fsl_otg_config fsl_otg_initdata = { |
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.otg_port = 1, |
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}; |
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#ifdef CONFIG_PPC32 |
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static u32 _fsl_readl_be(const unsigned __iomem *p) |
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{ |
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return in_be32(p); |
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} |
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static u32 _fsl_readl_le(const unsigned __iomem *p) |
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{ |
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return in_le32(p); |
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} |
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static void _fsl_writel_be(u32 v, unsigned __iomem *p) |
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{ |
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out_be32(p, v); |
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} |
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static void _fsl_writel_le(u32 v, unsigned __iomem *p) |
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{ |
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out_le32(p, v); |
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} |
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static u32 (*_fsl_readl)(const unsigned __iomem *p); |
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static void (*_fsl_writel)(u32 v, unsigned __iomem *p); |
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#define fsl_readl(p) (*_fsl_readl)((p)) |
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#define fsl_writel(v, p) (*_fsl_writel)((v), (p)) |
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#else |
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#define fsl_readl(addr) readl(addr) |
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#define fsl_writel(val, addr) writel(val, addr) |
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#endif /* CONFIG_PPC32 */ |
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int write_ulpi(u8 addr, u8 data) |
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{ |
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u32 temp; |
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temp = 0x60000000 | (addr << 16) | data; |
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fsl_writel(temp, &usb_dr_regs->ulpiview); |
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return 0; |
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} |
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/* -------------------------------------------------------------*/ |
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/* Operations that will be called from OTG Finite State Machine */ |
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|
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/* Charge vbus for vbus pulsing in SRP */ |
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void fsl_otg_chrg_vbus(struct otg_fsm *fsm, int on) |
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{ |
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u32 tmp; |
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tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; |
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if (on) |
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/* stop discharging, start charging */ |
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tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) | |
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OTGSC_CTRL_VBUS_CHARGE; |
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else |
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/* stop charging */ |
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tmp &= ~OTGSC_CTRL_VBUS_CHARGE; |
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fsl_writel(tmp, &usb_dr_regs->otgsc); |
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} |
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/* Discharge vbus through a resistor to ground */ |
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void fsl_otg_dischrg_vbus(int on) |
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{ |
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u32 tmp; |
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tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; |
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if (on) |
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/* stop charging, start discharging */ |
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tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) | |
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OTGSC_CTRL_VBUS_DISCHARGE; |
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else |
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/* stop discharging */ |
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tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE; |
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fsl_writel(tmp, &usb_dr_regs->otgsc); |
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} |
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/* A-device driver vbus, controlled through PP bit in PORTSC */ |
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void fsl_otg_drv_vbus(struct otg_fsm *fsm, int on) |
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{ |
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u32 tmp; |
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if (on) { |
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tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS; |
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fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc); |
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} else { |
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tmp = fsl_readl(&usb_dr_regs->portsc) & |
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~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER; |
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fsl_writel(tmp, &usb_dr_regs->portsc); |
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} |
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} |
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/* |
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* Pull-up D+, signalling connect by periperal. Also used in |
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* data-line pulsing in SRP |
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*/ |
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void fsl_otg_loc_conn(struct otg_fsm *fsm, int on) |
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{ |
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u32 tmp; |
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tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; |
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if (on) |
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tmp |= OTGSC_CTRL_DATA_PULSING; |
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else |
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tmp &= ~OTGSC_CTRL_DATA_PULSING; |
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fsl_writel(tmp, &usb_dr_regs->otgsc); |
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} |
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/* |
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* Generate SOF by host. This is controlled through suspend/resume the |
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* port. In host mode, controller will automatically send SOF. |
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* Suspend will block the data on the port. |
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*/ |
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void fsl_otg_loc_sof(struct otg_fsm *fsm, int on) |
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{ |
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u32 tmp; |
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tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS; |
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if (on) |
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tmp |= PORTSC_PORT_FORCE_RESUME; |
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else |
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tmp |= PORTSC_PORT_SUSPEND; |
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fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc); |
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} |
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/* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */ |
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void fsl_otg_start_pulse(struct otg_fsm *fsm) |
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{ |
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u32 tmp; |
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srp_wait_done = 0; |
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#ifdef HA_DATA_PULSE |
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tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; |
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tmp |= OTGSC_HA_DATA_PULSE; |
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fsl_writel(tmp, &usb_dr_regs->otgsc); |
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#else |
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fsl_otg_loc_conn(1); |
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#endif |
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fsl_otg_add_timer(fsm, b_data_pulse_tmr); |
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} |
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void b_data_pulse_end(unsigned long foo) |
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{ |
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#ifdef HA_DATA_PULSE |
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#else |
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fsl_otg_loc_conn(0); |
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#endif |
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/* Do VBUS pulse after data pulse */ |
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fsl_otg_pulse_vbus(); |
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} |
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void fsl_otg_pulse_vbus(void) |
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{ |
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srp_wait_done = 0; |
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fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 1); |
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/* start the timer to end vbus charge */ |
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fsl_otg_add_timer(&fsl_otg_dev->fsm, b_vbus_pulse_tmr); |
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} |
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void b_vbus_pulse_end(unsigned long foo) |
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{ |
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fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 0); |
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|
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/* |
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* As USB3300 using the same a_sess_vld and b_sess_vld voltage |
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* we need to discharge the bus for a while to distinguish |
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* residual voltage of vbus pulsing and A device pull up |
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*/ |
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fsl_otg_dischrg_vbus(1); |
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fsl_otg_add_timer(&fsl_otg_dev->fsm, b_srp_wait_tmr); |
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} |
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void b_srp_end(unsigned long foo) |
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{ |
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fsl_otg_dischrg_vbus(0); |
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srp_wait_done = 1; |
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if ((fsl_otg_dev->phy.otg->state == OTG_STATE_B_SRP_INIT) && |
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fsl_otg_dev->fsm.b_sess_vld) |
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fsl_otg_dev->fsm.b_srp_done = 1; |
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} |
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/* |
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* Workaround for a_host suspending too fast. When a_bus_req=0, |
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* a_host will start by SRP. It needs to set b_hnp_enable before |
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* actually suspending to start HNP |
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*/ |
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void a_wait_enum(unsigned long foo) |
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{ |
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VDBG("a_wait_enum timeout\n"); |
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if (!fsl_otg_dev->phy.otg->host->b_hnp_enable) |
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fsl_otg_add_timer(&fsl_otg_dev->fsm, a_wait_enum_tmr); |
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else |
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otg_statemachine(&fsl_otg_dev->fsm); |
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} |
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/* The timeout callback function to set time out bit */ |
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void set_tmout(unsigned long indicator) |
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{ |
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*(int *)indicator = 1; |
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} |
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/* Initialize timers */ |
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int fsl_otg_init_timers(struct otg_fsm *fsm) |
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{ |
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/* FSM used timers */ |
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a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE, |
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(unsigned long)&fsm->a_wait_vrise_tmout); |
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if (!a_wait_vrise_tmr) |
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return -ENOMEM; |
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a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON, |
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(unsigned long)&fsm->a_wait_bcon_tmout); |
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if (!a_wait_bcon_tmr) |
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return -ENOMEM; |
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a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS, |
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(unsigned long)&fsm->a_aidl_bdis_tmout); |
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if (!a_aidl_bdis_tmr) |
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return -ENOMEM; |
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b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST, |
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(unsigned long)&fsm->b_ase0_brst_tmout); |
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if (!b_ase0_brst_tmr) |
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return -ENOMEM; |
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b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP, |
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(unsigned long)&fsm->b_se0_srp); |
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if (!b_se0_srp_tmr) |
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return -ENOMEM; |
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b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL, |
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(unsigned long)&fsm->b_srp_done); |
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if (!b_srp_fail_tmr) |
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return -ENOMEM; |
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a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10, |
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(unsigned long)&fsm); |
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if (!a_wait_enum_tmr) |
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return -ENOMEM; |
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/* device driver used timers */ |
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b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0); |
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if (!b_srp_wait_tmr) |
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return -ENOMEM; |
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b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end, |
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TB_DATA_PLS, 0); |
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if (!b_data_pulse_tmr) |
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return -ENOMEM; |
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b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end, |
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TB_VBUS_PLS, 0); |
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if (!b_vbus_pulse_tmr) |
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return -ENOMEM; |
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return 0; |
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} |
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/* Uninitialize timers */ |
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void fsl_otg_uninit_timers(void) |
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{ |
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/* FSM used timers */ |
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kfree(a_wait_vrise_tmr); |
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kfree(a_wait_bcon_tmr); |
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kfree(a_aidl_bdis_tmr); |
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kfree(b_ase0_brst_tmr); |
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kfree(b_se0_srp_tmr); |
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kfree(b_srp_fail_tmr); |
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kfree(a_wait_enum_tmr); |
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|
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/* device driver used timers */ |
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kfree(b_srp_wait_tmr); |
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kfree(b_data_pulse_tmr); |
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kfree(b_vbus_pulse_tmr); |
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} |
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static struct fsl_otg_timer *fsl_otg_get_timer(enum otg_fsm_timer t) |
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{ |
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struct fsl_otg_timer *timer; |
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|
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/* REVISIT: use array of pointers to timers instead */ |
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switch (t) { |
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case A_WAIT_VRISE: |
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timer = a_wait_vrise_tmr; |
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break; |
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case A_WAIT_BCON: |
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timer = a_wait_vrise_tmr; |
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break; |
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case A_AIDL_BDIS: |
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timer = a_wait_vrise_tmr; |
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break; |
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case B_ASE0_BRST: |
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timer = a_wait_vrise_tmr; |
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break; |
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case B_SE0_SRP: |
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timer = a_wait_vrise_tmr; |
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break; |
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case B_SRP_FAIL: |
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timer = a_wait_vrise_tmr; |
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break; |
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case A_WAIT_ENUM: |
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timer = a_wait_vrise_tmr; |
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break; |
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default: |
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timer = NULL; |
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} |
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return timer; |
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} |
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/* Add timer to timer list */ |
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void fsl_otg_add_timer(struct otg_fsm *fsm, void *gtimer) |
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{ |
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struct fsl_otg_timer *timer = gtimer; |
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struct fsl_otg_timer *tmp_timer; |
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|
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/* |
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* Check if the timer is already in the active list, |
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* if so update timer count |
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*/ |
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list_for_each_entry(tmp_timer, &active_timers, list) |
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if (tmp_timer == timer) { |
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timer->count = timer->expires; |
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return; |
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} |
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timer->count = timer->expires; |
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list_add_tail(&timer->list, &active_timers); |
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} |
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static void fsl_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t) |
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{ |
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struct fsl_otg_timer *timer; |
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timer = fsl_otg_get_timer(t); |
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if (!timer) |
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return; |
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fsl_otg_add_timer(fsm, timer); |
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} |
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/* Remove timer from the timer list; clear timeout status */ |
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void fsl_otg_del_timer(struct otg_fsm *fsm, void *gtimer) |
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{ |
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struct fsl_otg_timer *timer = gtimer; |
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struct fsl_otg_timer *tmp_timer, *del_tmp; |
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list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) |
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if (tmp_timer == timer) |
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list_del(&timer->list); |
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} |
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static void fsl_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t) |
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{ |
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struct fsl_otg_timer *timer; |
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|
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timer = fsl_otg_get_timer(t); |
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if (!timer) |
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return; |
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|
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fsl_otg_del_timer(fsm, timer); |
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} |
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/* Reset controller, not reset the bus */ |
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void otg_reset_controller(void) |
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{ |
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u32 command; |
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|
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command = fsl_readl(&usb_dr_regs->usbcmd); |
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command |= (1 << 1); |
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fsl_writel(command, &usb_dr_regs->usbcmd); |
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while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1)) |
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; |
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} |
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|
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/* Call suspend/resume routines in host driver */ |
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int fsl_otg_start_host(struct otg_fsm *fsm, int on) |
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{ |
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struct usb_otg *otg = fsm->otg; |
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struct device *dev; |
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struct fsl_otg *otg_dev = |
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container_of(otg->usb_phy, struct fsl_otg, phy); |
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u32 retval = 0; |
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|
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if (!otg->host) |
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return -ENODEV; |
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dev = otg->host->controller; |
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|
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/* |
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* Update a_vbus_vld state as a_vbus_vld int is disabled |
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* in device mode |
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*/ |
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fsm->a_vbus_vld = |
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!!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID); |
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if (on) { |
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/* start fsl usb host controller */ |
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if (otg_dev->host_working) |
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goto end; |
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else { |
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otg_reset_controller(); |
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VDBG("host on......\n"); |
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if (dev->driver->pm && dev->driver->pm->resume) { |
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retval = dev->driver->pm->resume(dev); |
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if (fsm->id) { |
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/* default-b */ |
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fsl_otg_drv_vbus(fsm, 1); |
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/* |
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* Workaround: b_host can't driver |
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* vbus, but PP in PORTSC needs to |
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* be 1 for host to work. |
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* So we set drv_vbus bit in |
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* transceiver to 0 thru ULPI. |
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*/ |
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write_ulpi(0x0c, 0x20); |
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} |
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} |
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|
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otg_dev->host_working = 1; |
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} |
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} else { |
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/* stop fsl usb host controller */ |
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if (!otg_dev->host_working) |
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goto end; |
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else { |
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VDBG("host off......\n"); |
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if (dev && dev->driver) { |
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if (dev->driver->pm && dev->driver->pm->suspend) |
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retval = dev->driver->pm->suspend(dev); |
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if (fsm->id) |
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/* default-b */ |
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fsl_otg_drv_vbus(fsm, 0); |
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} |
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otg_dev->host_working = 0; |
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} |
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} |
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end: |
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return retval; |
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} |
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|
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/* |
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* Call suspend and resume function in udc driver |
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* to stop and start udc driver. |
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*/ |
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int fsl_otg_start_gadget(struct otg_fsm *fsm, int on) |
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{ |
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struct usb_otg *otg = fsm->otg; |
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struct device *dev; |
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|
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if (!otg->gadget || !otg->gadget->dev.parent) |
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return -ENODEV; |
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|
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VDBG("gadget %s\n", on ? "on" : "off"); |
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dev = otg->gadget->dev.parent; |
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|
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if (on) { |
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if (dev->driver->resume) |
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dev->driver->resume(dev); |
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} else { |
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if (dev->driver->suspend) |
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dev->driver->suspend(dev, otg_suspend_state); |
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} |
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|
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return 0; |
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} |
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|
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/* |
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* Called by initialization code of host driver. Register host controller |
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* to the OTG. Suspend host for OTG role detection. |
|
*/ |
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static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host) |
|
{ |
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struct fsl_otg *otg_dev; |
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|
|
if (!otg) |
|
return -ENODEV; |
|
|
|
otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
|
if (otg_dev != fsl_otg_dev) |
|
return -ENODEV; |
|
|
|
otg->host = host; |
|
|
|
otg_dev->fsm.a_bus_drop = 0; |
|
otg_dev->fsm.a_bus_req = 1; |
|
|
|
if (host) { |
|
VDBG("host off......\n"); |
|
|
|
otg->host->otg_port = fsl_otg_initdata.otg_port; |
|
otg->host->is_b_host = otg_dev->fsm.id; |
|
/* |
|
* must leave time for hub_wq to finish its thing |
|
* before yanking the host driver out from under it, |
|
* so suspend the host after a short delay. |
|
*/ |
|
otg_dev->host_working = 1; |
|
schedule_delayed_work(&otg_dev->otg_event, 100); |
|
return 0; |
|
} else { |
|
/* host driver going away */ |
|
if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) & |
|
OTGSC_STS_USB_ID)) { |
|
/* Mini-A cable connected */ |
|
struct otg_fsm *fsm = &otg_dev->fsm; |
|
|
|
otg->state = OTG_STATE_UNDEFINED; |
|
fsm->protocol = PROTO_UNDEF; |
|
} |
|
} |
|
|
|
otg_dev->host_working = 0; |
|
|
|
otg_statemachine(&otg_dev->fsm); |
|
|
|
return 0; |
|
} |
|
|
|
/* Called by initialization code of udc. Register udc to OTG. */ |
|
static int fsl_otg_set_peripheral(struct usb_otg *otg, |
|
struct usb_gadget *gadget) |
|
{ |
|
struct fsl_otg *otg_dev; |
|
|
|
if (!otg) |
|
return -ENODEV; |
|
|
|
otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
|
VDBG("otg_dev 0x%x\n", (int)otg_dev); |
|
VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev); |
|
if (otg_dev != fsl_otg_dev) |
|
return -ENODEV; |
|
|
|
if (!gadget) { |
|
if (!otg->default_a) |
|
otg->gadget->ops->vbus_draw(otg->gadget, 0); |
|
usb_gadget_vbus_disconnect(otg->gadget); |
|
otg->gadget = 0; |
|
otg_dev->fsm.b_bus_req = 0; |
|
otg_statemachine(&otg_dev->fsm); |
|
return 0; |
|
} |
|
|
|
otg->gadget = gadget; |
|
otg->gadget->is_a_peripheral = !otg_dev->fsm.id; |
|
|
|
otg_dev->fsm.b_bus_req = 1; |
|
|
|
/* start the gadget right away if the ID pin says Mini-B */ |
|
pr_debug("ID pin=%d\n", otg_dev->fsm.id); |
|
if (otg_dev->fsm.id == 1) { |
|
fsl_otg_start_host(&otg_dev->fsm, 0); |
|
otg_drv_vbus(&otg_dev->fsm, 0); |
|
fsl_otg_start_gadget(&otg_dev->fsm, 1); |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
/* |
|
* Delayed pin detect interrupt processing. |
|
* |
|
* When the Mini-A cable is disconnected from the board, |
|
* the pin-detect interrupt happens before the disconnect |
|
* interrupts for the connected device(s). In order to |
|
* process the disconnect interrupt(s) prior to switching |
|
* roles, the pin-detect interrupts are delayed, and handled |
|
* by this routine. |
|
*/ |
|
static void fsl_otg_event(struct work_struct *work) |
|
{ |
|
struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work); |
|
struct otg_fsm *fsm = &og->fsm; |
|
|
|
if (fsm->id) { /* switch to gadget */ |
|
fsl_otg_start_host(fsm, 0); |
|
otg_drv_vbus(fsm, 0); |
|
fsl_otg_start_gadget(fsm, 1); |
|
} |
|
} |
|
|
|
/* B-device start SRP */ |
|
static int fsl_otg_start_srp(struct usb_otg *otg) |
|
{ |
|
struct fsl_otg *otg_dev; |
|
|
|
if (!otg || otg->state != OTG_STATE_B_IDLE) |
|
return -ENODEV; |
|
|
|
otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
|
if (otg_dev != fsl_otg_dev) |
|
return -ENODEV; |
|
|
|
otg_dev->fsm.b_bus_req = 1; |
|
otg_statemachine(&otg_dev->fsm); |
|
|
|
return 0; |
|
} |
|
|
|
/* A_host suspend will call this function to start hnp */ |
|
static int fsl_otg_start_hnp(struct usb_otg *otg) |
|
{ |
|
struct fsl_otg *otg_dev; |
|
|
|
if (!otg) |
|
return -ENODEV; |
|
|
|
otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
|
if (otg_dev != fsl_otg_dev) |
|
return -ENODEV; |
|
|
|
pr_debug("start_hnp...\n"); |
|
|
|
/* clear a_bus_req to enter a_suspend state */ |
|
otg_dev->fsm.a_bus_req = 0; |
|
otg_statemachine(&otg_dev->fsm); |
|
|
|
return 0; |
|
} |
|
|
|
/* |
|
* Interrupt handler. OTG/host/peripheral share the same int line. |
|
* OTG driver clears OTGSC interrupts and leaves USB interrupts |
|
* intact. It needs to have knowledge of some USB interrupts |
|
* such as port change. |
|
*/ |
|
irqreturn_t fsl_otg_isr(int irq, void *dev_id) |
|
{ |
|
struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm; |
|
struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg; |
|
u32 otg_int_src, otg_sc; |
|
|
|
otg_sc = fsl_readl(&usb_dr_regs->otgsc); |
|
otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8); |
|
|
|
/* Only clear otg interrupts */ |
|
fsl_writel(otg_sc, &usb_dr_regs->otgsc); |
|
|
|
/*FIXME: ID change not generate when init to 0 */ |
|
fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0; |
|
otg->default_a = (fsm->id == 0); |
|
|
|
/* process OTG interrupts */ |
|
if (otg_int_src) { |
|
if (otg_int_src & OTGSC_INTSTS_USB_ID) { |
|
fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0; |
|
otg->default_a = (fsm->id == 0); |
|
/* clear conn information */ |
|
if (fsm->id) |
|
fsm->b_conn = 0; |
|
else |
|
fsm->a_conn = 0; |
|
|
|
if (otg->host) |
|
otg->host->is_b_host = fsm->id; |
|
if (otg->gadget) |
|
otg->gadget->is_a_peripheral = !fsm->id; |
|
VDBG("ID int (ID is %d)\n", fsm->id); |
|
|
|
if (fsm->id) { /* switch to gadget */ |
|
schedule_delayed_work( |
|
&((struct fsl_otg *)dev_id)->otg_event, |
|
100); |
|
} else { /* switch to host */ |
|
cancel_delayed_work(& |
|
((struct fsl_otg *)dev_id)-> |
|
otg_event); |
|
fsl_otg_start_gadget(fsm, 0); |
|
otg_drv_vbus(fsm, 1); |
|
fsl_otg_start_host(fsm, 1); |
|
} |
|
return IRQ_HANDLED; |
|
} |
|
} |
|
return IRQ_NONE; |
|
} |
|
|
|
static struct otg_fsm_ops fsl_otg_ops = { |
|
.chrg_vbus = fsl_otg_chrg_vbus, |
|
.drv_vbus = fsl_otg_drv_vbus, |
|
.loc_conn = fsl_otg_loc_conn, |
|
.loc_sof = fsl_otg_loc_sof, |
|
.start_pulse = fsl_otg_start_pulse, |
|
|
|
.add_timer = fsl_otg_fsm_add_timer, |
|
.del_timer = fsl_otg_fsm_del_timer, |
|
|
|
.start_host = fsl_otg_start_host, |
|
.start_gadget = fsl_otg_start_gadget, |
|
}; |
|
|
|
/* Initialize the global variable fsl_otg_dev and request IRQ for OTG */ |
|
static int fsl_otg_conf(struct platform_device *pdev) |
|
{ |
|
struct fsl_otg *fsl_otg_tc; |
|
int status; |
|
|
|
if (fsl_otg_dev) |
|
return 0; |
|
|
|
/* allocate space to fsl otg device */ |
|
fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL); |
|
if (!fsl_otg_tc) |
|
return -ENOMEM; |
|
|
|
fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL); |
|
if (!fsl_otg_tc->phy.otg) { |
|
kfree(fsl_otg_tc); |
|
return -ENOMEM; |
|
} |
|
|
|
INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event); |
|
|
|
INIT_LIST_HEAD(&active_timers); |
|
status = fsl_otg_init_timers(&fsl_otg_tc->fsm); |
|
if (status) { |
|
pr_info("Couldn't init OTG timers\n"); |
|
goto err; |
|
} |
|
mutex_init(&fsl_otg_tc->fsm.lock); |
|
|
|
/* Set OTG state machine operations */ |
|
fsl_otg_tc->fsm.ops = &fsl_otg_ops; |
|
|
|
/* initialize the otg structure */ |
|
fsl_otg_tc->phy.label = DRIVER_DESC; |
|
fsl_otg_tc->phy.dev = &pdev->dev; |
|
|
|
fsl_otg_tc->phy.otg->usb_phy = &fsl_otg_tc->phy; |
|
fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host; |
|
fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral; |
|
fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp; |
|
fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp; |
|
|
|
fsl_otg_dev = fsl_otg_tc; |
|
|
|
/* Store the otg transceiver */ |
|
status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2); |
|
if (status) { |
|
pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n"); |
|
goto err; |
|
} |
|
|
|
return 0; |
|
err: |
|
fsl_otg_uninit_timers(); |
|
kfree(fsl_otg_tc->phy.otg); |
|
kfree(fsl_otg_tc); |
|
return status; |
|
} |
|
|
|
/* OTG Initialization */ |
|
int usb_otg_start(struct platform_device *pdev) |
|
{ |
|
struct fsl_otg *p_otg; |
|
struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2); |
|
struct otg_fsm *fsm; |
|
int status; |
|
struct resource *res; |
|
u32 temp; |
|
struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev); |
|
|
|
p_otg = container_of(otg_trans, struct fsl_otg, phy); |
|
fsm = &p_otg->fsm; |
|
|
|
/* Initialize the state machine structure with default values */ |
|
SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED); |
|
fsm->otg = p_otg->phy.otg; |
|
|
|
/* We don't require predefined MEM/IRQ resource index */ |
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
|
if (!res) |
|
return -ENXIO; |
|
|
|
/* We don't request_mem_region here to enable resource sharing |
|
* with host/device */ |
|
|
|
usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap)); |
|
p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs; |
|
pdata->regs = (void *)usb_dr_regs; |
|
|
|
if (pdata->init && pdata->init(pdev) != 0) |
|
return -EINVAL; |
|
|
|
#ifdef CONFIG_PPC32 |
|
if (pdata->big_endian_mmio) { |
|
_fsl_readl = _fsl_readl_be; |
|
_fsl_writel = _fsl_writel_be; |
|
} else { |
|
_fsl_readl = _fsl_readl_le; |
|
_fsl_writel = _fsl_writel_le; |
|
} |
|
#endif |
|
|
|
/* request irq */ |
|
p_otg->irq = platform_get_irq(pdev, 0); |
|
if (p_otg->irq < 0) |
|
return p_otg->irq; |
|
status = request_irq(p_otg->irq, fsl_otg_isr, |
|
IRQF_SHARED, driver_name, p_otg); |
|
if (status) { |
|
dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n", |
|
p_otg->irq, status); |
|
iounmap(p_otg->dr_mem_map); |
|
kfree(p_otg->phy.otg); |
|
kfree(p_otg); |
|
return status; |
|
} |
|
|
|
/* stop the controller */ |
|
temp = fsl_readl(&p_otg->dr_mem_map->usbcmd); |
|
temp &= ~USB_CMD_RUN_STOP; |
|
fsl_writel(temp, &p_otg->dr_mem_map->usbcmd); |
|
|
|
/* reset the controller */ |
|
temp = fsl_readl(&p_otg->dr_mem_map->usbcmd); |
|
temp |= USB_CMD_CTRL_RESET; |
|
fsl_writel(temp, &p_otg->dr_mem_map->usbcmd); |
|
|
|
/* wait reset completed */ |
|
while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET) |
|
; |
|
|
|
/* configure the VBUSHS as IDLE(both host and device) */ |
|
temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0); |
|
fsl_writel(temp, &p_otg->dr_mem_map->usbmode); |
|
|
|
/* configure PHY interface */ |
|
temp = fsl_readl(&p_otg->dr_mem_map->portsc); |
|
temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW); |
|
switch (pdata->phy_mode) { |
|
case FSL_USB2_PHY_ULPI: |
|
temp |= PORTSC_PTS_ULPI; |
|
break; |
|
case FSL_USB2_PHY_UTMI_WIDE: |
|
temp |= PORTSC_PTW_16BIT; |
|
fallthrough; |
|
case FSL_USB2_PHY_UTMI: |
|
temp |= PORTSC_PTS_UTMI; |
|
fallthrough; |
|
default: |
|
break; |
|
} |
|
fsl_writel(temp, &p_otg->dr_mem_map->portsc); |
|
|
|
if (pdata->have_sysif_regs) { |
|
/* configure control enable IO output, big endian register */ |
|
temp = __raw_readl(&p_otg->dr_mem_map->control); |
|
temp |= USB_CTRL_IOENB; |
|
__raw_writel(temp, &p_otg->dr_mem_map->control); |
|
} |
|
|
|
/* disable all interrupt and clear all OTGSC status */ |
|
temp = fsl_readl(&p_otg->dr_mem_map->otgsc); |
|
temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK; |
|
temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE; |
|
fsl_writel(temp, &p_otg->dr_mem_map->otgsc); |
|
|
|
/* |
|
* The identification (id) input is FALSE when a Mini-A plug is inserted |
|
* in the devices Mini-AB receptacle. Otherwise, this input is TRUE. |
|
* Also: record initial state of ID pin |
|
*/ |
|
if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) { |
|
p_otg->phy.otg->state = OTG_STATE_UNDEFINED; |
|
p_otg->fsm.id = 1; |
|
} else { |
|
p_otg->phy.otg->state = OTG_STATE_A_IDLE; |
|
p_otg->fsm.id = 0; |
|
} |
|
|
|
pr_debug("initial ID pin=%d\n", p_otg->fsm.id); |
|
|
|
/* enable OTG ID pin interrupt */ |
|
temp = fsl_readl(&p_otg->dr_mem_map->otgsc); |
|
temp |= OTGSC_INTR_USB_ID_EN; |
|
temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN); |
|
fsl_writel(temp, &p_otg->dr_mem_map->otgsc); |
|
|
|
return 0; |
|
} |
|
|
|
static int fsl_otg_probe(struct platform_device *pdev) |
|
{ |
|
int ret; |
|
|
|
if (!dev_get_platdata(&pdev->dev)) |
|
return -ENODEV; |
|
|
|
/* configure the OTG */ |
|
ret = fsl_otg_conf(pdev); |
|
if (ret) { |
|
dev_err(&pdev->dev, "Couldn't configure OTG module\n"); |
|
return ret; |
|
} |
|
|
|
/* start OTG */ |
|
ret = usb_otg_start(pdev); |
|
if (ret) { |
|
dev_err(&pdev->dev, "Can't init FSL OTG device\n"); |
|
return ret; |
|
} |
|
|
|
return ret; |
|
} |
|
|
|
static int fsl_otg_remove(struct platform_device *pdev) |
|
{ |
|
struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev); |
|
|
|
usb_remove_phy(&fsl_otg_dev->phy); |
|
free_irq(fsl_otg_dev->irq, fsl_otg_dev); |
|
|
|
iounmap((void *)usb_dr_regs); |
|
|
|
fsl_otg_uninit_timers(); |
|
kfree(fsl_otg_dev->phy.otg); |
|
kfree(fsl_otg_dev); |
|
|
|
if (pdata->exit) |
|
pdata->exit(pdev); |
|
|
|
return 0; |
|
} |
|
|
|
struct platform_driver fsl_otg_driver = { |
|
.probe = fsl_otg_probe, |
|
.remove = fsl_otg_remove, |
|
.driver = { |
|
.name = driver_name, |
|
.owner = THIS_MODULE, |
|
}, |
|
}; |
|
|
|
module_platform_driver(fsl_otg_driver); |
|
|
|
MODULE_DESCRIPTION(DRIVER_INFO); |
|
MODULE_AUTHOR(DRIVER_AUTHOR); |
|
MODULE_LICENSE("GPL");
|
|
|