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637 lines
16 KiB
637 lines
16 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* An I2C driver for the PCF85063 RTC |
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* Copyright 2014 Rose Technology |
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* |
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* Author: Søren Andersen <[email protected]> |
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* Maintainers: http://www.nslu2-linux.org/ |
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* |
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* Copyright (C) 2019 Micro Crystal AG |
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* Author: Alexandre Belloni <[email protected]> |
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*/ |
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#include <linux/clk-provider.h> |
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#include <linux/i2c.h> |
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#include <linux/bcd.h> |
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#include <linux/rtc.h> |
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#include <linux/module.h> |
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#include <linux/of_device.h> |
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#include <linux/pm_wakeirq.h> |
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#include <linux/regmap.h> |
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|
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/* |
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* Information for this driver was pulled from the following datasheets. |
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* |
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* https://www.nxp.com/docs/en/data-sheet/PCF85063A.pdf |
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* https://www.nxp.com/docs/en/data-sheet/PCF85063TP.pdf |
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* |
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* PCF85063A -- Rev. 7 — 30 March 2018 |
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* PCF85063TP -- Rev. 4 — 6 May 2015 |
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* |
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* https://www.microcrystal.com/fileadmin/Media/Products/RTC/App.Manual/RV-8263-C7_App-Manual.pdf |
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* RV8263 -- Rev. 1.0 — January 2019 |
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*/ |
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#define PCF85063_REG_CTRL1 0x00 /* status */ |
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#define PCF85063_REG_CTRL1_CAP_SEL BIT(0) |
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#define PCF85063_REG_CTRL1_STOP BIT(5) |
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#define PCF85063_REG_CTRL1_EXT_TEST BIT(7) |
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#define PCF85063_REG_CTRL2 0x01 |
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#define PCF85063_CTRL2_AF BIT(6) |
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#define PCF85063_CTRL2_AIE BIT(7) |
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#define PCF85063_REG_OFFSET 0x02 |
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#define PCF85063_OFFSET_SIGN_BIT 6 /* 2's complement sign bit */ |
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#define PCF85063_OFFSET_MODE BIT(7) |
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#define PCF85063_OFFSET_STEP0 4340 |
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#define PCF85063_OFFSET_STEP1 4069 |
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#define PCF85063_REG_CLKO_F_MASK 0x07 /* frequency mask */ |
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#define PCF85063_REG_CLKO_F_32768HZ 0x00 |
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#define PCF85063_REG_CLKO_F_OFF 0x07 |
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#define PCF85063_REG_RAM 0x03 |
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#define PCF85063_REG_SC 0x04 /* datetime */ |
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#define PCF85063_REG_SC_OS 0x80 |
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#define PCF85063_REG_ALM_S 0x0b |
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#define PCF85063_AEN BIT(7) |
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struct pcf85063_config { |
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struct regmap_config regmap; |
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unsigned has_alarms:1; |
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unsigned force_cap_7000:1; |
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}; |
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struct pcf85063 { |
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struct rtc_device *rtc; |
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struct regmap *regmap; |
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#ifdef CONFIG_COMMON_CLK |
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struct clk_hw clkout_hw; |
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#endif |
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}; |
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static int pcf85063_rtc_read_time(struct device *dev, struct rtc_time *tm) |
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{ |
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struct pcf85063 *pcf85063 = dev_get_drvdata(dev); |
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int rc; |
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u8 regs[7]; |
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/* |
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* while reading, the time/date registers are blocked and not updated |
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* anymore until the access is finished. To not lose a second |
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* event, the access must be finished within one second. So, read all |
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* time/date registers in one turn. |
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*/ |
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rc = regmap_bulk_read(pcf85063->regmap, PCF85063_REG_SC, regs, |
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sizeof(regs)); |
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if (rc) |
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return rc; |
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/* if the clock has lost its power it makes no sense to use its time */ |
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if (regs[0] & PCF85063_REG_SC_OS) { |
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dev_warn(&pcf85063->rtc->dev, "Power loss detected, invalid time\n"); |
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return -EINVAL; |
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} |
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tm->tm_sec = bcd2bin(regs[0] & 0x7F); |
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tm->tm_min = bcd2bin(regs[1] & 0x7F); |
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tm->tm_hour = bcd2bin(regs[2] & 0x3F); /* rtc hr 0-23 */ |
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tm->tm_mday = bcd2bin(regs[3] & 0x3F); |
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tm->tm_wday = regs[4] & 0x07; |
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tm->tm_mon = bcd2bin(regs[5] & 0x1F) - 1; /* rtc mn 1-12 */ |
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tm->tm_year = bcd2bin(regs[6]); |
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tm->tm_year += 100; |
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return 0; |
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} |
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static int pcf85063_rtc_set_time(struct device *dev, struct rtc_time *tm) |
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{ |
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struct pcf85063 *pcf85063 = dev_get_drvdata(dev); |
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int rc; |
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u8 regs[7]; |
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/* |
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* to accurately set the time, reset the divider chain and keep it in |
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* reset state until all time/date registers are written |
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*/ |
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rc = regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL1, |
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PCF85063_REG_CTRL1_EXT_TEST | |
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PCF85063_REG_CTRL1_STOP, |
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PCF85063_REG_CTRL1_STOP); |
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if (rc) |
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return rc; |
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/* hours, minutes and seconds */ |
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regs[0] = bin2bcd(tm->tm_sec) & 0x7F; /* clear OS flag */ |
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regs[1] = bin2bcd(tm->tm_min); |
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regs[2] = bin2bcd(tm->tm_hour); |
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/* Day of month, 1 - 31 */ |
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regs[3] = bin2bcd(tm->tm_mday); |
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/* Day, 0 - 6 */ |
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regs[4] = tm->tm_wday & 0x07; |
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/* month, 1 - 12 */ |
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regs[5] = bin2bcd(tm->tm_mon + 1); |
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/* year and century */ |
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regs[6] = bin2bcd(tm->tm_year - 100); |
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/* write all registers at once */ |
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rc = regmap_bulk_write(pcf85063->regmap, PCF85063_REG_SC, |
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regs, sizeof(regs)); |
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if (rc) |
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return rc; |
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/* |
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* Write the control register as a separate action since the size of |
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* the register space is different between the PCF85063TP and |
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* PCF85063A devices. The rollover point can not be used. |
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*/ |
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return regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL1, |
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PCF85063_REG_CTRL1_STOP, 0); |
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} |
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static int pcf85063_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
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{ |
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struct pcf85063 *pcf85063 = dev_get_drvdata(dev); |
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u8 buf[4]; |
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unsigned int val; |
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int ret; |
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ret = regmap_bulk_read(pcf85063->regmap, PCF85063_REG_ALM_S, |
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buf, sizeof(buf)); |
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if (ret) |
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return ret; |
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alrm->time.tm_sec = bcd2bin(buf[0]); |
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alrm->time.tm_min = bcd2bin(buf[1]); |
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alrm->time.tm_hour = bcd2bin(buf[2]); |
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alrm->time.tm_mday = bcd2bin(buf[3]); |
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ret = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL2, &val); |
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if (ret) |
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return ret; |
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alrm->enabled = !!(val & PCF85063_CTRL2_AIE); |
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return 0; |
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} |
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static int pcf85063_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
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{ |
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struct pcf85063 *pcf85063 = dev_get_drvdata(dev); |
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u8 buf[5]; |
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int ret; |
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buf[0] = bin2bcd(alrm->time.tm_sec); |
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buf[1] = bin2bcd(alrm->time.tm_min); |
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buf[2] = bin2bcd(alrm->time.tm_hour); |
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buf[3] = bin2bcd(alrm->time.tm_mday); |
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buf[4] = PCF85063_AEN; /* Do not match on week day */ |
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ret = regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL2, |
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PCF85063_CTRL2_AIE | PCF85063_CTRL2_AF, 0); |
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if (ret) |
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return ret; |
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ret = regmap_bulk_write(pcf85063->regmap, PCF85063_REG_ALM_S, |
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buf, sizeof(buf)); |
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if (ret) |
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return ret; |
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return regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL2, |
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PCF85063_CTRL2_AIE | PCF85063_CTRL2_AF, |
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alrm->enabled ? PCF85063_CTRL2_AIE | PCF85063_CTRL2_AF : PCF85063_CTRL2_AF); |
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} |
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static int pcf85063_rtc_alarm_irq_enable(struct device *dev, |
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unsigned int enabled) |
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{ |
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struct pcf85063 *pcf85063 = dev_get_drvdata(dev); |
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return regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL2, |
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PCF85063_CTRL2_AIE, |
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enabled ? PCF85063_CTRL2_AIE : 0); |
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} |
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static irqreturn_t pcf85063_rtc_handle_irq(int irq, void *dev_id) |
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{ |
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struct pcf85063 *pcf85063 = dev_id; |
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unsigned int val; |
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int err; |
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err = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL2, &val); |
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if (err) |
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return IRQ_NONE; |
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if (val & PCF85063_CTRL2_AF) { |
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rtc_update_irq(pcf85063->rtc, 1, RTC_IRQF | RTC_AF); |
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regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL2, |
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PCF85063_CTRL2_AIE | PCF85063_CTRL2_AF, |
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0); |
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return IRQ_HANDLED; |
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} |
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return IRQ_NONE; |
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} |
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static int pcf85063_read_offset(struct device *dev, long *offset) |
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{ |
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struct pcf85063 *pcf85063 = dev_get_drvdata(dev); |
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long val; |
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u32 reg; |
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int ret; |
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ret = regmap_read(pcf85063->regmap, PCF85063_REG_OFFSET, ®); |
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if (ret < 0) |
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return ret; |
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val = sign_extend32(reg & ~PCF85063_OFFSET_MODE, |
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PCF85063_OFFSET_SIGN_BIT); |
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if (reg & PCF85063_OFFSET_MODE) |
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*offset = val * PCF85063_OFFSET_STEP1; |
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else |
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*offset = val * PCF85063_OFFSET_STEP0; |
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return 0; |
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} |
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static int pcf85063_set_offset(struct device *dev, long offset) |
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{ |
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struct pcf85063 *pcf85063 = dev_get_drvdata(dev); |
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s8 mode0, mode1, reg; |
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unsigned int error0, error1; |
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if (offset > PCF85063_OFFSET_STEP0 * 63) |
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return -ERANGE; |
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if (offset < PCF85063_OFFSET_STEP0 * -64) |
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return -ERANGE; |
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mode0 = DIV_ROUND_CLOSEST(offset, PCF85063_OFFSET_STEP0); |
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mode1 = DIV_ROUND_CLOSEST(offset, PCF85063_OFFSET_STEP1); |
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error0 = abs(offset - (mode0 * PCF85063_OFFSET_STEP0)); |
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error1 = abs(offset - (mode1 * PCF85063_OFFSET_STEP1)); |
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if (mode1 > 63 || mode1 < -64 || error0 < error1) |
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reg = mode0 & ~PCF85063_OFFSET_MODE; |
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else |
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reg = mode1 | PCF85063_OFFSET_MODE; |
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return regmap_write(pcf85063->regmap, PCF85063_REG_OFFSET, reg); |
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} |
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static int pcf85063_ioctl(struct device *dev, unsigned int cmd, |
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unsigned long arg) |
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{ |
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struct pcf85063 *pcf85063 = dev_get_drvdata(dev); |
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int status, ret = 0; |
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switch (cmd) { |
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case RTC_VL_READ: |
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ret = regmap_read(pcf85063->regmap, PCF85063_REG_SC, &status); |
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if (ret < 0) |
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return ret; |
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status = status & PCF85063_REG_SC_OS ? RTC_VL_DATA_INVALID : 0; |
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return put_user(status, (unsigned int __user *)arg); |
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default: |
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return -ENOIOCTLCMD; |
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} |
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} |
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static const struct rtc_class_ops pcf85063_rtc_ops = { |
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.read_time = pcf85063_rtc_read_time, |
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.set_time = pcf85063_rtc_set_time, |
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.read_offset = pcf85063_read_offset, |
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.set_offset = pcf85063_set_offset, |
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.read_alarm = pcf85063_rtc_read_alarm, |
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.set_alarm = pcf85063_rtc_set_alarm, |
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.alarm_irq_enable = pcf85063_rtc_alarm_irq_enable, |
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.ioctl = pcf85063_ioctl, |
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}; |
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static int pcf85063_nvmem_read(void *priv, unsigned int offset, |
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void *val, size_t bytes) |
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{ |
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return regmap_read(priv, PCF85063_REG_RAM, val); |
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} |
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static int pcf85063_nvmem_write(void *priv, unsigned int offset, |
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void *val, size_t bytes) |
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{ |
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return regmap_write(priv, PCF85063_REG_RAM, *(u8 *)val); |
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} |
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static int pcf85063_load_capacitance(struct pcf85063 *pcf85063, |
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const struct device_node *np, |
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unsigned int force_cap) |
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{ |
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u32 load = 7000; |
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u8 reg = 0; |
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if (force_cap) |
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load = force_cap; |
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else |
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of_property_read_u32(np, "quartz-load-femtofarads", &load); |
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switch (load) { |
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default: |
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dev_warn(&pcf85063->rtc->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 7000", |
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load); |
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fallthrough; |
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case 7000: |
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break; |
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case 12500: |
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reg = PCF85063_REG_CTRL1_CAP_SEL; |
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break; |
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} |
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return regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL1, |
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PCF85063_REG_CTRL1_CAP_SEL, reg); |
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} |
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#ifdef CONFIG_COMMON_CLK |
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/* |
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* Handling of the clkout |
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*/ |
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#define clkout_hw_to_pcf85063(_hw) container_of(_hw, struct pcf85063, clkout_hw) |
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static int clkout_rates[] = { |
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32768, |
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16384, |
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8192, |
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4096, |
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2048, |
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1024, |
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1, |
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0 |
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}; |
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static unsigned long pcf85063_clkout_recalc_rate(struct clk_hw *hw, |
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unsigned long parent_rate) |
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{ |
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struct pcf85063 *pcf85063 = clkout_hw_to_pcf85063(hw); |
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unsigned int buf; |
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int ret = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL2, &buf); |
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if (ret < 0) |
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return 0; |
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buf &= PCF85063_REG_CLKO_F_MASK; |
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return clkout_rates[buf]; |
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} |
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static long pcf85063_clkout_round_rate(struct clk_hw *hw, unsigned long rate, |
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unsigned long *prate) |
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{ |
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int i; |
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for (i = 0; i < ARRAY_SIZE(clkout_rates); i++) |
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if (clkout_rates[i] <= rate) |
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return clkout_rates[i]; |
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return 0; |
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} |
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static int pcf85063_clkout_set_rate(struct clk_hw *hw, unsigned long rate, |
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unsigned long parent_rate) |
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{ |
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struct pcf85063 *pcf85063 = clkout_hw_to_pcf85063(hw); |
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int i; |
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for (i = 0; i < ARRAY_SIZE(clkout_rates); i++) |
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if (clkout_rates[i] == rate) |
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return regmap_update_bits(pcf85063->regmap, |
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PCF85063_REG_CTRL2, |
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PCF85063_REG_CLKO_F_MASK, i); |
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return -EINVAL; |
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} |
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static int pcf85063_clkout_control(struct clk_hw *hw, bool enable) |
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{ |
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struct pcf85063 *pcf85063 = clkout_hw_to_pcf85063(hw); |
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unsigned int buf; |
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int ret; |
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ret = regmap_read(pcf85063->regmap, PCF85063_REG_OFFSET, &buf); |
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if (ret < 0) |
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return ret; |
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buf &= PCF85063_REG_CLKO_F_MASK; |
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if (enable) { |
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if (buf == PCF85063_REG_CLKO_F_OFF) |
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buf = PCF85063_REG_CLKO_F_32768HZ; |
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else |
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return 0; |
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} else { |
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if (buf != PCF85063_REG_CLKO_F_OFF) |
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buf = PCF85063_REG_CLKO_F_OFF; |
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else |
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return 0; |
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} |
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return regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL2, |
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PCF85063_REG_CLKO_F_MASK, buf); |
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} |
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static int pcf85063_clkout_prepare(struct clk_hw *hw) |
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{ |
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return pcf85063_clkout_control(hw, 1); |
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} |
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static void pcf85063_clkout_unprepare(struct clk_hw *hw) |
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{ |
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pcf85063_clkout_control(hw, 0); |
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} |
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static int pcf85063_clkout_is_prepared(struct clk_hw *hw) |
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{ |
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struct pcf85063 *pcf85063 = clkout_hw_to_pcf85063(hw); |
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unsigned int buf; |
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int ret = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL2, &buf); |
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if (ret < 0) |
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return 0; |
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return (buf & PCF85063_REG_CLKO_F_MASK) != PCF85063_REG_CLKO_F_OFF; |
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} |
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static const struct clk_ops pcf85063_clkout_ops = { |
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.prepare = pcf85063_clkout_prepare, |
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.unprepare = pcf85063_clkout_unprepare, |
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.is_prepared = pcf85063_clkout_is_prepared, |
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.recalc_rate = pcf85063_clkout_recalc_rate, |
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.round_rate = pcf85063_clkout_round_rate, |
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.set_rate = pcf85063_clkout_set_rate, |
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}; |
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static struct clk *pcf85063_clkout_register_clk(struct pcf85063 *pcf85063) |
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{ |
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struct clk *clk; |
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struct clk_init_data init; |
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struct device_node *node = pcf85063->rtc->dev.parent->of_node; |
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init.name = "pcf85063-clkout"; |
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init.ops = &pcf85063_clkout_ops; |
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init.flags = 0; |
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init.parent_names = NULL; |
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init.num_parents = 0; |
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pcf85063->clkout_hw.init = &init; |
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/* optional override of the clockname */ |
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of_property_read_string(node, "clock-output-names", &init.name); |
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/* register the clock */ |
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clk = devm_clk_register(&pcf85063->rtc->dev, &pcf85063->clkout_hw); |
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if (!IS_ERR(clk)) |
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of_clk_add_provider(node, of_clk_src_simple_get, clk); |
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return clk; |
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} |
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#endif |
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static const struct pcf85063_config pcf85063tp_config = { |
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.regmap = { |
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.reg_bits = 8, |
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.val_bits = 8, |
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.max_register = 0x0a, |
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}, |
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}; |
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static int pcf85063_probe(struct i2c_client *client) |
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{ |
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struct pcf85063 *pcf85063; |
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unsigned int tmp; |
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int err; |
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const struct pcf85063_config *config = &pcf85063tp_config; |
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const void *data = of_device_get_match_data(&client->dev); |
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struct nvmem_config nvmem_cfg = { |
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.name = "pcf85063_nvram", |
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.reg_read = pcf85063_nvmem_read, |
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.reg_write = pcf85063_nvmem_write, |
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.type = NVMEM_TYPE_BATTERY_BACKED, |
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.size = 1, |
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}; |
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dev_dbg(&client->dev, "%s\n", __func__); |
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pcf85063 = devm_kzalloc(&client->dev, sizeof(struct pcf85063), |
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GFP_KERNEL); |
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if (!pcf85063) |
|
return -ENOMEM; |
|
|
|
if (data) |
|
config = data; |
|
|
|
pcf85063->regmap = devm_regmap_init_i2c(client, &config->regmap); |
|
if (IS_ERR(pcf85063->regmap)) |
|
return PTR_ERR(pcf85063->regmap); |
|
|
|
i2c_set_clientdata(client, pcf85063); |
|
|
|
err = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL1, &tmp); |
|
if (err) { |
|
dev_err(&client->dev, "RTC chip is not present\n"); |
|
return err; |
|
} |
|
|
|
pcf85063->rtc = devm_rtc_allocate_device(&client->dev); |
|
if (IS_ERR(pcf85063->rtc)) |
|
return PTR_ERR(pcf85063->rtc); |
|
|
|
err = pcf85063_load_capacitance(pcf85063, client->dev.of_node, |
|
config->force_cap_7000 ? 7000 : 0); |
|
if (err < 0) |
|
dev_warn(&client->dev, "failed to set xtal load capacitance: %d", |
|
err); |
|
|
|
pcf85063->rtc->ops = &pcf85063_rtc_ops; |
|
pcf85063->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; |
|
pcf85063->rtc->range_max = RTC_TIMESTAMP_END_2099; |
|
pcf85063->rtc->uie_unsupported = 1; |
|
clear_bit(RTC_FEATURE_ALARM, pcf85063->rtc->features); |
|
|
|
if (config->has_alarms && client->irq > 0) { |
|
err = devm_request_threaded_irq(&client->dev, client->irq, |
|
NULL, pcf85063_rtc_handle_irq, |
|
IRQF_TRIGGER_LOW | IRQF_ONESHOT, |
|
"pcf85063", pcf85063); |
|
if (err) { |
|
dev_warn(&pcf85063->rtc->dev, |
|
"unable to request IRQ, alarms disabled\n"); |
|
} else { |
|
set_bit(RTC_FEATURE_ALARM, pcf85063->rtc->features); |
|
device_init_wakeup(&client->dev, true); |
|
err = dev_pm_set_wake_irq(&client->dev, client->irq); |
|
if (err) |
|
dev_err(&pcf85063->rtc->dev, |
|
"failed to enable irq wake\n"); |
|
} |
|
} |
|
|
|
nvmem_cfg.priv = pcf85063->regmap; |
|
devm_rtc_nvmem_register(pcf85063->rtc, &nvmem_cfg); |
|
|
|
#ifdef CONFIG_COMMON_CLK |
|
/* register clk in common clk framework */ |
|
pcf85063_clkout_register_clk(pcf85063); |
|
#endif |
|
|
|
return devm_rtc_register_device(pcf85063->rtc); |
|
} |
|
|
|
#ifdef CONFIG_OF |
|
static const struct pcf85063_config pcf85063a_config = { |
|
.regmap = { |
|
.reg_bits = 8, |
|
.val_bits = 8, |
|
.max_register = 0x11, |
|
}, |
|
.has_alarms = 1, |
|
}; |
|
|
|
static const struct pcf85063_config rv8263_config = { |
|
.regmap = { |
|
.reg_bits = 8, |
|
.val_bits = 8, |
|
.max_register = 0x11, |
|
}, |
|
.has_alarms = 1, |
|
.force_cap_7000 = 1, |
|
}; |
|
|
|
static const struct of_device_id pcf85063_of_match[] = { |
|
{ .compatible = "nxp,pcf85063", .data = &pcf85063tp_config }, |
|
{ .compatible = "nxp,pcf85063tp", .data = &pcf85063tp_config }, |
|
{ .compatible = "nxp,pcf85063a", .data = &pcf85063a_config }, |
|
{ .compatible = "microcrystal,rv8263", .data = &rv8263_config }, |
|
{} |
|
}; |
|
MODULE_DEVICE_TABLE(of, pcf85063_of_match); |
|
#endif |
|
|
|
static struct i2c_driver pcf85063_driver = { |
|
.driver = { |
|
.name = "rtc-pcf85063", |
|
.of_match_table = of_match_ptr(pcf85063_of_match), |
|
}, |
|
.probe_new = pcf85063_probe, |
|
}; |
|
|
|
module_i2c_driver(pcf85063_driver); |
|
|
|
MODULE_AUTHOR("Søren Andersen <[email protected]>"); |
|
MODULE_DESCRIPTION("PCF85063 RTC driver"); |
|
MODULE_LICENSE("GPL");
|
|
|