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390 lines
9.9 KiB
390 lines
9.9 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Real Time Clock (RTC) Driver for i.MX53 |
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* Copyright (c) 2004-2011 Freescale Semiconductor, Inc. |
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* Copyright (c) 2017 Beckhoff Automation GmbH & Co. KG |
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*/ |
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#include <linux/clk.h> |
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#include <linux/io.h> |
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#include <linux/module.h> |
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#include <linux/mod_devicetable.h> |
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#include <linux/platform_device.h> |
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#include <linux/pm_wakeirq.h> |
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#include <linux/rtc.h> |
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#define SRTC_LPPDR_INIT 0x41736166 /* init for glitch detect */ |
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#define SRTC_LPCR_EN_LP BIT(3) /* lp enable */ |
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#define SRTC_LPCR_WAE BIT(4) /* lp wakeup alarm enable */ |
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#define SRTC_LPCR_ALP BIT(7) /* lp alarm flag */ |
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#define SRTC_LPCR_NSA BIT(11) /* lp non secure access */ |
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#define SRTC_LPCR_NVE BIT(14) /* lp non valid state exit bit */ |
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#define SRTC_LPCR_IE BIT(15) /* lp init state exit bit */ |
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#define SRTC_LPSR_ALP BIT(3) /* lp alarm flag */ |
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#define SRTC_LPSR_NVES BIT(14) /* lp non-valid state exit status */ |
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#define SRTC_LPSR_IES BIT(15) /* lp init state exit status */ |
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#define SRTC_LPSCMR 0x00 /* LP Secure Counter MSB Reg */ |
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#define SRTC_LPSCLR 0x04 /* LP Secure Counter LSB Reg */ |
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#define SRTC_LPSAR 0x08 /* LP Secure Alarm Reg */ |
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#define SRTC_LPCR 0x10 /* LP Control Reg */ |
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#define SRTC_LPSR 0x14 /* LP Status Reg */ |
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#define SRTC_LPPDR 0x18 /* LP Power Supply Glitch Detector Reg */ |
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/* max. number of retries to read registers, 120 was max during test */ |
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#define REG_READ_TIMEOUT 2000 |
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struct mxc_rtc_data { |
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struct rtc_device *rtc; |
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void __iomem *ioaddr; |
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struct clk *clk; |
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spinlock_t lock; /* protects register access */ |
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int irq; |
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}; |
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/* |
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* This function does write synchronization for writes to the lp srtc block. |
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* To take care of the asynchronous CKIL clock, all writes from the IP domain |
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* will be synchronized to the CKIL domain. |
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* The caller should hold the pdata->lock |
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*/ |
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static void mxc_rtc_sync_lp_locked(struct device *dev, void __iomem *ioaddr) |
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{ |
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unsigned int i; |
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/* Wait for 3 CKIL cycles */ |
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for (i = 0; i < 3; i++) { |
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const u32 count = readl(ioaddr + SRTC_LPSCLR); |
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unsigned int timeout = REG_READ_TIMEOUT; |
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while ((readl(ioaddr + SRTC_LPSCLR)) == count) { |
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if (!--timeout) { |
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dev_err_once(dev, "SRTC_LPSCLR stuck! Check your hw.\n"); |
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return; |
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} |
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} |
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} |
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} |
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/* This function is the RTC interrupt service routine. */ |
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static irqreturn_t mxc_rtc_interrupt(int irq, void *dev_id) |
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{ |
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struct device *dev = dev_id; |
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struct mxc_rtc_data *pdata = dev_get_drvdata(dev); |
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void __iomem *ioaddr = pdata->ioaddr; |
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u32 lp_status; |
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u32 lp_cr; |
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spin_lock(&pdata->lock); |
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if (clk_enable(pdata->clk)) { |
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spin_unlock(&pdata->lock); |
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return IRQ_NONE; |
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} |
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lp_status = readl(ioaddr + SRTC_LPSR); |
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lp_cr = readl(ioaddr + SRTC_LPCR); |
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/* update irq data & counter */ |
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if (lp_status & SRTC_LPSR_ALP) { |
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if (lp_cr & SRTC_LPCR_ALP) |
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rtc_update_irq(pdata->rtc, 1, RTC_AF | RTC_IRQF); |
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/* disable further lp alarm interrupts */ |
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lp_cr &= ~(SRTC_LPCR_ALP | SRTC_LPCR_WAE); |
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} |
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/* Update interrupt enables */ |
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writel(lp_cr, ioaddr + SRTC_LPCR); |
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/* clear interrupt status */ |
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writel(lp_status, ioaddr + SRTC_LPSR); |
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mxc_rtc_sync_lp_locked(dev, ioaddr); |
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clk_disable(pdata->clk); |
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spin_unlock(&pdata->lock); |
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return IRQ_HANDLED; |
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} |
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/* |
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* Enable clk and aquire spinlock |
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* @return 0 if successful; non-zero otherwise. |
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*/ |
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static int mxc_rtc_lock(struct mxc_rtc_data *const pdata) |
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{ |
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int ret; |
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spin_lock_irq(&pdata->lock); |
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ret = clk_enable(pdata->clk); |
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if (ret) { |
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spin_unlock_irq(&pdata->lock); |
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return ret; |
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} |
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return 0; |
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} |
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static int mxc_rtc_unlock(struct mxc_rtc_data *const pdata) |
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{ |
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clk_disable(pdata->clk); |
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spin_unlock_irq(&pdata->lock); |
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return 0; |
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} |
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/* |
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* This function reads the current RTC time into tm in Gregorian date. |
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* |
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* @param tm contains the RTC time value upon return |
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* |
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* @return 0 if successful; non-zero otherwise. |
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*/ |
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static int mxc_rtc_read_time(struct device *dev, struct rtc_time *tm) |
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{ |
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struct mxc_rtc_data *pdata = dev_get_drvdata(dev); |
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const int clk_failed = clk_enable(pdata->clk); |
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if (!clk_failed) { |
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const time64_t now = readl(pdata->ioaddr + SRTC_LPSCMR); |
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rtc_time64_to_tm(now, tm); |
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clk_disable(pdata->clk); |
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return 0; |
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} |
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return clk_failed; |
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} |
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/* |
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* This function sets the internal RTC time based on tm in Gregorian date. |
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* |
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* @param tm the time value to be set in the RTC |
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* |
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* @return 0 if successful; non-zero otherwise. |
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*/ |
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static int mxc_rtc_set_time(struct device *dev, struct rtc_time *tm) |
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{ |
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struct mxc_rtc_data *pdata = dev_get_drvdata(dev); |
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time64_t time = rtc_tm_to_time64(tm); |
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int ret; |
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ret = mxc_rtc_lock(pdata); |
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if (ret) |
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return ret; |
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writel(time, pdata->ioaddr + SRTC_LPSCMR); |
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mxc_rtc_sync_lp_locked(dev, pdata->ioaddr); |
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return mxc_rtc_unlock(pdata); |
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} |
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/* |
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* This function reads the current alarm value into the passed in \b alrm |
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* argument. It updates the \b alrm's pending field value based on the whether |
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* an alarm interrupt occurs or not. |
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* |
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* @param alrm contains the RTC alarm value upon return |
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* |
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* @return 0 if successful; non-zero otherwise. |
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*/ |
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static int mxc_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
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{ |
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struct mxc_rtc_data *pdata = dev_get_drvdata(dev); |
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void __iomem *ioaddr = pdata->ioaddr; |
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int ret; |
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ret = mxc_rtc_lock(pdata); |
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if (ret) |
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return ret; |
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rtc_time64_to_tm(readl(ioaddr + SRTC_LPSAR), &alrm->time); |
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alrm->pending = !!(readl(ioaddr + SRTC_LPSR) & SRTC_LPSR_ALP); |
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return mxc_rtc_unlock(pdata); |
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} |
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/* |
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* Enable/Disable alarm interrupt |
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* The caller should hold the pdata->lock |
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*/ |
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static void mxc_rtc_alarm_irq_enable_locked(struct mxc_rtc_data *pdata, |
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unsigned int enable) |
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{ |
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u32 lp_cr = readl(pdata->ioaddr + SRTC_LPCR); |
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if (enable) |
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lp_cr |= (SRTC_LPCR_ALP | SRTC_LPCR_WAE); |
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else |
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lp_cr &= ~(SRTC_LPCR_ALP | SRTC_LPCR_WAE); |
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writel(lp_cr, pdata->ioaddr + SRTC_LPCR); |
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} |
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static int mxc_rtc_alarm_irq_enable(struct device *dev, unsigned int enable) |
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{ |
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struct mxc_rtc_data *pdata = dev_get_drvdata(dev); |
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int ret = mxc_rtc_lock(pdata); |
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if (ret) |
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return ret; |
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mxc_rtc_alarm_irq_enable_locked(pdata, enable); |
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return mxc_rtc_unlock(pdata); |
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} |
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/* |
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* This function sets the RTC alarm based on passed in alrm. |
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* |
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* @param alrm the alarm value to be set in the RTC |
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* |
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* @return 0 if successful; non-zero otherwise. |
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*/ |
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static int mxc_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
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{ |
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const time64_t time = rtc_tm_to_time64(&alrm->time); |
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struct mxc_rtc_data *pdata = dev_get_drvdata(dev); |
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int ret = mxc_rtc_lock(pdata); |
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if (ret) |
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return ret; |
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writel((u32)time, pdata->ioaddr + SRTC_LPSAR); |
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/* clear alarm interrupt status bit */ |
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writel(SRTC_LPSR_ALP, pdata->ioaddr + SRTC_LPSR); |
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mxc_rtc_sync_lp_locked(dev, pdata->ioaddr); |
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mxc_rtc_alarm_irq_enable_locked(pdata, alrm->enabled); |
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mxc_rtc_sync_lp_locked(dev, pdata->ioaddr); |
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mxc_rtc_unlock(pdata); |
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return ret; |
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} |
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static const struct rtc_class_ops mxc_rtc_ops = { |
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.read_time = mxc_rtc_read_time, |
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.set_time = mxc_rtc_set_time, |
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.read_alarm = mxc_rtc_read_alarm, |
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.set_alarm = mxc_rtc_set_alarm, |
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.alarm_irq_enable = mxc_rtc_alarm_irq_enable, |
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}; |
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static int mxc_rtc_wait_for_flag(void __iomem *ioaddr, int flag) |
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{ |
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unsigned int timeout = REG_READ_TIMEOUT; |
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while (!(readl(ioaddr) & flag)) { |
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if (!--timeout) |
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return -EBUSY; |
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} |
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return 0; |
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} |
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static int mxc_rtc_probe(struct platform_device *pdev) |
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{ |
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struct mxc_rtc_data *pdata; |
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void __iomem *ioaddr; |
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int ret = 0; |
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pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); |
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if (!pdata) |
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return -ENOMEM; |
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pdata->ioaddr = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(pdata->ioaddr)) |
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return PTR_ERR(pdata->ioaddr); |
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ioaddr = pdata->ioaddr; |
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pdata->clk = devm_clk_get(&pdev->dev, NULL); |
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if (IS_ERR(pdata->clk)) { |
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dev_err(&pdev->dev, "unable to get rtc clock!\n"); |
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return PTR_ERR(pdata->clk); |
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} |
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spin_lock_init(&pdata->lock); |
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pdata->irq = platform_get_irq(pdev, 0); |
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if (pdata->irq < 0) |
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return pdata->irq; |
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device_init_wakeup(&pdev->dev, 1); |
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ret = dev_pm_set_wake_irq(&pdev->dev, pdata->irq); |
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if (ret) |
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dev_err(&pdev->dev, "failed to enable irq wake\n"); |
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ret = clk_prepare_enable(pdata->clk); |
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if (ret) |
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return ret; |
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/* initialize glitch detect */ |
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writel(SRTC_LPPDR_INIT, ioaddr + SRTC_LPPDR); |
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/* clear lp interrupt status */ |
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writel(0xFFFFFFFF, ioaddr + SRTC_LPSR); |
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/* move out of init state */ |
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writel((SRTC_LPCR_IE | SRTC_LPCR_NSA), ioaddr + SRTC_LPCR); |
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ret = mxc_rtc_wait_for_flag(ioaddr + SRTC_LPSR, SRTC_LPSR_IES); |
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if (ret) { |
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dev_err(&pdev->dev, "Timeout waiting for SRTC_LPSR_IES\n"); |
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clk_disable_unprepare(pdata->clk); |
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return ret; |
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} |
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/* move out of non-valid state */ |
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writel((SRTC_LPCR_IE | SRTC_LPCR_NVE | SRTC_LPCR_NSA | |
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SRTC_LPCR_EN_LP), ioaddr + SRTC_LPCR); |
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ret = mxc_rtc_wait_for_flag(ioaddr + SRTC_LPSR, SRTC_LPSR_NVES); |
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if (ret) { |
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dev_err(&pdev->dev, "Timeout waiting for SRTC_LPSR_NVES\n"); |
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clk_disable_unprepare(pdata->clk); |
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return ret; |
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} |
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pdata->rtc = devm_rtc_allocate_device(&pdev->dev); |
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if (IS_ERR(pdata->rtc)) |
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return PTR_ERR(pdata->rtc); |
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pdata->rtc->ops = &mxc_rtc_ops; |
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pdata->rtc->range_max = U32_MAX; |
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clk_disable(pdata->clk); |
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platform_set_drvdata(pdev, pdata); |
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ret = |
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devm_request_irq(&pdev->dev, pdata->irq, mxc_rtc_interrupt, 0, |
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pdev->name, &pdev->dev); |
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if (ret < 0) { |
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dev_err(&pdev->dev, "interrupt not available.\n"); |
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clk_unprepare(pdata->clk); |
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return ret; |
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} |
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ret = devm_rtc_register_device(pdata->rtc); |
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if (ret < 0) |
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clk_unprepare(pdata->clk); |
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return ret; |
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} |
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static int mxc_rtc_remove(struct platform_device *pdev) |
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{ |
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struct mxc_rtc_data *pdata = platform_get_drvdata(pdev); |
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clk_disable_unprepare(pdata->clk); |
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return 0; |
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} |
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static const struct of_device_id mxc_ids[] = { |
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{ .compatible = "fsl,imx53-rtc", }, |
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{} |
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}; |
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MODULE_DEVICE_TABLE(of, mxc_ids); |
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static struct platform_driver mxc_rtc_driver = { |
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.driver = { |
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.name = "mxc_rtc_v2", |
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.of_match_table = mxc_ids, |
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}, |
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.probe = mxc_rtc_probe, |
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.remove = mxc_rtc_remove, |
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}; |
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module_platform_driver(mxc_rtc_driver); |
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MODULE_AUTHOR("Freescale Semiconductor, Inc."); |
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MODULE_DESCRIPTION("Real Time Clock (RTC) Driver for i.MX53"); |
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MODULE_LICENSE("GPL");
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