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223 lines
5.6 KiB
223 lines
5.6 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Hisilicon Hi6220 reset controller driver |
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* |
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* Copyright (c) 2016 Linaro Limited. |
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* Copyright (c) 2015-2016 Hisilicon Limited. |
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* |
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* Author: Feng Chen <[email protected]> |
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*/ |
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#include <linux/io.h> |
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#include <linux/init.h> |
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#include <linux/module.h> |
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#include <linux/bitops.h> |
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#include <linux/of.h> |
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#include <linux/of_device.h> |
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#include <linux/regmap.h> |
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#include <linux/mfd/syscon.h> |
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#include <linux/reset-controller.h> |
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#include <linux/reset.h> |
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#include <linux/platform_device.h> |
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#define PERIPH_ASSERT_OFFSET 0x300 |
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#define PERIPH_DEASSERT_OFFSET 0x304 |
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#define PERIPH_MAX_INDEX 0x509 |
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#define SC_MEDIA_RSTEN 0x052C |
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#define SC_MEDIA_RSTDIS 0x0530 |
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#define MEDIA_MAX_INDEX 8 |
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#define to_reset_data(x) container_of(x, struct hi6220_reset_data, rc_dev) |
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enum hi6220_reset_ctrl_type { |
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PERIPHERAL, |
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MEDIA, |
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AO, |
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}; |
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struct hi6220_reset_data { |
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struct reset_controller_dev rc_dev; |
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struct regmap *regmap; |
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}; |
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static int hi6220_peripheral_assert(struct reset_controller_dev *rc_dev, |
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unsigned long idx) |
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{ |
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struct hi6220_reset_data *data = to_reset_data(rc_dev); |
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struct regmap *regmap = data->regmap; |
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u32 bank = idx >> 8; |
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u32 offset = idx & 0xff; |
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u32 reg = PERIPH_ASSERT_OFFSET + bank * 0x10; |
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return regmap_write(regmap, reg, BIT(offset)); |
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} |
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static int hi6220_peripheral_deassert(struct reset_controller_dev *rc_dev, |
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unsigned long idx) |
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{ |
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struct hi6220_reset_data *data = to_reset_data(rc_dev); |
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struct regmap *regmap = data->regmap; |
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u32 bank = idx >> 8; |
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u32 offset = idx & 0xff; |
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u32 reg = PERIPH_DEASSERT_OFFSET + bank * 0x10; |
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return regmap_write(regmap, reg, BIT(offset)); |
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} |
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static const struct reset_control_ops hi6220_peripheral_reset_ops = { |
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.assert = hi6220_peripheral_assert, |
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.deassert = hi6220_peripheral_deassert, |
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}; |
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static int hi6220_media_assert(struct reset_controller_dev *rc_dev, |
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unsigned long idx) |
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{ |
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struct hi6220_reset_data *data = to_reset_data(rc_dev); |
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struct regmap *regmap = data->regmap; |
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return regmap_write(regmap, SC_MEDIA_RSTEN, BIT(idx)); |
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} |
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static int hi6220_media_deassert(struct reset_controller_dev *rc_dev, |
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unsigned long idx) |
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{ |
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struct hi6220_reset_data *data = to_reset_data(rc_dev); |
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struct regmap *regmap = data->regmap; |
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return regmap_write(regmap, SC_MEDIA_RSTDIS, BIT(idx)); |
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} |
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static const struct reset_control_ops hi6220_media_reset_ops = { |
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.assert = hi6220_media_assert, |
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.deassert = hi6220_media_deassert, |
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}; |
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#define AO_SCTRL_SC_PW_CLKEN0 0x800 |
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#define AO_SCTRL_SC_PW_CLKDIS0 0x804 |
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#define AO_SCTRL_SC_PW_RSTEN0 0x810 |
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#define AO_SCTRL_SC_PW_RSTDIS0 0x814 |
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#define AO_SCTRL_SC_PW_ISOEN0 0x820 |
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#define AO_SCTRL_SC_PW_ISODIS0 0x824 |
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#define AO_MAX_INDEX 12 |
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static int hi6220_ao_assert(struct reset_controller_dev *rc_dev, |
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unsigned long idx) |
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{ |
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struct hi6220_reset_data *data = to_reset_data(rc_dev); |
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struct regmap *regmap = data->regmap; |
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int ret; |
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ret = regmap_write(regmap, AO_SCTRL_SC_PW_RSTEN0, BIT(idx)); |
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if (ret) |
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return ret; |
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ret = regmap_write(regmap, AO_SCTRL_SC_PW_ISOEN0, BIT(idx)); |
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if (ret) |
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return ret; |
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ret = regmap_write(regmap, AO_SCTRL_SC_PW_CLKDIS0, BIT(idx)); |
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return ret; |
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} |
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static int hi6220_ao_deassert(struct reset_controller_dev *rc_dev, |
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unsigned long idx) |
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{ |
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struct hi6220_reset_data *data = to_reset_data(rc_dev); |
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struct regmap *regmap = data->regmap; |
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int ret; |
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/* |
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* It was suggested to disable isolation before enabling |
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* the clocks and deasserting reset, to avoid glitches. |
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* But this order is preserved to keep it matching the |
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* vendor code. |
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*/ |
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ret = regmap_write(regmap, AO_SCTRL_SC_PW_RSTDIS0, BIT(idx)); |
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if (ret) |
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return ret; |
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ret = regmap_write(regmap, AO_SCTRL_SC_PW_ISODIS0, BIT(idx)); |
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if (ret) |
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return ret; |
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ret = regmap_write(regmap, AO_SCTRL_SC_PW_CLKEN0, BIT(idx)); |
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return ret; |
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} |
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static const struct reset_control_ops hi6220_ao_reset_ops = { |
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.assert = hi6220_ao_assert, |
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.deassert = hi6220_ao_deassert, |
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}; |
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static int hi6220_reset_probe(struct platform_device *pdev) |
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{ |
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struct device_node *np = pdev->dev.of_node; |
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struct device *dev = &pdev->dev; |
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enum hi6220_reset_ctrl_type type; |
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struct hi6220_reset_data *data; |
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struct regmap *regmap; |
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data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); |
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if (!data) |
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return -ENOMEM; |
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type = (enum hi6220_reset_ctrl_type)of_device_get_match_data(dev); |
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regmap = syscon_node_to_regmap(np); |
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if (IS_ERR(regmap)) { |
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dev_err(dev, "failed to get reset controller regmap\n"); |
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return PTR_ERR(regmap); |
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} |
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data->regmap = regmap; |
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data->rc_dev.of_node = np; |
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if (type == MEDIA) { |
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data->rc_dev.ops = &hi6220_media_reset_ops; |
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data->rc_dev.nr_resets = MEDIA_MAX_INDEX; |
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} else if (type == PERIPHERAL) { |
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data->rc_dev.ops = &hi6220_peripheral_reset_ops; |
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data->rc_dev.nr_resets = PERIPH_MAX_INDEX; |
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} else { |
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data->rc_dev.ops = &hi6220_ao_reset_ops; |
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data->rc_dev.nr_resets = AO_MAX_INDEX; |
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} |
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return reset_controller_register(&data->rc_dev); |
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} |
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static const struct of_device_id hi6220_reset_match[] = { |
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{ |
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.compatible = "hisilicon,hi6220-sysctrl", |
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.data = (void *)PERIPHERAL, |
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}, |
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{ |
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.compatible = "hisilicon,hi6220-mediactrl", |
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.data = (void *)MEDIA, |
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}, |
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{ |
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.compatible = "hisilicon,hi6220-aoctrl", |
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.data = (void *)AO, |
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}, |
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{ /* sentinel */ }, |
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}; |
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MODULE_DEVICE_TABLE(of, hi6220_reset_match); |
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static struct platform_driver hi6220_reset_driver = { |
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.probe = hi6220_reset_probe, |
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.driver = { |
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.name = "reset-hi6220", |
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.of_match_table = hi6220_reset_match, |
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}, |
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}; |
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static int __init hi6220_reset_init(void) |
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{ |
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return platform_driver_register(&hi6220_reset_driver); |
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} |
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postcore_initcall(hi6220_reset_init); |
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MODULE_LICENSE("GPL v2");
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