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419 lines
13 KiB
419 lines
13 KiB
// SPDX-License-Identifier: GPL-2.0 |
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// |
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// Copyright (c) 2014 MediaTek Inc. |
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// Author: Flora Fu <[email protected]> |
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#include <linux/module.h> |
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#include <linux/of.h> |
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#include <linux/platform_device.h> |
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#include <linux/regmap.h> |
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#include <linux/mfd/mt6397/core.h> |
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#include <linux/mfd/mt6397/registers.h> |
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#include <linux/regulator/driver.h> |
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#include <linux/regulator/machine.h> |
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#include <linux/regulator/mt6397-regulator.h> |
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#include <linux/regulator/of_regulator.h> |
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#include <dt-bindings/regulator/mediatek,mt6397-regulator.h> |
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/* |
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* MT6397 regulators' information |
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* |
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* @desc: standard fields of regulator description. |
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* @qi: Mask for query enable signal status of regulators |
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* @vselon_reg: Register sections for hardware control mode of bucks |
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* @vselctrl_reg: Register for controlling the buck control mode. |
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* @vselctrl_mask: Mask for query buck's voltage control mode. |
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*/ |
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struct mt6397_regulator_info { |
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struct regulator_desc desc; |
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u32 qi; |
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u32 vselon_reg; |
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u32 vselctrl_reg; |
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u32 vselctrl_mask; |
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u32 modeset_reg; |
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u32 modeset_mask; |
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}; |
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#define MT6397_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ |
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vosel, vosel_mask, voselon, vosel_ctrl, _modeset_reg, \ |
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_modeset_shift) \ |
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[MT6397_ID_##vreg] = { \ |
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.desc = { \ |
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.name = #vreg, \ |
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.of_match = of_match_ptr(match), \ |
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.ops = &mt6397_volt_range_ops, \ |
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.type = REGULATOR_VOLTAGE, \ |
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.id = MT6397_ID_##vreg, \ |
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.owner = THIS_MODULE, \ |
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.n_voltages = (max - min)/step + 1, \ |
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.linear_ranges = volt_ranges, \ |
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \ |
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.vsel_reg = vosel, \ |
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.vsel_mask = vosel_mask, \ |
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.enable_reg = enreg, \ |
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.enable_mask = BIT(0), \ |
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.of_map_mode = mt6397_map_mode, \ |
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}, \ |
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.qi = BIT(13), \ |
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.vselon_reg = voselon, \ |
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.vselctrl_reg = vosel_ctrl, \ |
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.vselctrl_mask = BIT(1), \ |
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.modeset_reg = _modeset_reg, \ |
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.modeset_mask = BIT(_modeset_shift), \ |
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} |
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#define MT6397_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \ |
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vosel_mask) \ |
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[MT6397_ID_##vreg] = { \ |
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.desc = { \ |
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.name = #vreg, \ |
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.of_match = of_match_ptr(match), \ |
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.ops = &mt6397_volt_table_ops, \ |
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.type = REGULATOR_VOLTAGE, \ |
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.id = MT6397_ID_##vreg, \ |
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.owner = THIS_MODULE, \ |
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.n_voltages = ARRAY_SIZE(ldo_volt_table), \ |
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.volt_table = ldo_volt_table, \ |
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.vsel_reg = vosel, \ |
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.vsel_mask = vosel_mask, \ |
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.enable_reg = enreg, \ |
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.enable_mask = BIT(enbit), \ |
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}, \ |
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.qi = BIT(15), \ |
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} |
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#define MT6397_REG_FIXED(match, vreg, enreg, enbit, volt) \ |
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[MT6397_ID_##vreg] = { \ |
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.desc = { \ |
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.name = #vreg, \ |
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.of_match = of_match_ptr(match), \ |
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.ops = &mt6397_volt_fixed_ops, \ |
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.type = REGULATOR_VOLTAGE, \ |
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.id = MT6397_ID_##vreg, \ |
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.owner = THIS_MODULE, \ |
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.n_voltages = 1, \ |
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.enable_reg = enreg, \ |
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.enable_mask = BIT(enbit), \ |
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.min_uV = volt, \ |
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}, \ |
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.qi = BIT(15), \ |
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} |
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static const struct linear_range buck_volt_range1[] = { |
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REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250), |
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}; |
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static const struct linear_range buck_volt_range2[] = { |
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REGULATOR_LINEAR_RANGE(800000, 0, 0x7f, 6250), |
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}; |
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static const struct linear_range buck_volt_range3[] = { |
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REGULATOR_LINEAR_RANGE(1500000, 0, 0x1f, 20000), |
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}; |
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static const unsigned int ldo_volt_table1[] = { |
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1500000, 1800000, 2500000, 2800000, |
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}; |
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static const unsigned int ldo_volt_table2[] = { |
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1800000, 3300000, |
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}; |
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static const unsigned int ldo_volt_table3[] = { |
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3000000, 3300000, |
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}; |
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static const unsigned int ldo_volt_table4[] = { |
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1220000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000, |
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}; |
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static const unsigned int ldo_volt_table5[] = { |
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1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000, |
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}; |
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static const unsigned int ldo_volt_table5_v2[] = { |
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1200000, 1000000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000, |
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}; |
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static const unsigned int ldo_volt_table6[] = { |
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1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 2000000, |
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}; |
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static const unsigned int ldo_volt_table7[] = { |
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1300000, 1500000, 1800000, 2000000, 2500000, 2800000, 3000000, 3300000, |
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}; |
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static unsigned int mt6397_map_mode(unsigned int mode) |
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{ |
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switch (mode) { |
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case MT6397_BUCK_MODE_AUTO: |
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return REGULATOR_MODE_NORMAL; |
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case MT6397_BUCK_MODE_FORCE_PWM: |
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return REGULATOR_MODE_FAST; |
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default: |
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return REGULATOR_MODE_INVALID; |
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} |
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} |
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static int mt6397_regulator_set_mode(struct regulator_dev *rdev, |
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unsigned int mode) |
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{ |
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struct mt6397_regulator_info *info = rdev_get_drvdata(rdev); |
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int ret, val; |
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switch (mode) { |
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case REGULATOR_MODE_FAST: |
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val = MT6397_BUCK_MODE_FORCE_PWM; |
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break; |
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case REGULATOR_MODE_NORMAL: |
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val = MT6397_BUCK_MODE_AUTO; |
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break; |
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default: |
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ret = -EINVAL; |
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goto err_mode; |
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} |
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dev_dbg(&rdev->dev, "mt6397 buck set_mode %#x, %#x, %#x\n", |
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info->modeset_reg, info->modeset_mask, val); |
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val <<= ffs(info->modeset_mask) - 1; |
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ret = regmap_update_bits(rdev->regmap, info->modeset_reg, |
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info->modeset_mask, val); |
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err_mode: |
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if (ret != 0) { |
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dev_err(&rdev->dev, |
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"Failed to set mt6397 buck mode: %d\n", ret); |
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return ret; |
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} |
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return 0; |
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} |
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static unsigned int mt6397_regulator_get_mode(struct regulator_dev *rdev) |
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{ |
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struct mt6397_regulator_info *info = rdev_get_drvdata(rdev); |
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int ret, regval; |
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ret = regmap_read(rdev->regmap, info->modeset_reg, ®val); |
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if (ret != 0) { |
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dev_err(&rdev->dev, |
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"Failed to get mt6397 buck mode: %d\n", ret); |
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return ret; |
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} |
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regval &= info->modeset_mask; |
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regval >>= ffs(info->modeset_mask) - 1; |
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switch (regval) { |
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case MT6397_BUCK_MODE_AUTO: |
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return REGULATOR_MODE_NORMAL; |
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case MT6397_BUCK_MODE_FORCE_PWM: |
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return REGULATOR_MODE_FAST; |
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default: |
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return -EINVAL; |
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} |
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} |
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static int mt6397_get_status(struct regulator_dev *rdev) |
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{ |
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int ret; |
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u32 regval; |
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struct mt6397_regulator_info *info = rdev_get_drvdata(rdev); |
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ret = regmap_read(rdev->regmap, info->desc.enable_reg, ®val); |
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if (ret != 0) { |
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dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret); |
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return ret; |
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} |
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return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; |
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} |
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static const struct regulator_ops mt6397_volt_range_ops = { |
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.list_voltage = regulator_list_voltage_linear_range, |
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.map_voltage = regulator_map_voltage_linear_range, |
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.set_voltage_sel = regulator_set_voltage_sel_regmap, |
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.get_voltage_sel = regulator_get_voltage_sel_regmap, |
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.set_voltage_time_sel = regulator_set_voltage_time_sel, |
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.enable = regulator_enable_regmap, |
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.disable = regulator_disable_regmap, |
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.is_enabled = regulator_is_enabled_regmap, |
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.get_status = mt6397_get_status, |
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.set_mode = mt6397_regulator_set_mode, |
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.get_mode = mt6397_regulator_get_mode, |
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}; |
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static const struct regulator_ops mt6397_volt_table_ops = { |
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.list_voltage = regulator_list_voltage_table, |
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.map_voltage = regulator_map_voltage_iterate, |
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.set_voltage_sel = regulator_set_voltage_sel_regmap, |
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.get_voltage_sel = regulator_get_voltage_sel_regmap, |
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.set_voltage_time_sel = regulator_set_voltage_time_sel, |
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.enable = regulator_enable_regmap, |
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.disable = regulator_disable_regmap, |
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.is_enabled = regulator_is_enabled_regmap, |
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.get_status = mt6397_get_status, |
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}; |
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static const struct regulator_ops mt6397_volt_fixed_ops = { |
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.list_voltage = regulator_list_voltage_linear, |
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.enable = regulator_enable_regmap, |
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.disable = regulator_disable_regmap, |
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.is_enabled = regulator_is_enabled_regmap, |
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.get_status = mt6397_get_status, |
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}; |
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/* The array is indexed by id(MT6397_ID_XXX) */ |
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static struct mt6397_regulator_info mt6397_regulators[] = { |
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MT6397_BUCK("buck_vpca15", VPCA15, 700000, 1493750, 6250, |
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buck_volt_range1, MT6397_VCA15_CON7, MT6397_VCA15_CON9, 0x7f, |
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MT6397_VCA15_CON10, MT6397_VCA15_CON5, MT6397_VCA15_CON2, 11), |
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MT6397_BUCK("buck_vpca7", VPCA7, 700000, 1493750, 6250, |
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buck_volt_range1, MT6397_VPCA7_CON7, MT6397_VPCA7_CON9, 0x7f, |
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MT6397_VPCA7_CON10, MT6397_VPCA7_CON5, MT6397_VPCA7_CON2, 8), |
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MT6397_BUCK("buck_vsramca15", VSRAMCA15, 700000, 1493750, 6250, |
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buck_volt_range1, MT6397_VSRMCA15_CON7, MT6397_VSRMCA15_CON9, |
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0x7f, MT6397_VSRMCA15_CON10, MT6397_VSRMCA15_CON5, |
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MT6397_VSRMCA15_CON2, 8), |
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MT6397_BUCK("buck_vsramca7", VSRAMCA7, 700000, 1493750, 6250, |
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buck_volt_range1, MT6397_VSRMCA7_CON7, MT6397_VSRMCA7_CON9, |
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0x7f, MT6397_VSRMCA7_CON10, MT6397_VSRMCA7_CON5, |
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MT6397_VSRMCA7_CON2, 8), |
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MT6397_BUCK("buck_vcore", VCORE, 700000, 1493750, 6250, |
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buck_volt_range1, MT6397_VCORE_CON7, MT6397_VCORE_CON9, 0x7f, |
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MT6397_VCORE_CON10, MT6397_VCORE_CON5, MT6397_VCORE_CON2, 8), |
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MT6397_BUCK("buck_vgpu", VGPU, 700000, 1493750, 6250, buck_volt_range1, |
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MT6397_VGPU_CON7, MT6397_VGPU_CON9, 0x7f, |
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MT6397_VGPU_CON10, MT6397_VGPU_CON5, MT6397_VGPU_CON2, 8), |
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MT6397_BUCK("buck_vdrm", VDRM, 800000, 1593750, 6250, buck_volt_range2, |
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MT6397_VDRM_CON7, MT6397_VDRM_CON9, 0x7f, |
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MT6397_VDRM_CON10, MT6397_VDRM_CON5, MT6397_VDRM_CON2, 8), |
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MT6397_BUCK("buck_vio18", VIO18, 1500000, 2120000, 20000, |
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buck_volt_range3, MT6397_VIO18_CON7, MT6397_VIO18_CON9, 0x1f, |
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MT6397_VIO18_CON10, MT6397_VIO18_CON5, MT6397_VIO18_CON2, 8), |
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MT6397_REG_FIXED("ldo_vtcxo", VTCXO, MT6397_ANALDO_CON0, 10, 2800000), |
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MT6397_REG_FIXED("ldo_va28", VA28, MT6397_ANALDO_CON1, 14, 2800000), |
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MT6397_LDO("ldo_vcama", VCAMA, ldo_volt_table1, |
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MT6397_ANALDO_CON2, 15, MT6397_ANALDO_CON6, 0xC0), |
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MT6397_REG_FIXED("ldo_vio28", VIO28, MT6397_DIGLDO_CON0, 14, 2800000), |
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MT6397_REG_FIXED("ldo_vusb", VUSB, MT6397_DIGLDO_CON1, 14, 3300000), |
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MT6397_LDO("ldo_vmc", VMC, ldo_volt_table2, |
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MT6397_DIGLDO_CON2, 12, MT6397_DIGLDO_CON29, 0x10), |
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MT6397_LDO("ldo_vmch", VMCH, ldo_volt_table3, |
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MT6397_DIGLDO_CON3, 14, MT6397_DIGLDO_CON17, 0x80), |
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MT6397_LDO("ldo_vemc3v3", VEMC3V3, ldo_volt_table3, |
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MT6397_DIGLDO_CON4, 14, MT6397_DIGLDO_CON18, 0x10), |
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MT6397_LDO("ldo_vgp1", VGP1, ldo_volt_table4, |
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MT6397_DIGLDO_CON5, 15, MT6397_DIGLDO_CON19, 0xE0), |
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MT6397_LDO("ldo_vgp2", VGP2, ldo_volt_table5, |
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MT6397_DIGLDO_CON6, 15, MT6397_DIGLDO_CON20, 0xE0), |
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MT6397_LDO("ldo_vgp3", VGP3, ldo_volt_table5, |
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MT6397_DIGLDO_CON7, 15, MT6397_DIGLDO_CON21, 0xE0), |
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MT6397_LDO("ldo_vgp4", VGP4, ldo_volt_table5, |
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MT6397_DIGLDO_CON8, 15, MT6397_DIGLDO_CON22, 0xE0), |
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MT6397_LDO("ldo_vgp5", VGP5, ldo_volt_table6, |
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MT6397_DIGLDO_CON9, 15, MT6397_DIGLDO_CON23, 0xE0), |
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MT6397_LDO("ldo_vgp6", VGP6, ldo_volt_table5, |
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MT6397_DIGLDO_CON10, 15, MT6397_DIGLDO_CON33, 0xE0), |
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MT6397_LDO("ldo_vibr", VIBR, ldo_volt_table7, |
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MT6397_DIGLDO_CON24, 15, MT6397_DIGLDO_CON25, 0xE00), |
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}; |
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static int mt6397_set_buck_vosel_reg(struct platform_device *pdev) |
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{ |
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struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent); |
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int i; |
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u32 regval; |
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for (i = 0; i < MT6397_MAX_REGULATOR; i++) { |
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if (mt6397_regulators[i].vselctrl_reg) { |
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if (regmap_read(mt6397->regmap, |
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mt6397_regulators[i].vselctrl_reg, |
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®val) < 0) { |
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dev_err(&pdev->dev, |
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"Failed to read buck ctrl\n"); |
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return -EIO; |
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} |
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if (regval & mt6397_regulators[i].vselctrl_mask) { |
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mt6397_regulators[i].desc.vsel_reg = |
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mt6397_regulators[i].vselon_reg; |
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} |
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} |
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} |
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return 0; |
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} |
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static int mt6397_regulator_probe(struct platform_device *pdev) |
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{ |
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struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent); |
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struct regulator_config config = {}; |
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struct regulator_dev *rdev; |
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int i; |
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u32 reg_value, version; |
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/* Query buck controller to select activated voltage register part */ |
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if (mt6397_set_buck_vosel_reg(pdev)) |
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return -EIO; |
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/* Read PMIC chip revision to update constraints and voltage table */ |
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if (regmap_read(mt6397->regmap, MT6397_CID, ®_value) < 0) { |
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dev_err(&pdev->dev, "Failed to read Chip ID\n"); |
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return -EIO; |
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} |
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dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value); |
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version = (reg_value & 0xFF); |
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switch (version) { |
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case MT6397_REGULATOR_ID91: |
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mt6397_regulators[MT6397_ID_VGP2].desc.volt_table = |
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ldo_volt_table5_v2; |
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break; |
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default: |
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break; |
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} |
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for (i = 0; i < MT6397_MAX_REGULATOR; i++) { |
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config.dev = &pdev->dev; |
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config.driver_data = &mt6397_regulators[i]; |
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config.regmap = mt6397->regmap; |
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rdev = devm_regulator_register(&pdev->dev, |
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&mt6397_regulators[i].desc, &config); |
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if (IS_ERR(rdev)) { |
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dev_err(&pdev->dev, "failed to register %s\n", |
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mt6397_regulators[i].desc.name); |
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return PTR_ERR(rdev); |
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} |
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} |
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return 0; |
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} |
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static const struct platform_device_id mt6397_platform_ids[] = { |
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{"mt6397-regulator", 0}, |
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{ /* sentinel */ }, |
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}; |
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MODULE_DEVICE_TABLE(platform, mt6397_platform_ids); |
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static const struct of_device_id mt6397_of_match[] = { |
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{ .compatible = "mediatek,mt6397-regulator", }, |
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{ /* sentinel */ }, |
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}; |
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MODULE_DEVICE_TABLE(of, mt6397_of_match); |
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static struct platform_driver mt6397_regulator_driver = { |
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.driver = { |
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.name = "mt6397-regulator", |
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.of_match_table = of_match_ptr(mt6397_of_match), |
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}, |
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.probe = mt6397_regulator_probe, |
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.id_table = mt6397_platform_ids, |
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}; |
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module_platform_driver(mt6397_regulator_driver); |
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MODULE_AUTHOR("Flora Fu <[email protected]>"); |
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MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6397 PMIC"); |
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MODULE_LICENSE("GPL");
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