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378 lines
9.6 KiB
378 lines
9.6 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* IDT RXS Gen.3 Serial RapidIO switch family support |
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* |
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* Copyright 2016 Integrated Device Technology, Inc. |
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*/ |
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#include <linux/stat.h> |
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#include <linux/module.h> |
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#include <linux/rio.h> |
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#include <linux/rio_drv.h> |
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#include <linux/rio_ids.h> |
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#include <linux/delay.h> |
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#include <asm/page.h> |
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#include "../rio.h" |
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#define RIO_EM_PW_STAT 0x40020 |
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#define RIO_PW_CTL 0x40204 |
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#define RIO_PW_CTL_PW_TMR 0xffffff00 |
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#define RIO_PW_ROUTE 0x40208 |
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#define RIO_EM_DEV_INT_EN 0x40030 |
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#define RIO_PLM_SPx_IMP_SPEC_CTL(x) (0x10100 + (x)*0x100) |
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#define RIO_PLM_SPx_IMP_SPEC_CTL_SOFT_RST 0x02000000 |
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#define RIO_PLM_SPx_PW_EN(x) (0x10118 + (x)*0x100) |
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#define RIO_PLM_SPx_PW_EN_OK2U 0x40000000 |
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#define RIO_PLM_SPx_PW_EN_LINIT 0x10000000 |
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#define RIO_BC_L2_Gn_ENTRYx_CSR(n, x) (0x31000 + (n)*0x400 + (x)*0x4) |
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#define RIO_SPx_L2_Gn_ENTRYy_CSR(x, n, y) \ |
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(0x51000 + (x)*0x2000 + (n)*0x400 + (y)*0x4) |
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static int |
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idtg3_route_add_entry(struct rio_mport *mport, u16 destid, u8 hopcount, |
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u16 table, u16 route_destid, u8 route_port) |
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{ |
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u32 rval; |
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u32 entry = route_port; |
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int err = 0; |
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pr_debug("RIO: %s t=0x%x did_%x to p_%x\n", |
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__func__, table, route_destid, entry); |
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if (route_destid > 0xFF) |
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return -EINVAL; |
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if (route_port == RIO_INVALID_ROUTE) |
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entry = RIO_RT_ENTRY_DROP_PKT; |
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if (table == RIO_GLOBAL_TABLE) { |
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/* Use broadcast register to update all per-port tables */ |
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err = rio_mport_write_config_32(mport, destid, hopcount, |
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RIO_BC_L2_Gn_ENTRYx_CSR(0, route_destid), |
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entry); |
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return err; |
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} |
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/* |
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* Verify that specified port/table number is valid |
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*/ |
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err = rio_mport_read_config_32(mport, destid, hopcount, |
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RIO_SWP_INFO_CAR, &rval); |
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if (err) |
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return err; |
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if (table >= RIO_GET_TOTAL_PORTS(rval)) |
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return -EINVAL; |
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err = rio_mport_write_config_32(mport, destid, hopcount, |
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RIO_SPx_L2_Gn_ENTRYy_CSR(table, 0, route_destid), |
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entry); |
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return err; |
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} |
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static int |
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idtg3_route_get_entry(struct rio_mport *mport, u16 destid, u8 hopcount, |
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u16 table, u16 route_destid, u8 *route_port) |
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{ |
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u32 rval; |
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int err; |
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if (route_destid > 0xFF) |
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return -EINVAL; |
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err = rio_mport_read_config_32(mport, destid, hopcount, |
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RIO_SWP_INFO_CAR, &rval); |
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if (err) |
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return err; |
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/* |
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* This switch device does not have the dedicated global routing table. |
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* It is substituted by reading routing table of the ingress port of |
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* maintenance read requests. |
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*/ |
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if (table == RIO_GLOBAL_TABLE) |
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table = RIO_GET_PORT_NUM(rval); |
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else if (table >= RIO_GET_TOTAL_PORTS(rval)) |
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return -EINVAL; |
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err = rio_mport_read_config_32(mport, destid, hopcount, |
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RIO_SPx_L2_Gn_ENTRYy_CSR(table, 0, route_destid), |
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&rval); |
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if (err) |
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return err; |
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if (rval == RIO_RT_ENTRY_DROP_PKT) |
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*route_port = RIO_INVALID_ROUTE; |
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else |
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*route_port = (u8)rval; |
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return 0; |
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} |
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static int |
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idtg3_route_clr_table(struct rio_mport *mport, u16 destid, u8 hopcount, |
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u16 table) |
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{ |
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u32 i; |
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u32 rval; |
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int err; |
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if (table == RIO_GLOBAL_TABLE) { |
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for (i = 0; i <= 0xff; i++) { |
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err = rio_mport_write_config_32(mport, destid, hopcount, |
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RIO_BC_L2_Gn_ENTRYx_CSR(0, i), |
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RIO_RT_ENTRY_DROP_PKT); |
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if (err) |
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break; |
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} |
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return err; |
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} |
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err = rio_mport_read_config_32(mport, destid, hopcount, |
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RIO_SWP_INFO_CAR, &rval); |
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if (err) |
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return err; |
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if (table >= RIO_GET_TOTAL_PORTS(rval)) |
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return -EINVAL; |
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for (i = 0; i <= 0xff; i++) { |
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err = rio_mport_write_config_32(mport, destid, hopcount, |
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RIO_SPx_L2_Gn_ENTRYy_CSR(table, 0, i), |
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RIO_RT_ENTRY_DROP_PKT); |
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if (err) |
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break; |
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} |
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return err; |
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} |
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/* |
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* This routine performs device-specific initialization only. |
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* All standard EM configuration should be performed at upper level. |
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*/ |
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static int |
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idtg3_em_init(struct rio_dev *rdev) |
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{ |
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int i, tmp; |
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u32 rval; |
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pr_debug("RIO: %s [%d:%d]\n", __func__, rdev->destid, rdev->hopcount); |
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/* Disable assertion of interrupt signal */ |
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rio_write_config_32(rdev, RIO_EM_DEV_INT_EN, 0); |
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/* Disable port-write event notifications during initialization */ |
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rio_write_config_32(rdev, rdev->em_efptr + RIO_EM_PW_TX_CTRL, |
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RIO_EM_PW_TX_CTRL_PW_DIS); |
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/* Configure Port-Write notifications for hot-swap events */ |
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tmp = RIO_GET_TOTAL_PORTS(rdev->swpinfo); |
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for (i = 0; i < tmp; i++) { |
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rio_read_config_32(rdev, |
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RIO_DEV_PORT_N_ERR_STS_CSR(rdev, i), |
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&rval); |
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if (rval & RIO_PORT_N_ERR_STS_PORT_UA) |
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continue; |
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/* Clear events signaled before enabling notification */ |
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rio_write_config_32(rdev, |
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rdev->em_efptr + RIO_EM_PN_ERR_DETECT(i), 0); |
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/* Enable event notifications */ |
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rio_write_config_32(rdev, |
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rdev->em_efptr + RIO_EM_PN_ERRRATE_EN(i), |
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RIO_EM_PN_ERRRATE_EN_OK2U | RIO_EM_PN_ERRRATE_EN_U2OK); |
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/* Enable port-write generation on events */ |
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rio_write_config_32(rdev, RIO_PLM_SPx_PW_EN(i), |
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RIO_PLM_SPx_PW_EN_OK2U | RIO_PLM_SPx_PW_EN_LINIT); |
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} |
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/* Set Port-Write destination port */ |
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tmp = RIO_GET_PORT_NUM(rdev->swpinfo); |
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rio_write_config_32(rdev, RIO_PW_ROUTE, 1 << tmp); |
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/* Enable sending port-write event notifications */ |
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rio_write_config_32(rdev, rdev->em_efptr + RIO_EM_PW_TX_CTRL, 0); |
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/* set TVAL = ~50us */ |
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rio_write_config_32(rdev, |
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rdev->phys_efptr + RIO_PORT_LINKTO_CTL_CSR, 0x8e << 8); |
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return 0; |
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} |
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/* |
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* idtg3_em_handler - device-specific error handler |
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* |
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* If the link is down (PORT_UNINIT) does nothing - this is considered |
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* as link partner removal from the port. |
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* |
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* If the link is up (PORT_OK) - situation is handled as *new* device insertion. |
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* In this case ERR_STOP bits are cleared by issuing soft reset command to the |
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* reporting port. Inbound and outbound ackIDs are cleared by the reset as well. |
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* This way the port is synchronized with freshly inserted device (assuming it |
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* was reset/powered-up on insertion). |
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* |
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* TODO: This is not sufficient in a situation when a link between two devices |
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* was down and up again (e.g. cable disconnect). For that situation full ackID |
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* realignment process has to be implemented. |
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*/ |
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static int |
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idtg3_em_handler(struct rio_dev *rdev, u8 pnum) |
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{ |
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u32 err_status; |
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u32 rval; |
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rio_read_config_32(rdev, |
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RIO_DEV_PORT_N_ERR_STS_CSR(rdev, pnum), |
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&err_status); |
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/* Do nothing for device/link removal */ |
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if (err_status & RIO_PORT_N_ERR_STS_PORT_UNINIT) |
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return 0; |
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/* When link is OK we have a device insertion. |
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* Request port soft reset to clear errors if they present. |
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* Inbound and outbound ackIDs will be 0 after reset. |
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*/ |
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if (err_status & (RIO_PORT_N_ERR_STS_OUT_ES | |
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RIO_PORT_N_ERR_STS_INP_ES)) { |
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rio_read_config_32(rdev, RIO_PLM_SPx_IMP_SPEC_CTL(pnum), &rval); |
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rio_write_config_32(rdev, RIO_PLM_SPx_IMP_SPEC_CTL(pnum), |
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rval | RIO_PLM_SPx_IMP_SPEC_CTL_SOFT_RST); |
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udelay(10); |
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rio_write_config_32(rdev, RIO_PLM_SPx_IMP_SPEC_CTL(pnum), rval); |
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msleep(500); |
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} |
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return 0; |
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} |
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static struct rio_switch_ops idtg3_switch_ops = { |
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.owner = THIS_MODULE, |
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.add_entry = idtg3_route_add_entry, |
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.get_entry = idtg3_route_get_entry, |
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.clr_table = idtg3_route_clr_table, |
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.em_init = idtg3_em_init, |
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.em_handle = idtg3_em_handler, |
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}; |
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static int idtg3_probe(struct rio_dev *rdev, const struct rio_device_id *id) |
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{ |
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pr_debug("RIO: %s for %s\n", __func__, rio_name(rdev)); |
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spin_lock(&rdev->rswitch->lock); |
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if (rdev->rswitch->ops) { |
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spin_unlock(&rdev->rswitch->lock); |
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return -EINVAL; |
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} |
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rdev->rswitch->ops = &idtg3_switch_ops; |
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if (rdev->do_enum) { |
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/* Disable hierarchical routing support: Existing fabric |
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* enumeration/discovery process (see rio-scan.c) uses 8-bit |
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* flat destination ID routing only. |
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*/ |
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rio_write_config_32(rdev, 0x5000 + RIO_BC_RT_CTL_CSR, 0); |
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} |
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spin_unlock(&rdev->rswitch->lock); |
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return 0; |
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} |
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static void idtg3_remove(struct rio_dev *rdev) |
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{ |
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pr_debug("RIO: %s for %s\n", __func__, rio_name(rdev)); |
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spin_lock(&rdev->rswitch->lock); |
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if (rdev->rswitch->ops == &idtg3_switch_ops) |
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rdev->rswitch->ops = NULL; |
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spin_unlock(&rdev->rswitch->lock); |
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} |
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/* |
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* Gen3 switches repeat sending PW messages until a corresponding event flag |
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* is cleared. Use shutdown notification to disable generation of port-write |
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* messages if their destination node is shut down. |
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*/ |
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static void idtg3_shutdown(struct rio_dev *rdev) |
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{ |
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int i; |
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u32 rval; |
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u16 destid; |
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/* Currently the enumerator node acts also as PW handler */ |
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if (!rdev->do_enum) |
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return; |
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pr_debug("RIO: %s(%s)\n", __func__, rio_name(rdev)); |
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rio_read_config_32(rdev, RIO_PW_ROUTE, &rval); |
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i = RIO_GET_PORT_NUM(rdev->swpinfo); |
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/* Check port-write destination port */ |
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if (!((1 << i) & rval)) |
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return; |
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/* Disable sending port-write event notifications if PW destID |
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* matches to one of the enumerator node |
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*/ |
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rio_read_config_32(rdev, rdev->em_efptr + RIO_EM_PW_TGT_DEVID, &rval); |
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if (rval & RIO_EM_PW_TGT_DEVID_DEV16) |
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destid = rval >> 16; |
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else |
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destid = ((rval & RIO_EM_PW_TGT_DEVID_D8) >> 16); |
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if (rdev->net->hport->host_deviceid == destid) { |
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rio_write_config_32(rdev, |
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rdev->em_efptr + RIO_EM_PW_TX_CTRL, 0); |
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pr_debug("RIO: %s(%s) PW transmission disabled\n", |
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__func__, rio_name(rdev)); |
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} |
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} |
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static const struct rio_device_id idtg3_id_table[] = { |
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{RIO_DEVICE(RIO_DID_IDTRXS1632, RIO_VID_IDT)}, |
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{RIO_DEVICE(RIO_DID_IDTRXS2448, RIO_VID_IDT)}, |
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{ 0, } /* terminate list */ |
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}; |
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static struct rio_driver idtg3_driver = { |
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.name = "idt_gen3", |
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.id_table = idtg3_id_table, |
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.probe = idtg3_probe, |
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.remove = idtg3_remove, |
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.shutdown = idtg3_shutdown, |
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}; |
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static int __init idtg3_init(void) |
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{ |
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return rio_register_driver(&idtg3_driver); |
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} |
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static void __exit idtg3_exit(void) |
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{ |
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pr_debug("RIO: %s\n", __func__); |
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rio_unregister_driver(&idtg3_driver); |
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pr_debug("RIO: %s done\n", __func__); |
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} |
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device_initcall(idtg3_init); |
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module_exit(idtg3_exit); |
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MODULE_DESCRIPTION("IDT RXS Gen.3 Serial RapidIO switch family driver"); |
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MODULE_AUTHOR("Integrated Device Technology, Inc."); |
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MODULE_LICENSE("GPL");
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