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238 lines
6.2 KiB
238 lines
6.2 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* Copyright (C) 2017 John Crispin <[email protected]> |
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* |
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* Based on code from |
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com> |
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*/ |
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#include <linux/delay.h> |
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#include <linux/err.h> |
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#include <linux/io.h> |
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#include <linux/kernel.h> |
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#include <linux/mfd/syscon.h> |
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#include <linux/module.h> |
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#include <linux/mutex.h> |
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#include <linux/of_platform.h> |
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#include <linux/phy/phy.h> |
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#include <linux/platform_device.h> |
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#include <linux/regmap.h> |
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#include <linux/reset.h> |
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#define RT_SYSC_REG_SYSCFG1 0x014 |
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#define RT_SYSC_REG_CLKCFG1 0x030 |
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#define RT_SYSC_REG_USB_PHY_CFG 0x05c |
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#define OFS_U2_PHY_AC0 0x800 |
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#define OFS_U2_PHY_AC1 0x804 |
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#define OFS_U2_PHY_AC2 0x808 |
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#define OFS_U2_PHY_ACR0 0x810 |
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#define OFS_U2_PHY_ACR1 0x814 |
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#define OFS_U2_PHY_ACR2 0x818 |
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#define OFS_U2_PHY_ACR3 0x81C |
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#define OFS_U2_PHY_ACR4 0x820 |
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#define OFS_U2_PHY_AMON0 0x824 |
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#define OFS_U2_PHY_DCR0 0x860 |
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#define OFS_U2_PHY_DCR1 0x864 |
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#define OFS_U2_PHY_DTM0 0x868 |
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#define OFS_U2_PHY_DTM1 0x86C |
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#define RT_RSTCTRL_UDEV BIT(25) |
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#define RT_RSTCTRL_UHST BIT(22) |
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#define RT_SYSCFG1_USB0_HOST_MODE BIT(10) |
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#define MT7620_CLKCFG1_UPHY0_CLK_EN BIT(25) |
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#define MT7620_CLKCFG1_UPHY1_CLK_EN BIT(22) |
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#define RT_CLKCFG1_UPHY1_CLK_EN BIT(20) |
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#define RT_CLKCFG1_UPHY0_CLK_EN BIT(18) |
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#define USB_PHY_UTMI_8B60M BIT(1) |
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#define UDEV_WAKEUP BIT(0) |
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struct ralink_usb_phy { |
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struct reset_control *rstdev; |
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struct reset_control *rsthost; |
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u32 clk; |
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struct phy *phy; |
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void __iomem *base; |
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struct regmap *sysctl; |
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}; |
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static void u2_phy_w32(struct ralink_usb_phy *phy, u32 val, u32 reg) |
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{ |
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writel(val, phy->base + reg); |
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} |
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static u32 u2_phy_r32(struct ralink_usb_phy *phy, u32 reg) |
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{ |
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return readl(phy->base + reg); |
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} |
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static void ralink_usb_phy_init(struct ralink_usb_phy *phy) |
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{ |
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u2_phy_r32(phy, OFS_U2_PHY_AC2); |
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u2_phy_r32(phy, OFS_U2_PHY_ACR0); |
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u2_phy_r32(phy, OFS_U2_PHY_DCR0); |
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u2_phy_w32(phy, 0x00ffff02, OFS_U2_PHY_DCR0); |
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u2_phy_r32(phy, OFS_U2_PHY_DCR0); |
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u2_phy_w32(phy, 0x00555502, OFS_U2_PHY_DCR0); |
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u2_phy_r32(phy, OFS_U2_PHY_DCR0); |
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u2_phy_w32(phy, 0x00aaaa02, OFS_U2_PHY_DCR0); |
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u2_phy_r32(phy, OFS_U2_PHY_DCR0); |
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u2_phy_w32(phy, 0x00000402, OFS_U2_PHY_DCR0); |
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u2_phy_r32(phy, OFS_U2_PHY_DCR0); |
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u2_phy_w32(phy, 0x0048086a, OFS_U2_PHY_AC0); |
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u2_phy_w32(phy, 0x4400001c, OFS_U2_PHY_AC1); |
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u2_phy_w32(phy, 0xc0200000, OFS_U2_PHY_ACR3); |
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u2_phy_w32(phy, 0x02000000, OFS_U2_PHY_DTM0); |
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} |
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static int ralink_usb_phy_power_on(struct phy *_phy) |
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{ |
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struct ralink_usb_phy *phy = phy_get_drvdata(_phy); |
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u32 t; |
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/* enable the phy */ |
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regmap_update_bits(phy->sysctl, RT_SYSC_REG_CLKCFG1, |
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phy->clk, phy->clk); |
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/* setup host mode */ |
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regmap_update_bits(phy->sysctl, RT_SYSC_REG_SYSCFG1, |
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RT_SYSCFG1_USB0_HOST_MODE, |
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RT_SYSCFG1_USB0_HOST_MODE); |
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/* deassert the reset lines */ |
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reset_control_deassert(phy->rsthost); |
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reset_control_deassert(phy->rstdev); |
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/* |
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* The SDK kernel had a delay of 100ms. however on device |
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* testing showed that 10ms is enough |
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*/ |
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mdelay(10); |
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if (phy->base) |
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ralink_usb_phy_init(phy); |
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/* print some status info */ |
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regmap_read(phy->sysctl, RT_SYSC_REG_USB_PHY_CFG, &t); |
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dev_info(&phy->phy->dev, "remote usb device wakeup %s\n", |
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(t & UDEV_WAKEUP) ? ("enabled") : ("disabled")); |
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if (t & USB_PHY_UTMI_8B60M) |
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dev_info(&phy->phy->dev, "UTMI 8bit 60MHz\n"); |
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else |
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dev_info(&phy->phy->dev, "UTMI 16bit 30MHz\n"); |
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return 0; |
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} |
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static int ralink_usb_phy_power_off(struct phy *_phy) |
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{ |
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struct ralink_usb_phy *phy = phy_get_drvdata(_phy); |
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/* disable the phy */ |
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regmap_update_bits(phy->sysctl, RT_SYSC_REG_CLKCFG1, |
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phy->clk, 0); |
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/* assert the reset lines */ |
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reset_control_assert(phy->rstdev); |
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reset_control_assert(phy->rsthost); |
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return 0; |
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} |
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static const struct phy_ops ralink_usb_phy_ops = { |
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.power_on = ralink_usb_phy_power_on, |
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.power_off = ralink_usb_phy_power_off, |
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.owner = THIS_MODULE, |
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}; |
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static const struct of_device_id ralink_usb_phy_of_match[] = { |
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{ |
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.compatible = "ralink,rt3352-usbphy", |
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.data = (void *)(uintptr_t)(RT_CLKCFG1_UPHY1_CLK_EN | |
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RT_CLKCFG1_UPHY0_CLK_EN) |
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}, |
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{ |
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.compatible = "mediatek,mt7620-usbphy", |
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.data = (void *)(uintptr_t)(MT7620_CLKCFG1_UPHY1_CLK_EN | |
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MT7620_CLKCFG1_UPHY0_CLK_EN) |
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}, |
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{ |
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.compatible = "mediatek,mt7628-usbphy", |
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.data = (void *)(uintptr_t)(MT7620_CLKCFG1_UPHY1_CLK_EN | |
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MT7620_CLKCFG1_UPHY0_CLK_EN) }, |
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{ }, |
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}; |
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MODULE_DEVICE_TABLE(of, ralink_usb_phy_of_match); |
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static int ralink_usb_phy_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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struct phy_provider *phy_provider; |
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const struct of_device_id *match; |
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struct ralink_usb_phy *phy; |
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match = of_match_device(ralink_usb_phy_of_match, &pdev->dev); |
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if (!match) |
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return -ENODEV; |
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phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL); |
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if (!phy) |
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return -ENOMEM; |
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phy->clk = (uintptr_t)match->data; |
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phy->base = NULL; |
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phy->sysctl = syscon_regmap_lookup_by_phandle(dev->of_node, "ralink,sysctl"); |
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if (IS_ERR(phy->sysctl)) { |
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dev_err(dev, "failed to get sysctl registers\n"); |
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return PTR_ERR(phy->sysctl); |
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} |
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/* The MT7628 and MT7688 require extra setup of PHY registers. */ |
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if (of_device_is_compatible(dev->of_node, "mediatek,mt7628-usbphy")) { |
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phy->base = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(phy->base)) { |
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dev_err(dev, "failed to remap register memory\n"); |
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return PTR_ERR(phy->base); |
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} |
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} |
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phy->rsthost = devm_reset_control_get(&pdev->dev, "host"); |
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if (IS_ERR(phy->rsthost)) { |
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dev_err(dev, "host reset is missing\n"); |
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return PTR_ERR(phy->rsthost); |
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} |
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phy->rstdev = devm_reset_control_get(&pdev->dev, "device"); |
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if (IS_ERR(phy->rstdev)) { |
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dev_err(dev, "device reset is missing\n"); |
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return PTR_ERR(phy->rstdev); |
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} |
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phy->phy = devm_phy_create(dev, NULL, &ralink_usb_phy_ops); |
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if (IS_ERR(phy->phy)) { |
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dev_err(dev, "failed to create PHY\n"); |
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return PTR_ERR(phy->phy); |
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} |
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phy_set_drvdata(phy->phy, phy); |
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phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); |
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return PTR_ERR_OR_ZERO(phy_provider); |
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} |
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static struct platform_driver ralink_usb_phy_driver = { |
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.probe = ralink_usb_phy_probe, |
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.driver = { |
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.of_match_table = ralink_usb_phy_of_match, |
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.name = "ralink-usb-phy", |
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} |
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}; |
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module_platform_driver(ralink_usb_phy_driver); |
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MODULE_DESCRIPTION("Ralink USB phy driver"); |
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MODULE_AUTHOR("John Crispin <[email protected]>"); |
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MODULE_LICENSE("GPL v2");
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