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233 lines
5.6 KiB
233 lines
5.6 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright 2016 Broadcom |
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*/ |
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#include <linux/device.h> |
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#include <linux/io.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/pci.h> |
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#include <linux/pci-ecam.h> |
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#include <linux/slab.h> |
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/* |
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* On 64-bit systems, we do a single ioremap for the whole config space |
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* since we have enough virtual address range available. On 32-bit, we |
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* ioremap the config space for each bus individually. |
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*/ |
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static const bool per_bus_mapping = !IS_ENABLED(CONFIG_64BIT); |
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/* |
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* Create a PCI config space window |
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* - reserve mem region |
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* - alloc struct pci_config_window with space for all mappings |
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* - ioremap the config space |
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*/ |
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struct pci_config_window *pci_ecam_create(struct device *dev, |
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struct resource *cfgres, struct resource *busr, |
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const struct pci_ecam_ops *ops) |
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{ |
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unsigned int bus_shift = ops->bus_shift; |
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struct pci_config_window *cfg; |
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unsigned int bus_range, bus_range_max, bsz; |
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struct resource *conflict; |
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int err; |
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if (busr->start > busr->end) |
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return ERR_PTR(-EINVAL); |
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cfg = kzalloc(sizeof(*cfg), GFP_KERNEL); |
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if (!cfg) |
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return ERR_PTR(-ENOMEM); |
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/* ECAM-compliant platforms need not supply ops->bus_shift */ |
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if (!bus_shift) |
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bus_shift = PCIE_ECAM_BUS_SHIFT; |
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cfg->parent = dev; |
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cfg->ops = ops; |
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cfg->busr.start = busr->start; |
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cfg->busr.end = busr->end; |
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cfg->busr.flags = IORESOURCE_BUS; |
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cfg->bus_shift = bus_shift; |
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bus_range = resource_size(&cfg->busr); |
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bus_range_max = resource_size(cfgres) >> bus_shift; |
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if (bus_range > bus_range_max) { |
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bus_range = bus_range_max; |
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cfg->busr.end = busr->start + bus_range - 1; |
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dev_warn(dev, "ECAM area %pR can only accommodate %pR (reduced from %pR desired)\n", |
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cfgres, &cfg->busr, busr); |
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} |
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bsz = 1 << bus_shift; |
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cfg->res.start = cfgres->start; |
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cfg->res.end = cfgres->end; |
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cfg->res.flags = IORESOURCE_MEM | IORESOURCE_BUSY; |
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cfg->res.name = "PCI ECAM"; |
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conflict = request_resource_conflict(&iomem_resource, &cfg->res); |
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if (conflict) { |
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err = -EBUSY; |
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dev_err(dev, "can't claim ECAM area %pR: address conflict with %s %pR\n", |
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&cfg->res, conflict->name, conflict); |
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goto err_exit; |
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} |
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if (per_bus_mapping) { |
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cfg->winp = kcalloc(bus_range, sizeof(*cfg->winp), GFP_KERNEL); |
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if (!cfg->winp) |
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goto err_exit_malloc; |
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} else { |
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cfg->win = pci_remap_cfgspace(cfgres->start, bus_range * bsz); |
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if (!cfg->win) |
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goto err_exit_iomap; |
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} |
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if (ops->init) { |
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err = ops->init(cfg); |
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if (err) |
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goto err_exit; |
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} |
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dev_info(dev, "ECAM at %pR for %pR\n", &cfg->res, &cfg->busr); |
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return cfg; |
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err_exit_iomap: |
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dev_err(dev, "ECAM ioremap failed\n"); |
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err_exit_malloc: |
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err = -ENOMEM; |
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err_exit: |
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pci_ecam_free(cfg); |
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return ERR_PTR(err); |
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} |
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EXPORT_SYMBOL_GPL(pci_ecam_create); |
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void pci_ecam_free(struct pci_config_window *cfg) |
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{ |
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int i; |
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if (per_bus_mapping) { |
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if (cfg->winp) { |
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for (i = 0; i < resource_size(&cfg->busr); i++) |
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if (cfg->winp[i]) |
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iounmap(cfg->winp[i]); |
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kfree(cfg->winp); |
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} |
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} else { |
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if (cfg->win) |
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iounmap(cfg->win); |
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} |
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if (cfg->res.parent) |
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release_resource(&cfg->res); |
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kfree(cfg); |
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} |
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EXPORT_SYMBOL_GPL(pci_ecam_free); |
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static int pci_ecam_add_bus(struct pci_bus *bus) |
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{ |
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struct pci_config_window *cfg = bus->sysdata; |
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unsigned int bsz = 1 << cfg->bus_shift; |
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unsigned int busn = bus->number; |
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phys_addr_t start; |
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if (!per_bus_mapping) |
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return 0; |
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if (busn < cfg->busr.start || busn > cfg->busr.end) |
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return -EINVAL; |
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busn -= cfg->busr.start; |
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start = cfg->res.start + busn * bsz; |
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cfg->winp[busn] = pci_remap_cfgspace(start, bsz); |
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if (!cfg->winp[busn]) |
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return -ENOMEM; |
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return 0; |
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} |
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static void pci_ecam_remove_bus(struct pci_bus *bus) |
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{ |
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struct pci_config_window *cfg = bus->sysdata; |
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unsigned int busn = bus->number; |
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if (!per_bus_mapping || busn < cfg->busr.start || busn > cfg->busr.end) |
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return; |
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busn -= cfg->busr.start; |
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if (cfg->winp[busn]) { |
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iounmap(cfg->winp[busn]); |
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cfg->winp[busn] = NULL; |
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} |
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} |
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/* |
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* Function to implement the pci_ops ->map_bus method |
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*/ |
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void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn, |
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int where) |
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{ |
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struct pci_config_window *cfg = bus->sysdata; |
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unsigned int bus_shift = cfg->ops->bus_shift; |
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unsigned int devfn_shift = cfg->ops->bus_shift - 8; |
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unsigned int busn = bus->number; |
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void __iomem *base; |
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u32 bus_offset, devfn_offset; |
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if (busn < cfg->busr.start || busn > cfg->busr.end) |
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return NULL; |
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busn -= cfg->busr.start; |
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if (per_bus_mapping) { |
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base = cfg->winp[busn]; |
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busn = 0; |
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} else |
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base = cfg->win; |
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if (cfg->ops->bus_shift) { |
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bus_offset = (busn & PCIE_ECAM_BUS_MASK) << bus_shift; |
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devfn_offset = (devfn & PCIE_ECAM_DEVFN_MASK) << devfn_shift; |
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where &= PCIE_ECAM_REG_MASK; |
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return base + (bus_offset | devfn_offset | where); |
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} |
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return base + PCIE_ECAM_OFFSET(busn, devfn, where); |
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} |
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EXPORT_SYMBOL_GPL(pci_ecam_map_bus); |
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/* ECAM ops */ |
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const struct pci_ecam_ops pci_generic_ecam_ops = { |
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.pci_ops = { |
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.add_bus = pci_ecam_add_bus, |
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.remove_bus = pci_ecam_remove_bus, |
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.map_bus = pci_ecam_map_bus, |
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.read = pci_generic_config_read, |
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.write = pci_generic_config_write, |
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} |
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}; |
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EXPORT_SYMBOL_GPL(pci_generic_ecam_ops); |
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#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) |
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/* ECAM ops for 32-bit access only (non-compliant) */ |
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const struct pci_ecam_ops pci_32b_ops = { |
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.pci_ops = { |
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.add_bus = pci_ecam_add_bus, |
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.remove_bus = pci_ecam_remove_bus, |
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.map_bus = pci_ecam_map_bus, |
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.read = pci_generic_config_read32, |
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.write = pci_generic_config_write32, |
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} |
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}; |
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/* ECAM ops for 32-bit read only (non-compliant) */ |
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const struct pci_ecam_ops pci_32b_read_ops = { |
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.pci_ops = { |
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.add_bus = pci_ecam_add_bus, |
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.remove_bus = pci_ecam_remove_bus, |
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.map_bus = pci_ecam_map_bus, |
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.read = pci_generic_config_read32, |
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.write = pci_generic_config_write, |
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} |
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}; |
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#endif
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