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51 lines
1.3 KiB
51 lines
1.3 KiB
# SPDX-License-Identifier: GPL-2.0-only |
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menu "NAND" |
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config MTD_NAND_CORE |
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tristate |
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source "drivers/mtd/nand/onenand/Kconfig" |
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source "drivers/mtd/nand/raw/Kconfig" |
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source "drivers/mtd/nand/spi/Kconfig" |
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menu "ECC engine support" |
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config MTD_NAND_ECC |
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bool |
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select MTD_NAND_CORE |
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config MTD_NAND_ECC_SW_HAMMING |
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bool "Software Hamming ECC engine" |
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default y if MTD_RAW_NAND |
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select MTD_NAND_ECC |
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help |
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This enables support for software Hamming error |
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correction. This correction can correct up to 1 bit error |
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per chunk and detect up to 2 bit errors. While it used to be |
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widely used with old parts, newer NAND chips usually require |
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more strength correction and in this case BCH or RS will be |
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preferred. |
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config MTD_NAND_ECC_SW_HAMMING_SMC |
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bool "NAND ECC Smart Media byte order" |
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depends on MTD_NAND_ECC_SW_HAMMING |
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default n |
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help |
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Software ECC according to the Smart Media Specification. |
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The original Linux implementation had byte 0 and 1 swapped. |
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config MTD_NAND_ECC_SW_BCH |
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bool "Software BCH ECC engine" |
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select BCH |
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select MTD_NAND_ECC |
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default n |
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help |
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This enables support for software BCH error correction. Binary BCH |
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codes are more powerful and cpu intensive than traditional Hamming |
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ECC codes. They are used with NAND devices requiring more than 1 bit |
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of error correction. |
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endmenu |
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endmenu
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