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458 lines
13 KiB
458 lines
13 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* twl6030-irq.c - TWL6030 irq support |
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* |
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* Copyright (C) 2005-2009 Texas Instruments, Inc. |
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* |
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* Modifications to defer interrupt handling to a kernel thread: |
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* Copyright (C) 2006 MontaVista Software, Inc. |
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* |
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* Based on tlv320aic23.c: |
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* Copyright (c) by Kai Svahn <[email protected]> |
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* |
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* Code cleanup and modifications to IRQ handler. |
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* by syed khasim <[email protected]> |
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* |
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* TWL6030 specific code and IRQ handling changes by |
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* Jagadeesh Bhaskar Pakaravoor <[email protected]> |
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* Balaji T K <[email protected]> |
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*/ |
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#include <linux/export.h> |
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#include <linux/interrupt.h> |
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#include <linux/irq.h> |
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#include <linux/kthread.h> |
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#include <linux/mfd/twl.h> |
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#include <linux/platform_device.h> |
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#include <linux/suspend.h> |
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#include <linux/of.h> |
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#include <linux/irqdomain.h> |
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#include <linux/of_device.h> |
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#include "twl-core.h" |
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/* |
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* TWL6030 (unlike its predecessors, which had two level interrupt handling) |
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* three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C. |
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* It exposes status bits saying who has raised an interrupt. There are |
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* three mask registers that corresponds to these status registers, that |
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* enables/disables these interrupts. |
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* |
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* We set up IRQs starting at a platform-specified base. An interrupt map table, |
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* specifies mapping between interrupt number and the associated module. |
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*/ |
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#define TWL6030_NR_IRQS 20 |
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static int twl6030_interrupt_mapping[24] = { |
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PWR_INTR_OFFSET, /* Bit 0 PWRON */ |
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PWR_INTR_OFFSET, /* Bit 1 RPWRON */ |
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PWR_INTR_OFFSET, /* Bit 2 BAT_VLOW */ |
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RTC_INTR_OFFSET, /* Bit 3 RTC_ALARM */ |
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RTC_INTR_OFFSET, /* Bit 4 RTC_PERIOD */ |
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HOTDIE_INTR_OFFSET, /* Bit 5 HOT_DIE */ |
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SMPSLDO_INTR_OFFSET, /* Bit 6 VXXX_SHORT */ |
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SMPSLDO_INTR_OFFSET, /* Bit 7 VMMC_SHORT */ |
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SMPSLDO_INTR_OFFSET, /* Bit 8 VUSIM_SHORT */ |
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BATDETECT_INTR_OFFSET, /* Bit 9 BAT */ |
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SIMDETECT_INTR_OFFSET, /* Bit 10 SIM */ |
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MMCDETECT_INTR_OFFSET, /* Bit 11 MMC */ |
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RSV_INTR_OFFSET, /* Bit 12 Reserved */ |
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MADC_INTR_OFFSET, /* Bit 13 GPADC_RT_EOC */ |
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MADC_INTR_OFFSET, /* Bit 14 GPADC_SW_EOC */ |
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GASGAUGE_INTR_OFFSET, /* Bit 15 CC_AUTOCAL */ |
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USBOTG_INTR_OFFSET, /* Bit 16 ID_WKUP */ |
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USBOTG_INTR_OFFSET, /* Bit 17 VBUS_WKUP */ |
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USBOTG_INTR_OFFSET, /* Bit 18 ID */ |
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USB_PRES_INTR_OFFSET, /* Bit 19 VBUS */ |
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CHARGER_INTR_OFFSET, /* Bit 20 CHRG_CTRL */ |
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CHARGERFAULT_INTR_OFFSET, /* Bit 21 EXT_CHRG */ |
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CHARGERFAULT_INTR_OFFSET, /* Bit 22 INT_CHRG */ |
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RSV_INTR_OFFSET, /* Bit 23 Reserved */ |
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}; |
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static int twl6032_interrupt_mapping[24] = { |
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PWR_INTR_OFFSET, /* Bit 0 PWRON */ |
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PWR_INTR_OFFSET, /* Bit 1 RPWRON */ |
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PWR_INTR_OFFSET, /* Bit 2 SYS_VLOW */ |
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RTC_INTR_OFFSET, /* Bit 3 RTC_ALARM */ |
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RTC_INTR_OFFSET, /* Bit 4 RTC_PERIOD */ |
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HOTDIE_INTR_OFFSET, /* Bit 5 HOT_DIE */ |
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SMPSLDO_INTR_OFFSET, /* Bit 6 VXXX_SHORT */ |
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PWR_INTR_OFFSET, /* Bit 7 SPDURATION */ |
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PWR_INTR_OFFSET, /* Bit 8 WATCHDOG */ |
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BATDETECT_INTR_OFFSET, /* Bit 9 BAT */ |
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SIMDETECT_INTR_OFFSET, /* Bit 10 SIM */ |
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MMCDETECT_INTR_OFFSET, /* Bit 11 MMC */ |
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MADC_INTR_OFFSET, /* Bit 12 GPADC_RT_EOC */ |
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MADC_INTR_OFFSET, /* Bit 13 GPADC_SW_EOC */ |
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GASGAUGE_INTR_OFFSET, /* Bit 14 CC_EOC */ |
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GASGAUGE_INTR_OFFSET, /* Bit 15 CC_AUTOCAL */ |
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USBOTG_INTR_OFFSET, /* Bit 16 ID_WKUP */ |
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USBOTG_INTR_OFFSET, /* Bit 17 VBUS_WKUP */ |
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USBOTG_INTR_OFFSET, /* Bit 18 ID */ |
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USB_PRES_INTR_OFFSET, /* Bit 19 VBUS */ |
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CHARGER_INTR_OFFSET, /* Bit 20 CHRG_CTRL */ |
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CHARGERFAULT_INTR_OFFSET, /* Bit 21 EXT_CHRG */ |
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CHARGERFAULT_INTR_OFFSET, /* Bit 22 INT_CHRG */ |
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RSV_INTR_OFFSET, /* Bit 23 Reserved */ |
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}; |
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/*----------------------------------------------------------------------*/ |
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struct twl6030_irq { |
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unsigned int irq_base; |
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int twl_irq; |
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bool irq_wake_enabled; |
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atomic_t wakeirqs; |
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struct notifier_block pm_nb; |
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struct irq_chip irq_chip; |
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struct irq_domain *irq_domain; |
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const int *irq_mapping_tbl; |
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}; |
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static struct twl6030_irq *twl6030_irq; |
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static int twl6030_irq_pm_notifier(struct notifier_block *notifier, |
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unsigned long pm_event, void *unused) |
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{ |
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int chained_wakeups; |
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struct twl6030_irq *pdata = container_of(notifier, struct twl6030_irq, |
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pm_nb); |
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switch (pm_event) { |
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case PM_SUSPEND_PREPARE: |
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chained_wakeups = atomic_read(&pdata->wakeirqs); |
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if (chained_wakeups && !pdata->irq_wake_enabled) { |
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if (enable_irq_wake(pdata->twl_irq)) |
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pr_err("twl6030 IRQ wake enable failed\n"); |
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else |
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pdata->irq_wake_enabled = true; |
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} else if (!chained_wakeups && pdata->irq_wake_enabled) { |
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disable_irq_wake(pdata->twl_irq); |
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pdata->irq_wake_enabled = false; |
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} |
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disable_irq(pdata->twl_irq); |
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break; |
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case PM_POST_SUSPEND: |
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enable_irq(pdata->twl_irq); |
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break; |
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default: |
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break; |
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} |
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return NOTIFY_DONE; |
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} |
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/* |
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* Threaded irq handler for the twl6030 interrupt. |
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* We query the interrupt controller in the twl6030 to determine |
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* which module is generating the interrupt request and call |
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* handle_nested_irq for that module. |
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*/ |
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static irqreturn_t twl6030_irq_thread(int irq, void *data) |
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{ |
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int i, ret; |
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union { |
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u8 bytes[4]; |
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__le32 int_sts; |
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} sts; |
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u32 int_sts; /* sts.int_sts converted to CPU endianness */ |
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struct twl6030_irq *pdata = data; |
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/* read INT_STS_A, B and C in one shot using a burst read */ |
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ret = twl_i2c_read(TWL_MODULE_PIH, sts.bytes, REG_INT_STS_A, 3); |
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if (ret) { |
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pr_warn("twl6030_irq: I2C error %d reading PIH ISR\n", ret); |
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return IRQ_HANDLED; |
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} |
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sts.bytes[3] = 0; /* Only 24 bits are valid*/ |
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/* |
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* Since VBUS status bit is not reliable for VBUS disconnect |
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* use CHARGER VBUS detection status bit instead. |
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*/ |
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if (sts.bytes[2] & 0x10) |
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sts.bytes[2] |= 0x08; |
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int_sts = le32_to_cpu(sts.int_sts); |
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for (i = 0; int_sts; int_sts >>= 1, i++) |
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if (int_sts & 0x1) { |
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int module_irq = |
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irq_find_mapping(pdata->irq_domain, |
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pdata->irq_mapping_tbl[i]); |
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if (module_irq) |
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handle_nested_irq(module_irq); |
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else |
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pr_err("twl6030_irq: Unmapped PIH ISR %u detected\n", |
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i); |
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pr_debug("twl6030_irq: PIH ISR %u, virq%u\n", |
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i, module_irq); |
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} |
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/* |
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* NOTE: |
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* Simulation confirms that documentation is wrong w.r.t the |
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* interrupt status clear operation. A single *byte* write to |
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* any one of STS_A to STS_C register results in all three |
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* STS registers being reset. Since it does not matter which |
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* value is written, all three registers are cleared on a |
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* single byte write, so we just use 0x0 to clear. |
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*/ |
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ret = twl_i2c_write_u8(TWL_MODULE_PIH, 0x00, REG_INT_STS_A); |
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if (ret) |
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pr_warn("twl6030_irq: I2C error in clearing PIH ISR\n"); |
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return IRQ_HANDLED; |
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} |
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/*----------------------------------------------------------------------*/ |
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static int twl6030_irq_set_wake(struct irq_data *d, unsigned int on) |
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{ |
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struct twl6030_irq *pdata = irq_data_get_irq_chip_data(d); |
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if (on) |
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atomic_inc(&pdata->wakeirqs); |
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else |
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atomic_dec(&pdata->wakeirqs); |
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return 0; |
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} |
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int twl6030_interrupt_unmask(u8 bit_mask, u8 offset) |
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{ |
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int ret; |
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u8 unmask_value; |
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ret = twl_i2c_read_u8(TWL_MODULE_PIH, &unmask_value, |
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REG_INT_STS_A + offset); |
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unmask_value &= (~(bit_mask)); |
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ret |= twl_i2c_write_u8(TWL_MODULE_PIH, unmask_value, |
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REG_INT_STS_A + offset); /* unmask INT_MSK_A/B/C */ |
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return ret; |
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} |
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EXPORT_SYMBOL(twl6030_interrupt_unmask); |
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int twl6030_interrupt_mask(u8 bit_mask, u8 offset) |
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{ |
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int ret; |
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u8 mask_value; |
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ret = twl_i2c_read_u8(TWL_MODULE_PIH, &mask_value, |
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REG_INT_STS_A + offset); |
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mask_value |= (bit_mask); |
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ret |= twl_i2c_write_u8(TWL_MODULE_PIH, mask_value, |
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REG_INT_STS_A + offset); /* mask INT_MSK_A/B/C */ |
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return ret; |
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} |
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EXPORT_SYMBOL(twl6030_interrupt_mask); |
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int twl6030_mmc_card_detect_config(void) |
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{ |
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int ret; |
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u8 reg_val = 0; |
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/* Unmasking the Card detect Interrupt line for MMC1 from Phoenix */ |
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twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK, |
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REG_INT_MSK_LINE_B); |
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twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK, |
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REG_INT_MSK_STS_B); |
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/* |
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* Initially Configuring MMC_CTRL for receiving interrupts & |
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* Card status on TWL6030 for MMC1 |
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*/ |
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ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, ®_val, TWL6030_MMCCTRL); |
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if (ret < 0) { |
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pr_err("twl6030: Failed to read MMCCTRL, error %d\n", ret); |
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return ret; |
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} |
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reg_val &= ~VMMC_AUTO_OFF; |
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reg_val |= SW_FC; |
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ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, TWL6030_MMCCTRL); |
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if (ret < 0) { |
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pr_err("twl6030: Failed to write MMCCTRL, error %d\n", ret); |
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return ret; |
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} |
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/* Configuring PullUp-PullDown register */ |
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ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, ®_val, |
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TWL6030_CFG_INPUT_PUPD3); |
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if (ret < 0) { |
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pr_err("twl6030: Failed to read CFG_INPUT_PUPD3, error %d\n", |
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ret); |
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return ret; |
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} |
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reg_val &= ~(MMC_PU | MMC_PD); |
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ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, |
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TWL6030_CFG_INPUT_PUPD3); |
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if (ret < 0) { |
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pr_err("twl6030: Failed to write CFG_INPUT_PUPD3, error %d\n", |
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ret); |
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return ret; |
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} |
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return irq_find_mapping(twl6030_irq->irq_domain, |
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MMCDETECT_INTR_OFFSET); |
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} |
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EXPORT_SYMBOL(twl6030_mmc_card_detect_config); |
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int twl6030_mmc_card_detect(struct device *dev, int slot) |
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{ |
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int ret = -EIO; |
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u8 read_reg = 0; |
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struct platform_device *pdev = to_platform_device(dev); |
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if (pdev->id) { |
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/* TWL6030 provide's Card detect support for |
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* only MMC1 controller. |
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*/ |
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pr_err("Unknown MMC controller %d in %s\n", pdev->id, __func__); |
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return ret; |
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} |
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/* |
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* BIT0 of MMC_CTRL on TWL6030 provides card status for MMC1 |
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* 0 - Card not present ,1 - Card present |
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*/ |
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ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &read_reg, |
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TWL6030_MMCCTRL); |
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if (ret >= 0) |
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ret = read_reg & STS_MMC; |
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return ret; |
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} |
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EXPORT_SYMBOL(twl6030_mmc_card_detect); |
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static int twl6030_irq_map(struct irq_domain *d, unsigned int virq, |
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irq_hw_number_t hwirq) |
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{ |
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struct twl6030_irq *pdata = d->host_data; |
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irq_set_chip_data(virq, pdata); |
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irq_set_chip_and_handler(virq, &pdata->irq_chip, handle_simple_irq); |
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irq_set_nested_thread(virq, true); |
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irq_set_parent(virq, pdata->twl_irq); |
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irq_set_noprobe(virq); |
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return 0; |
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} |
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static void twl6030_irq_unmap(struct irq_domain *d, unsigned int virq) |
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{ |
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irq_set_chip_and_handler(virq, NULL, NULL); |
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irq_set_chip_data(virq, NULL); |
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} |
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static const struct irq_domain_ops twl6030_irq_domain_ops = { |
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.map = twl6030_irq_map, |
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.unmap = twl6030_irq_unmap, |
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.xlate = irq_domain_xlate_onetwocell, |
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}; |
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static const struct of_device_id twl6030_of_match[] __maybe_unused = { |
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{.compatible = "ti,twl6030", &twl6030_interrupt_mapping}, |
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{.compatible = "ti,twl6032", &twl6032_interrupt_mapping}, |
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{ }, |
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}; |
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int twl6030_init_irq(struct device *dev, int irq_num) |
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{ |
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struct device_node *node = dev->of_node; |
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int nr_irqs; |
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int status; |
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u8 mask[3]; |
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const struct of_device_id *of_id; |
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of_id = of_match_device(twl6030_of_match, dev); |
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if (!of_id || !of_id->data) { |
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dev_err(dev, "Unknown TWL device model\n"); |
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return -EINVAL; |
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} |
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nr_irqs = TWL6030_NR_IRQS; |
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twl6030_irq = devm_kzalloc(dev, sizeof(*twl6030_irq), GFP_KERNEL); |
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if (!twl6030_irq) |
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return -ENOMEM; |
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mask[0] = 0xFF; |
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mask[1] = 0xFF; |
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mask[2] = 0xFF; |
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/* mask all int lines */ |
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status = twl_i2c_write(TWL_MODULE_PIH, &mask[0], REG_INT_MSK_LINE_A, 3); |
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/* mask all int sts */ |
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status |= twl_i2c_write(TWL_MODULE_PIH, &mask[0], REG_INT_MSK_STS_A, 3); |
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/* clear INT_STS_A,B,C */ |
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status |= twl_i2c_write(TWL_MODULE_PIH, &mask[0], REG_INT_STS_A, 3); |
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if (status < 0) { |
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dev_err(dev, "I2C err writing TWL_MODULE_PIH: %d\n", status); |
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return status; |
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} |
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/* |
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* install an irq handler for each of the modules; |
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* clone dummy irq_chip since PIH can't *do* anything |
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*/ |
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twl6030_irq->irq_chip = dummy_irq_chip; |
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twl6030_irq->irq_chip.name = "twl6030"; |
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twl6030_irq->irq_chip.irq_set_type = NULL; |
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twl6030_irq->irq_chip.irq_set_wake = twl6030_irq_set_wake; |
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twl6030_irq->pm_nb.notifier_call = twl6030_irq_pm_notifier; |
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atomic_set(&twl6030_irq->wakeirqs, 0); |
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twl6030_irq->irq_mapping_tbl = of_id->data; |
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twl6030_irq->irq_domain = |
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irq_domain_add_linear(node, nr_irqs, |
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&twl6030_irq_domain_ops, twl6030_irq); |
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if (!twl6030_irq->irq_domain) { |
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dev_err(dev, "Can't add irq_domain\n"); |
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return -ENOMEM; |
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} |
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dev_info(dev, "PIH (irq %d) nested IRQs\n", irq_num); |
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/* install an irq handler to demultiplex the TWL6030 interrupt */ |
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status = request_threaded_irq(irq_num, NULL, twl6030_irq_thread, |
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IRQF_ONESHOT, "TWL6030-PIH", twl6030_irq); |
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if (status < 0) { |
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dev_err(dev, "could not claim irq %d: %d\n", irq_num, status); |
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goto fail_irq; |
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} |
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twl6030_irq->twl_irq = irq_num; |
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register_pm_notifier(&twl6030_irq->pm_nb); |
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return 0; |
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fail_irq: |
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irq_domain_remove(twl6030_irq->irq_domain); |
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return status; |
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} |
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int twl6030_exit_irq(void) |
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{ |
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if (twl6030_irq && twl6030_irq->twl_irq) { |
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unregister_pm_notifier(&twl6030_irq->pm_nb); |
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free_irq(twl6030_irq->twl_irq, NULL); |
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/* |
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* TODO: IRQ domain and allocated nested IRQ descriptors |
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* should be freed somehow here. Now It can't be done, because |
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* child devices will not be deleted during removing of |
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* TWL Core driver and they will still contain allocated |
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* virt IRQs in their Resources tables. |
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* The same prevents us from using devm_request_threaded_irq() |
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* in this module. |
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*/ |
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} |
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return 0; |
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} |
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