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436 lines
10 KiB
436 lines
10 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* |
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* Toshiba T7L66XB core mfd support |
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* |
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* Copyright (c) 2005, 2007, 2008 Ian Molton |
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* Copyright (c) 2008 Dmitry Baryshkov |
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* |
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* T7L66 features: |
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* |
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* Supported in this driver: |
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* SD/MMC |
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* SM/NAND flash controller |
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* |
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* As yet not supported |
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* GPIO interface (on NAND pins) |
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* Serial interface |
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* TFT 'interface converter' |
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* PCMCIA interface logic |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/err.h> |
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#include <linux/io.h> |
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#include <linux/slab.h> |
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#include <linux/irq.h> |
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#include <linux/clk.h> |
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#include <linux/platform_device.h> |
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#include <linux/mfd/core.h> |
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#include <linux/mfd/tmio.h> |
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#include <linux/mfd/t7l66xb.h> |
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enum { |
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T7L66XB_CELL_NAND, |
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T7L66XB_CELL_MMC, |
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}; |
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static const struct resource t7l66xb_mmc_resources[] = { |
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DEFINE_RES_MEM(0x800, 0x200), |
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DEFINE_RES_IRQ(IRQ_T7L66XB_MMC) |
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}; |
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#define SCR_REVID 0x08 /* b Revision ID */ |
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#define SCR_IMR 0x42 /* b Interrupt Mask */ |
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#define SCR_DEV_CTL 0xe0 /* b Device control */ |
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#define SCR_ISR 0xe1 /* b Interrupt Status */ |
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#define SCR_GPO_OC 0xf0 /* b GPO output control */ |
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#define SCR_GPO_OS 0xf1 /* b GPO output enable */ |
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#define SCR_GPI_S 0xf2 /* w GPI status */ |
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#define SCR_APDC 0xf8 /* b Active pullup down ctrl */ |
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#define SCR_DEV_CTL_USB BIT(0) /* USB enable */ |
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#define SCR_DEV_CTL_MMC BIT(1) /* MMC enable */ |
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/*--------------------------------------------------------------------------*/ |
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struct t7l66xb { |
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void __iomem *scr; |
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/* Lock to protect registers requiring read/modify/write ops. */ |
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raw_spinlock_t lock; |
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struct resource rscr; |
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struct clk *clk48m; |
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struct clk *clk32k; |
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int irq; |
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int irq_base; |
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}; |
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/*--------------------------------------------------------------------------*/ |
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static int t7l66xb_mmc_enable(struct platform_device *mmc) |
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{ |
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struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent); |
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unsigned long flags; |
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u8 dev_ctl; |
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int ret; |
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ret = clk_prepare_enable(t7l66xb->clk32k); |
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if (ret) |
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return ret; |
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raw_spin_lock_irqsave(&t7l66xb->lock, flags); |
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dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL); |
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dev_ctl |= SCR_DEV_CTL_MMC; |
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tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL); |
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raw_spin_unlock_irqrestore(&t7l66xb->lock, flags); |
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tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0, |
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t7l66xb_mmc_resources[0].start & 0xfffe); |
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return 0; |
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} |
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static int t7l66xb_mmc_disable(struct platform_device *mmc) |
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{ |
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struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent); |
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unsigned long flags; |
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u8 dev_ctl; |
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raw_spin_lock_irqsave(&t7l66xb->lock, flags); |
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dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL); |
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dev_ctl &= ~SCR_DEV_CTL_MMC; |
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tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL); |
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raw_spin_unlock_irqrestore(&t7l66xb->lock, flags); |
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clk_disable_unprepare(t7l66xb->clk32k); |
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return 0; |
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} |
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static void t7l66xb_mmc_pwr(struct platform_device *mmc, int state) |
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{ |
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struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent); |
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tmio_core_mmc_pwr(t7l66xb->scr + 0x200, 0, state); |
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} |
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static void t7l66xb_mmc_clk_div(struct platform_device *mmc, int state) |
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{ |
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struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent); |
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tmio_core_mmc_clk_div(t7l66xb->scr + 0x200, 0, state); |
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} |
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/*--------------------------------------------------------------------------*/ |
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static struct tmio_mmc_data t7166xb_mmc_data = { |
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.hclk = 24000000, |
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.set_pwr = t7l66xb_mmc_pwr, |
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.set_clk_div = t7l66xb_mmc_clk_div, |
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}; |
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static const struct resource t7l66xb_nand_resources[] = { |
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{ |
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.start = 0xc00, |
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.end = 0xc07, |
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.flags = IORESOURCE_MEM, |
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}, |
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{ |
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.start = 0x0100, |
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.end = 0x01ff, |
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.flags = IORESOURCE_MEM, |
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}, |
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{ |
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.start = IRQ_T7L66XB_NAND, |
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.end = IRQ_T7L66XB_NAND, |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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static struct mfd_cell t7l66xb_cells[] = { |
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[T7L66XB_CELL_MMC] = { |
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.name = "tmio-mmc", |
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.enable = t7l66xb_mmc_enable, |
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.disable = t7l66xb_mmc_disable, |
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.platform_data = &t7166xb_mmc_data, |
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.pdata_size = sizeof(t7166xb_mmc_data), |
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.num_resources = ARRAY_SIZE(t7l66xb_mmc_resources), |
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.resources = t7l66xb_mmc_resources, |
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}, |
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[T7L66XB_CELL_NAND] = { |
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.name = "tmio-nand", |
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.num_resources = ARRAY_SIZE(t7l66xb_nand_resources), |
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.resources = t7l66xb_nand_resources, |
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}, |
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}; |
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/*--------------------------------------------------------------------------*/ |
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/* Handle the T7L66XB interrupt mux */ |
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static void t7l66xb_irq(struct irq_desc *desc) |
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{ |
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struct t7l66xb *t7l66xb = irq_desc_get_handler_data(desc); |
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unsigned int isr; |
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unsigned int i, irq_base; |
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irq_base = t7l66xb->irq_base; |
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while ((isr = tmio_ioread8(t7l66xb->scr + SCR_ISR) & |
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~tmio_ioread8(t7l66xb->scr + SCR_IMR))) |
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for (i = 0; i < T7L66XB_NR_IRQS; i++) |
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if (isr & (1 << i)) |
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generic_handle_irq(irq_base + i); |
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} |
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static void t7l66xb_irq_mask(struct irq_data *data) |
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{ |
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struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data); |
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unsigned long flags; |
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u8 imr; |
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raw_spin_lock_irqsave(&t7l66xb->lock, flags); |
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imr = tmio_ioread8(t7l66xb->scr + SCR_IMR); |
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imr |= 1 << (data->irq - t7l66xb->irq_base); |
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tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR); |
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raw_spin_unlock_irqrestore(&t7l66xb->lock, flags); |
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} |
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static void t7l66xb_irq_unmask(struct irq_data *data) |
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{ |
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struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data); |
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unsigned long flags; |
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u8 imr; |
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raw_spin_lock_irqsave(&t7l66xb->lock, flags); |
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imr = tmio_ioread8(t7l66xb->scr + SCR_IMR); |
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imr &= ~(1 << (data->irq - t7l66xb->irq_base)); |
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tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR); |
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raw_spin_unlock_irqrestore(&t7l66xb->lock, flags); |
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} |
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static struct irq_chip t7l66xb_chip = { |
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.name = "t7l66xb", |
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.irq_ack = t7l66xb_irq_mask, |
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.irq_mask = t7l66xb_irq_mask, |
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.irq_unmask = t7l66xb_irq_unmask, |
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}; |
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/*--------------------------------------------------------------------------*/ |
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/* Install the IRQ handler */ |
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static void t7l66xb_attach_irq(struct platform_device *dev) |
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{ |
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struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
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unsigned int irq, irq_base; |
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irq_base = t7l66xb->irq_base; |
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for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) { |
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irq_set_chip_and_handler(irq, &t7l66xb_chip, handle_level_irq); |
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irq_set_chip_data(irq, t7l66xb); |
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} |
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irq_set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING); |
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irq_set_chained_handler_and_data(t7l66xb->irq, t7l66xb_irq, t7l66xb); |
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} |
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static void t7l66xb_detach_irq(struct platform_device *dev) |
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{ |
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struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
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unsigned int irq, irq_base; |
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irq_base = t7l66xb->irq_base; |
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irq_set_chained_handler_and_data(t7l66xb->irq, NULL, NULL); |
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for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) { |
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irq_set_chip(irq, NULL); |
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irq_set_chip_data(irq, NULL); |
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} |
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} |
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/*--------------------------------------------------------------------------*/ |
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#ifdef CONFIG_PM |
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static int t7l66xb_suspend(struct platform_device *dev, pm_message_t state) |
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{ |
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struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
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struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev); |
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if (pdata && pdata->suspend) |
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pdata->suspend(dev); |
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clk_disable_unprepare(t7l66xb->clk48m); |
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return 0; |
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} |
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static int t7l66xb_resume(struct platform_device *dev) |
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{ |
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struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
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struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev); |
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int ret; |
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ret = clk_prepare_enable(t7l66xb->clk48m); |
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if (ret) |
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return ret; |
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if (pdata && pdata->resume) |
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pdata->resume(dev); |
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tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0, |
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t7l66xb_mmc_resources[0].start & 0xfffe); |
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return 0; |
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} |
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#else |
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#define t7l66xb_suspend NULL |
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#define t7l66xb_resume NULL |
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#endif |
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/*--------------------------------------------------------------------------*/ |
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static int t7l66xb_probe(struct platform_device *dev) |
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{ |
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struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev); |
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struct t7l66xb *t7l66xb; |
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struct resource *iomem, *rscr; |
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int ret; |
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if (!pdata) |
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return -EINVAL; |
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iomem = platform_get_resource(dev, IORESOURCE_MEM, 0); |
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if (!iomem) |
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return -EINVAL; |
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t7l66xb = kzalloc(sizeof *t7l66xb, GFP_KERNEL); |
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if (!t7l66xb) |
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return -ENOMEM; |
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raw_spin_lock_init(&t7l66xb->lock); |
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platform_set_drvdata(dev, t7l66xb); |
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ret = platform_get_irq(dev, 0); |
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if (ret >= 0) |
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t7l66xb->irq = ret; |
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else |
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goto err_noirq; |
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t7l66xb->irq_base = pdata->irq_base; |
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t7l66xb->clk32k = clk_get(&dev->dev, "CLK_CK32K"); |
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if (IS_ERR(t7l66xb->clk32k)) { |
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ret = PTR_ERR(t7l66xb->clk32k); |
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goto err_clk32k_get; |
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} |
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t7l66xb->clk48m = clk_get(&dev->dev, "CLK_CK48M"); |
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if (IS_ERR(t7l66xb->clk48m)) { |
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ret = PTR_ERR(t7l66xb->clk48m); |
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goto err_clk48m_get; |
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} |
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rscr = &t7l66xb->rscr; |
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rscr->name = "t7l66xb-core"; |
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rscr->start = iomem->start; |
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rscr->end = iomem->start + 0xff; |
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rscr->flags = IORESOURCE_MEM; |
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ret = request_resource(iomem, rscr); |
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if (ret) |
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goto err_request_scr; |
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t7l66xb->scr = ioremap(rscr->start, resource_size(rscr)); |
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if (!t7l66xb->scr) { |
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ret = -ENOMEM; |
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goto err_ioremap; |
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} |
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ret = clk_prepare_enable(t7l66xb->clk48m); |
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if (ret) |
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goto err_clk_enable; |
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if (pdata->enable) |
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pdata->enable(dev); |
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/* Mask all interrupts */ |
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tmio_iowrite8(0xbf, t7l66xb->scr + SCR_IMR); |
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printk(KERN_INFO "%s rev %d @ 0x%08lx, irq %d\n", |
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dev->name, tmio_ioread8(t7l66xb->scr + SCR_REVID), |
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(unsigned long)iomem->start, t7l66xb->irq); |
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t7l66xb_attach_irq(dev); |
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t7l66xb_cells[T7L66XB_CELL_NAND].platform_data = pdata->nand_data; |
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t7l66xb_cells[T7L66XB_CELL_NAND].pdata_size = sizeof(*pdata->nand_data); |
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ret = mfd_add_devices(&dev->dev, dev->id, |
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t7l66xb_cells, ARRAY_SIZE(t7l66xb_cells), |
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iomem, t7l66xb->irq_base, NULL); |
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if (!ret) |
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return 0; |
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t7l66xb_detach_irq(dev); |
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clk_disable_unprepare(t7l66xb->clk48m); |
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err_clk_enable: |
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iounmap(t7l66xb->scr); |
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err_ioremap: |
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release_resource(&t7l66xb->rscr); |
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err_request_scr: |
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clk_put(t7l66xb->clk48m); |
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err_clk48m_get: |
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clk_put(t7l66xb->clk32k); |
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err_clk32k_get: |
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err_noirq: |
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kfree(t7l66xb); |
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return ret; |
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} |
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static int t7l66xb_remove(struct platform_device *dev) |
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{ |
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struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev); |
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struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
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int ret; |
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ret = pdata->disable(dev); |
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clk_disable_unprepare(t7l66xb->clk48m); |
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clk_put(t7l66xb->clk48m); |
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clk_disable_unprepare(t7l66xb->clk32k); |
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clk_put(t7l66xb->clk32k); |
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t7l66xb_detach_irq(dev); |
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iounmap(t7l66xb->scr); |
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release_resource(&t7l66xb->rscr); |
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mfd_remove_devices(&dev->dev); |
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kfree(t7l66xb); |
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return ret; |
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} |
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static struct platform_driver t7l66xb_platform_driver = { |
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.driver = { |
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.name = "t7l66xb", |
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}, |
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.suspend = t7l66xb_suspend, |
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.resume = t7l66xb_resume, |
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.probe = t7l66xb_probe, |
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.remove = t7l66xb_remove, |
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}; |
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/*--------------------------------------------------------------------------*/ |
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module_platform_driver(t7l66xb_platform_driver); |
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MODULE_DESCRIPTION("Toshiba T7L66XB core driver"); |
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MODULE_LICENSE("GPL v2"); |
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MODULE_AUTHOR("Ian Molton"); |
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MODULE_ALIAS("platform:t7l66xb");
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