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645 lines
16 KiB
645 lines
16 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* STA2x11 mfd for GPIO, SCTL and APBREG |
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* |
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* Copyright (c) 2009-2011 Wind River Systems, Inc. |
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* Copyright (c) 2011 ST Microelectronics (Alessandro Rubini, Davide Ciminaghi) |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/init.h> |
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#include <linux/export.h> |
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#include <linux/spinlock.h> |
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#include <linux/errno.h> |
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#include <linux/device.h> |
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#include <linux/slab.h> |
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#include <linux/list.h> |
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#include <linux/io.h> |
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#include <linux/ioport.h> |
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#include <linux/pci.h> |
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#include <linux/seq_file.h> |
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#include <linux/platform_device.h> |
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#include <linux/mfd/core.h> |
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#include <linux/mfd/sta2x11-mfd.h> |
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#include <linux/regmap.h> |
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#include <asm/sta2x11.h> |
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static inline int __reg_within_range(unsigned int r, |
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unsigned int start, |
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unsigned int end) |
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{ |
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return ((r >= start) && (r <= end)); |
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} |
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/* This describes STA2X11 MFD chip for us, we may have several */ |
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struct sta2x11_mfd { |
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struct sta2x11_instance *instance; |
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struct regmap *regmap[sta2x11_n_mfd_plat_devs]; |
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spinlock_t lock[sta2x11_n_mfd_plat_devs]; |
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struct list_head list; |
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void __iomem *regs[sta2x11_n_mfd_plat_devs]; |
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}; |
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static LIST_HEAD(sta2x11_mfd_list); |
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/* Three functions to act on the list */ |
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static struct sta2x11_mfd *sta2x11_mfd_find(struct pci_dev *pdev) |
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{ |
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struct sta2x11_instance *instance; |
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struct sta2x11_mfd *mfd; |
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if (!pdev && !list_empty(&sta2x11_mfd_list)) { |
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pr_warn("%s: Unspecified device, using first instance\n", |
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__func__); |
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return list_entry(sta2x11_mfd_list.next, |
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struct sta2x11_mfd, list); |
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} |
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instance = sta2x11_get_instance(pdev); |
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if (!instance) |
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return NULL; |
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list_for_each_entry(mfd, &sta2x11_mfd_list, list) { |
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if (mfd->instance == instance) |
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return mfd; |
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} |
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return NULL; |
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} |
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static int sta2x11_mfd_add(struct pci_dev *pdev, gfp_t flags) |
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{ |
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int i; |
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struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev); |
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struct sta2x11_instance *instance; |
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if (mfd) |
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return -EBUSY; |
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instance = sta2x11_get_instance(pdev); |
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if (!instance) |
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return -EINVAL; |
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mfd = kzalloc(sizeof(*mfd), flags); |
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if (!mfd) |
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return -ENOMEM; |
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INIT_LIST_HEAD(&mfd->list); |
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for (i = 0; i < ARRAY_SIZE(mfd->lock); i++) |
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spin_lock_init(&mfd->lock[i]); |
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mfd->instance = instance; |
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list_add(&mfd->list, &sta2x11_mfd_list); |
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return 0; |
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} |
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/* This function is exported and is not expected to fail */ |
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u32 __sta2x11_mfd_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val, |
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enum sta2x11_mfd_plat_dev index) |
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{ |
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struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev); |
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u32 r; |
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unsigned long flags; |
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void __iomem *regs; |
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if (!mfd) { |
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dev_warn(&pdev->dev, ": can't access sctl regs\n"); |
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return 0; |
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} |
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regs = mfd->regs[index]; |
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if (!regs) { |
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dev_warn(&pdev->dev, ": system ctl not initialized\n"); |
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return 0; |
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} |
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spin_lock_irqsave(&mfd->lock[index], flags); |
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r = readl(regs + reg); |
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r &= ~mask; |
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r |= val; |
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if (mask) |
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writel(r, regs + reg); |
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spin_unlock_irqrestore(&mfd->lock[index], flags); |
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return r; |
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} |
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EXPORT_SYMBOL(__sta2x11_mfd_mask); |
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int sta2x11_mfd_get_regs_data(struct platform_device *dev, |
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enum sta2x11_mfd_plat_dev index, |
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void __iomem **regs, |
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spinlock_t **lock) |
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{ |
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struct pci_dev *pdev = *(struct pci_dev **)dev_get_platdata(&dev->dev); |
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struct sta2x11_mfd *mfd; |
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if (!pdev) |
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return -ENODEV; |
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mfd = sta2x11_mfd_find(pdev); |
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if (!mfd) |
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return -ENODEV; |
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if (index >= sta2x11_n_mfd_plat_devs) |
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return -ENODEV; |
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*regs = mfd->regs[index]; |
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*lock = &mfd->lock[index]; |
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pr_debug("%s %d *regs = %p\n", __func__, __LINE__, *regs); |
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return *regs ? 0 : -ENODEV; |
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} |
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EXPORT_SYMBOL(sta2x11_mfd_get_regs_data); |
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/* |
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* Special sta2x11-mfd regmap lock/unlock functions |
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*/ |
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static void sta2x11_regmap_lock(void *__lock) |
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{ |
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spinlock_t *lock = __lock; |
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spin_lock(lock); |
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} |
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static void sta2x11_regmap_unlock(void *__lock) |
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{ |
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spinlock_t *lock = __lock; |
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spin_unlock(lock); |
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} |
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/* OTP (one time programmable registers do not require locking */ |
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static void sta2x11_regmap_nolock(void *__lock) |
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{ |
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} |
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static const char *sta2x11_mfd_names[sta2x11_n_mfd_plat_devs] = { |
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[sta2x11_sctl] = STA2X11_MFD_SCTL_NAME, |
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[sta2x11_apbreg] = STA2X11_MFD_APBREG_NAME, |
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[sta2x11_apb_soc_regs] = STA2X11_MFD_APB_SOC_REGS_NAME, |
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[sta2x11_scr] = STA2X11_MFD_SCR_NAME, |
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}; |
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static bool sta2x11_sctl_writeable_reg(struct device *dev, unsigned int reg) |
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{ |
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return !__reg_within_range(reg, SCTL_SCPCIECSBRST, SCTL_SCRSTSTA); |
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} |
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static struct regmap_config sta2x11_sctl_regmap_config = { |
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.reg_bits = 32, |
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.reg_stride = 4, |
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.val_bits = 32, |
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.lock = sta2x11_regmap_lock, |
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.unlock = sta2x11_regmap_unlock, |
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.max_register = SCTL_SCRSTSTA, |
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.writeable_reg = sta2x11_sctl_writeable_reg, |
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}; |
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static bool sta2x11_scr_readable_reg(struct device *dev, unsigned int reg) |
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{ |
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return (reg == STA2X11_SECR_CR) || |
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__reg_within_range(reg, STA2X11_SECR_FVR0, STA2X11_SECR_FVR1); |
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} |
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static bool sta2x11_scr_writeable_reg(struct device *dev, unsigned int reg) |
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{ |
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return false; |
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} |
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static struct regmap_config sta2x11_scr_regmap_config = { |
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.reg_bits = 32, |
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.reg_stride = 4, |
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.val_bits = 32, |
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.lock = sta2x11_regmap_nolock, |
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.unlock = sta2x11_regmap_nolock, |
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.max_register = STA2X11_SECR_FVR1, |
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.readable_reg = sta2x11_scr_readable_reg, |
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.writeable_reg = sta2x11_scr_writeable_reg, |
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}; |
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static bool sta2x11_apbreg_readable_reg(struct device *dev, unsigned int reg) |
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{ |
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/* Two blocks (CAN and MLB, SARAC) 0x100 bytes apart */ |
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if (reg >= APBREG_BSR_SARAC) |
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reg -= APBREG_BSR_SARAC; |
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switch (reg) { |
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case APBREG_BSR: |
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case APBREG_PAER: |
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case APBREG_PWAC: |
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case APBREG_PRAC: |
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case APBREG_PCG: |
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case APBREG_PUR: |
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case APBREG_EMU_PCG: |
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return true; |
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default: |
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return false; |
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} |
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} |
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static bool sta2x11_apbreg_writeable_reg(struct device *dev, unsigned int reg) |
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{ |
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if (reg >= APBREG_BSR_SARAC) |
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reg -= APBREG_BSR_SARAC; |
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if (!sta2x11_apbreg_readable_reg(dev, reg)) |
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return false; |
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return reg != APBREG_PAER; |
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} |
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static struct regmap_config sta2x11_apbreg_regmap_config = { |
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.reg_bits = 32, |
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.reg_stride = 4, |
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.val_bits = 32, |
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.lock = sta2x11_regmap_lock, |
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.unlock = sta2x11_regmap_unlock, |
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.max_register = APBREG_EMU_PCG_SARAC, |
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.readable_reg = sta2x11_apbreg_readable_reg, |
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.writeable_reg = sta2x11_apbreg_writeable_reg, |
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}; |
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static bool sta2x11_apb_soc_regs_readable_reg(struct device *dev, |
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unsigned int reg) |
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{ |
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return reg <= PCIE_SoC_INT_ROUTER_STATUS3_REG || |
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__reg_within_range(reg, DMA_IP_CTRL_REG, SPARE3_RESERVED) || |
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__reg_within_range(reg, MASTER_LOCK_REG, |
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SYSTEM_CONFIG_STATUS_REG) || |
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reg == MSP_CLK_CTRL_REG || |
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__reg_within_range(reg, COMPENSATION_REG1, TEST_CTL_REG); |
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} |
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static bool sta2x11_apb_soc_regs_writeable_reg(struct device *dev, |
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unsigned int reg) |
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{ |
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if (!sta2x11_apb_soc_regs_readable_reg(dev, reg)) |
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return false; |
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switch (reg) { |
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case PCIE_COMMON_CLOCK_CONFIG_0_4_0: |
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case SYSTEM_CONFIG_STATUS_REG: |
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case COMPENSATION_REG1: |
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case PCIE_SoC_INT_ROUTER_STATUS0_REG...PCIE_SoC_INT_ROUTER_STATUS3_REG: |
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case PCIE_PM_STATUS_0_PORT_0_4...PCIE_PM_STATUS_7_0_EP4: |
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return false; |
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default: |
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return true; |
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} |
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} |
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static struct regmap_config sta2x11_apb_soc_regs_regmap_config = { |
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.reg_bits = 32, |
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.reg_stride = 4, |
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.val_bits = 32, |
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.lock = sta2x11_regmap_lock, |
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.unlock = sta2x11_regmap_unlock, |
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.max_register = TEST_CTL_REG, |
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.readable_reg = sta2x11_apb_soc_regs_readable_reg, |
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.writeable_reg = sta2x11_apb_soc_regs_writeable_reg, |
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}; |
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static struct regmap_config * |
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sta2x11_mfd_regmap_configs[sta2x11_n_mfd_plat_devs] = { |
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[sta2x11_sctl] = &sta2x11_sctl_regmap_config, |
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[sta2x11_apbreg] = &sta2x11_apbreg_regmap_config, |
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[sta2x11_apb_soc_regs] = &sta2x11_apb_soc_regs_regmap_config, |
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[sta2x11_scr] = &sta2x11_scr_regmap_config, |
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}; |
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/* Probe for the four platform devices */ |
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static int sta2x11_mfd_platform_probe(struct platform_device *dev, |
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enum sta2x11_mfd_plat_dev index) |
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{ |
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struct pci_dev **pdev; |
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struct sta2x11_mfd *mfd; |
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struct resource *res; |
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const char *name = sta2x11_mfd_names[index]; |
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struct regmap_config *regmap_config = sta2x11_mfd_regmap_configs[index]; |
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pdev = dev_get_platdata(&dev->dev); |
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mfd = sta2x11_mfd_find(*pdev); |
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if (!mfd) |
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return -ENODEV; |
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if (!regmap_config) |
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return -ENODEV; |
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res = platform_get_resource(dev, IORESOURCE_MEM, 0); |
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if (!res) |
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return -ENOMEM; |
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if (!request_mem_region(res->start, resource_size(res), name)) |
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return -EBUSY; |
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mfd->regs[index] = ioremap(res->start, resource_size(res)); |
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if (!mfd->regs[index]) { |
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release_mem_region(res->start, resource_size(res)); |
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return -ENOMEM; |
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} |
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regmap_config->lock_arg = &mfd->lock; |
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/* |
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No caching, registers could be reached both via regmap and via |
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void __iomem * |
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*/ |
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regmap_config->cache_type = REGCACHE_NONE; |
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mfd->regmap[index] = devm_regmap_init_mmio(&dev->dev, mfd->regs[index], |
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regmap_config); |
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WARN_ON(IS_ERR(mfd->regmap[index])); |
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return 0; |
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} |
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static int sta2x11_sctl_probe(struct platform_device *dev) |
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{ |
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return sta2x11_mfd_platform_probe(dev, sta2x11_sctl); |
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} |
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static int sta2x11_apbreg_probe(struct platform_device *dev) |
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{ |
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return sta2x11_mfd_platform_probe(dev, sta2x11_apbreg); |
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} |
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static int sta2x11_apb_soc_regs_probe(struct platform_device *dev) |
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{ |
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return sta2x11_mfd_platform_probe(dev, sta2x11_apb_soc_regs); |
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} |
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static int sta2x11_scr_probe(struct platform_device *dev) |
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{ |
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return sta2x11_mfd_platform_probe(dev, sta2x11_scr); |
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} |
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/* The three platform drivers */ |
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static struct platform_driver sta2x11_sctl_platform_driver = { |
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.driver = { |
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.name = STA2X11_MFD_SCTL_NAME, |
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}, |
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.probe = sta2x11_sctl_probe, |
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}; |
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static struct platform_driver sta2x11_platform_driver = { |
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.driver = { |
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.name = STA2X11_MFD_APBREG_NAME, |
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}, |
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.probe = sta2x11_apbreg_probe, |
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}; |
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static struct platform_driver sta2x11_apb_soc_regs_platform_driver = { |
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.driver = { |
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.name = STA2X11_MFD_APB_SOC_REGS_NAME, |
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}, |
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.probe = sta2x11_apb_soc_regs_probe, |
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}; |
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static struct platform_driver sta2x11_scr_platform_driver = { |
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.driver = { |
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.name = STA2X11_MFD_SCR_NAME, |
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}, |
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.probe = sta2x11_scr_probe, |
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}; |
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static struct platform_driver * const drivers[] = { |
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&sta2x11_platform_driver, |
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&sta2x11_sctl_platform_driver, |
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&sta2x11_apb_soc_regs_platform_driver, |
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&sta2x11_scr_platform_driver, |
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}; |
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static int __init sta2x11_drivers_init(void) |
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{ |
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return platform_register_drivers(drivers, ARRAY_SIZE(drivers)); |
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} |
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/* |
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* What follows are the PCI devices that host the above pdevs. |
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* Each logic block is 4kB and they are all consecutive: we use this info. |
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*/ |
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/* Mfd 0 device */ |
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/* Mfd 0, Bar 0 */ |
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enum mfd0_bar0_cells { |
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STA2X11_GPIO_0 = 0, |
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STA2X11_GPIO_1, |
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STA2X11_GPIO_2, |
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STA2X11_GPIO_3, |
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STA2X11_SCTL, |
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STA2X11_SCR, |
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STA2X11_TIME, |
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}; |
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/* Mfd 0 , Bar 1 */ |
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enum mfd0_bar1_cells { |
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STA2X11_APBREG = 0, |
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}; |
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#define CELL_4K(_name, _cell) { \ |
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.name = _name, \ |
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.start = _cell * 4096, .end = _cell * 4096 + 4095, \ |
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.flags = IORESOURCE_MEM, \ |
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} |
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static const struct resource gpio_resources[] = { |
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{ |
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/* 4 consecutive cells, 1 driver */ |
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.name = STA2X11_MFD_GPIO_NAME, |
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.start = 0, |
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.end = (4 * 4096) - 1, |
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.flags = IORESOURCE_MEM, |
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} |
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}; |
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static const struct resource sctl_resources[] = { |
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CELL_4K(STA2X11_MFD_SCTL_NAME, STA2X11_SCTL), |
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}; |
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static const struct resource scr_resources[] = { |
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CELL_4K(STA2X11_MFD_SCR_NAME, STA2X11_SCR), |
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}; |
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static const struct resource time_resources[] = { |
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CELL_4K(STA2X11_MFD_TIME_NAME, STA2X11_TIME), |
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}; |
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static const struct resource apbreg_resources[] = { |
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CELL_4K(STA2X11_MFD_APBREG_NAME, STA2X11_APBREG), |
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}; |
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#define DEV(_name, _r) \ |
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{ .name = _name, .num_resources = ARRAY_SIZE(_r), .resources = _r, } |
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static struct mfd_cell sta2x11_mfd0_bar0[] = { |
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/* offset 0: we add pdata later */ |
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DEV(STA2X11_MFD_GPIO_NAME, gpio_resources), |
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DEV(STA2X11_MFD_SCTL_NAME, sctl_resources), |
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DEV(STA2X11_MFD_SCR_NAME, scr_resources), |
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DEV(STA2X11_MFD_TIME_NAME, time_resources), |
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}; |
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static struct mfd_cell sta2x11_mfd0_bar1[] = { |
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DEV(STA2X11_MFD_APBREG_NAME, apbreg_resources), |
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}; |
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/* Mfd 1 devices */ |
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/* Mfd 1, Bar 0 */ |
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enum mfd1_bar0_cells { |
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STA2X11_VIC = 0, |
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}; |
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/* Mfd 1, Bar 1 */ |
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enum mfd1_bar1_cells { |
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STA2X11_APB_SOC_REGS = 0, |
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}; |
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static const struct resource vic_resources[] = { |
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CELL_4K(STA2X11_MFD_VIC_NAME, STA2X11_VIC), |
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}; |
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static const struct resource apb_soc_regs_resources[] = { |
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CELL_4K(STA2X11_MFD_APB_SOC_REGS_NAME, STA2X11_APB_SOC_REGS), |
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}; |
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static struct mfd_cell sta2x11_mfd1_bar0[] = { |
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DEV(STA2X11_MFD_VIC_NAME, vic_resources), |
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}; |
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static struct mfd_cell sta2x11_mfd1_bar1[] = { |
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DEV(STA2X11_MFD_APB_SOC_REGS_NAME, apb_soc_regs_resources), |
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}; |
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static int sta2x11_mfd_suspend(struct pci_dev *pdev, pm_message_t state) |
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{ |
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pci_save_state(pdev); |
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pci_disable_device(pdev); |
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pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
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return 0; |
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} |
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static int sta2x11_mfd_resume(struct pci_dev *pdev) |
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{ |
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int err; |
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pci_set_power_state(pdev, PCI_D0); |
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err = pci_enable_device(pdev); |
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if (err) |
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return err; |
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pci_restore_state(pdev); |
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return 0; |
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} |
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struct sta2x11_mfd_bar_setup_data { |
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struct mfd_cell *cells; |
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int ncells; |
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}; |
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struct sta2x11_mfd_setup_data { |
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struct sta2x11_mfd_bar_setup_data bars[2]; |
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}; |
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#define STA2X11_MFD0 0 |
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#define STA2X11_MFD1 1 |
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|
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static struct sta2x11_mfd_setup_data mfd_setup_data[] = { |
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/* Mfd 0: gpio, sctl, scr, timers / apbregs */ |
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[STA2X11_MFD0] = { |
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.bars = { |
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[0] = { |
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.cells = sta2x11_mfd0_bar0, |
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.ncells = ARRAY_SIZE(sta2x11_mfd0_bar0), |
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}, |
|
[1] = { |
|
.cells = sta2x11_mfd0_bar1, |
|
.ncells = ARRAY_SIZE(sta2x11_mfd0_bar1), |
|
}, |
|
}, |
|
}, |
|
/* Mfd 1: vic / apb-soc-regs */ |
|
[STA2X11_MFD1] = { |
|
.bars = { |
|
[0] = { |
|
.cells = sta2x11_mfd1_bar0, |
|
.ncells = ARRAY_SIZE(sta2x11_mfd1_bar0), |
|
}, |
|
[1] = { |
|
.cells = sta2x11_mfd1_bar1, |
|
.ncells = ARRAY_SIZE(sta2x11_mfd1_bar1), |
|
}, |
|
}, |
|
}, |
|
}; |
|
|
|
static void sta2x11_mfd_setup(struct pci_dev *pdev, |
|
struct sta2x11_mfd_setup_data *sd) |
|
{ |
|
int i, j; |
|
for (i = 0; i < ARRAY_SIZE(sd->bars); i++) |
|
for (j = 0; j < sd->bars[i].ncells; j++) { |
|
sd->bars[i].cells[j].pdata_size = sizeof(pdev); |
|
sd->bars[i].cells[j].platform_data = &pdev; |
|
} |
|
} |
|
|
|
static int sta2x11_mfd_probe(struct pci_dev *pdev, |
|
const struct pci_device_id *pci_id) |
|
{ |
|
int err, i; |
|
struct sta2x11_mfd_setup_data *setup_data; |
|
|
|
dev_info(&pdev->dev, "%s\n", __func__); |
|
|
|
err = pci_enable_device(pdev); |
|
if (err) { |
|
dev_err(&pdev->dev, "Can't enable device.\n"); |
|
return err; |
|
} |
|
|
|
err = pci_enable_msi(pdev); |
|
if (err) |
|
dev_info(&pdev->dev, "Enable msi failed\n"); |
|
|
|
setup_data = pci_id->device == PCI_DEVICE_ID_STMICRO_GPIO ? |
|
&mfd_setup_data[STA2X11_MFD0] : |
|
&mfd_setup_data[STA2X11_MFD1]; |
|
|
|
/* platform data is the pci device for all of them */ |
|
sta2x11_mfd_setup(pdev, setup_data); |
|
|
|
/* Record this pdev before mfd_add_devices: their probe looks for it */ |
|
if (!sta2x11_mfd_find(pdev)) |
|
sta2x11_mfd_add(pdev, GFP_ATOMIC); |
|
|
|
/* Just 2 bars for all mfd's at present */ |
|
for (i = 0; i < 2; i++) { |
|
err = mfd_add_devices(&pdev->dev, -1, |
|
setup_data->bars[i].cells, |
|
setup_data->bars[i].ncells, |
|
&pdev->resource[i], |
|
0, NULL); |
|
if (err) { |
|
dev_err(&pdev->dev, |
|
"mfd_add_devices[%d] failed: %d\n", i, err); |
|
goto err_disable; |
|
} |
|
} |
|
|
|
return 0; |
|
|
|
err_disable: |
|
mfd_remove_devices(&pdev->dev); |
|
pci_disable_device(pdev); |
|
pci_disable_msi(pdev); |
|
return err; |
|
} |
|
|
|
static const struct pci_device_id sta2x11_mfd_tbl[] = { |
|
{PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_GPIO)}, |
|
{PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_VIC)}, |
|
{0,}, |
|
}; |
|
|
|
static struct pci_driver sta2x11_mfd_driver = { |
|
.name = "sta2x11-mfd", |
|
.id_table = sta2x11_mfd_tbl, |
|
.probe = sta2x11_mfd_probe, |
|
.suspend = sta2x11_mfd_suspend, |
|
.resume = sta2x11_mfd_resume, |
|
}; |
|
|
|
static int __init sta2x11_mfd_init(void) |
|
{ |
|
pr_info("%s\n", __func__); |
|
return pci_register_driver(&sta2x11_mfd_driver); |
|
} |
|
|
|
/* |
|
* All of this must be ready before "normal" devices like MMCI appear. |
|
* But MFD (the pci device) can't be too early. The following choice |
|
* prepares platform drivers very early and probe the PCI device later, |
|
* but before other PCI devices. |
|
*/ |
|
subsys_initcall(sta2x11_drivers_init); |
|
rootfs_initcall(sta2x11_mfd_init);
|
|
|