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351 lines
11 KiB
351 lines
11 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Atmel SMC (Static Memory Controller) helper functions. |
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* |
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* Copyright (C) 2017 Atmel |
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* Copyright (C) 2017 Free Electrons |
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* |
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* Author: Boris Brezillon <[email protected]> |
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*/ |
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#include <linux/mfd/syscon/atmel-smc.h> |
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#include <linux/string.h> |
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/** |
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* atmel_smc_cs_conf_init - initialize a SMC CS conf |
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* @conf: the SMC CS conf to initialize |
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* |
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* Set all fields to 0 so that one can start defining a new config. |
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*/ |
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void atmel_smc_cs_conf_init(struct atmel_smc_cs_conf *conf) |
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{ |
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memset(conf, 0, sizeof(*conf)); |
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} |
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EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_init); |
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/** |
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* atmel_smc_cs_encode_ncycles - encode a number of MCK clk cycles in the |
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* format expected by the SMC engine |
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* @ncycles: number of MCK clk cycles |
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* @msbpos: position of the MSB part of the timing field |
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* @msbwidth: width of the MSB part of the timing field |
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* @msbfactor: factor applied to the MSB |
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* @encodedval: param used to store the encoding result |
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* |
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* This function encodes the @ncycles value as described in the datasheet |
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* (section "SMC Setup/Pulse/Cycle/Timings Register"). This is a generic |
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* helper which called with different parameter depending on the encoding |
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* scheme. |
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* |
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* If the @ncycles value is too big to be encoded, -ERANGE is returned and |
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* the encodedval is contains the maximum val. Otherwise, 0 is returned. |
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*/ |
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static int atmel_smc_cs_encode_ncycles(unsigned int ncycles, |
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unsigned int msbpos, |
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unsigned int msbwidth, |
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unsigned int msbfactor, |
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unsigned int *encodedval) |
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{ |
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unsigned int lsbmask = GENMASK(msbpos - 1, 0); |
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unsigned int msbmask = GENMASK(msbwidth - 1, 0); |
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unsigned int msb, lsb; |
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int ret = 0; |
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msb = ncycles / msbfactor; |
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lsb = ncycles % msbfactor; |
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if (lsb > lsbmask) { |
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lsb = 0; |
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msb++; |
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} |
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/* |
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* Let's just put the maximum we can if the requested setting does |
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* not fit in the register field. |
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* We still return -ERANGE in case the caller cares. |
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*/ |
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if (msb > msbmask) { |
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msb = msbmask; |
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lsb = lsbmask; |
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ret = -ERANGE; |
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} |
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*encodedval = (msb << msbpos) | lsb; |
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return ret; |
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} |
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/** |
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* atmel_smc_cs_conf_set_timing - set the SMC CS conf Txx parameter to a |
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* specific value |
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* @conf: SMC CS conf descriptor |
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* @shift: the position of the Txx field in the TIMINGS register |
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* @ncycles: value (expressed in MCK clk cycles) to assign to this Txx |
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* parameter |
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* |
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* This function encodes the @ncycles value as described in the datasheet |
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* (section "SMC Timings Register"), and then stores the result in the |
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* @conf->timings field at @shift position. |
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* |
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* Returns -EINVAL if shift is invalid, -ERANGE if ncycles does not fit in |
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* the field, and 0 otherwise. |
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*/ |
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int atmel_smc_cs_conf_set_timing(struct atmel_smc_cs_conf *conf, |
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unsigned int shift, unsigned int ncycles) |
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{ |
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unsigned int val; |
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int ret; |
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if (shift != ATMEL_HSMC_TIMINGS_TCLR_SHIFT && |
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shift != ATMEL_HSMC_TIMINGS_TADL_SHIFT && |
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shift != ATMEL_HSMC_TIMINGS_TAR_SHIFT && |
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shift != ATMEL_HSMC_TIMINGS_TRR_SHIFT && |
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shift != ATMEL_HSMC_TIMINGS_TWB_SHIFT) |
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return -EINVAL; |
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/* |
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* The formula described in atmel datasheets (section "HSMC Timings |
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* Register"): |
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* |
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* ncycles = (Txx[3] * 64) + Txx[2:0] |
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*/ |
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ret = atmel_smc_cs_encode_ncycles(ncycles, 3, 1, 64, &val); |
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conf->timings &= ~GENMASK(shift + 3, shift); |
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conf->timings |= val << shift; |
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return ret; |
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} |
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EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_set_timing); |
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/** |
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* atmel_smc_cs_conf_set_setup - set the SMC CS conf xx_SETUP parameter to a |
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* specific value |
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* @conf: SMC CS conf descriptor |
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* @shift: the position of the xx_SETUP field in the SETUP register |
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* @ncycles: value (expressed in MCK clk cycles) to assign to this xx_SETUP |
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* parameter |
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* |
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* This function encodes the @ncycles value as described in the datasheet |
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* (section "SMC Setup Register"), and then stores the result in the |
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* @conf->setup field at @shift position. |
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* |
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* Returns -EINVAL if @shift is invalid, -ERANGE if @ncycles does not fit in |
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* the field, and 0 otherwise. |
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*/ |
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int atmel_smc_cs_conf_set_setup(struct atmel_smc_cs_conf *conf, |
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unsigned int shift, unsigned int ncycles) |
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{ |
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unsigned int val; |
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int ret; |
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if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NCS_WR_SHIFT && |
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shift != ATMEL_SMC_NRD_SHIFT && shift != ATMEL_SMC_NCS_RD_SHIFT) |
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return -EINVAL; |
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/* |
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* The formula described in atmel datasheets (section "SMC Setup |
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* Register"): |
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* |
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* ncycles = (128 * xx_SETUP[5]) + xx_SETUP[4:0] |
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*/ |
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ret = atmel_smc_cs_encode_ncycles(ncycles, 5, 1, 128, &val); |
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conf->setup &= ~GENMASK(shift + 7, shift); |
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conf->setup |= val << shift; |
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return ret; |
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} |
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EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_set_setup); |
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/** |
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* atmel_smc_cs_conf_set_pulse - set the SMC CS conf xx_PULSE parameter to a |
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* specific value |
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* @conf: SMC CS conf descriptor |
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* @shift: the position of the xx_PULSE field in the PULSE register |
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* @ncycles: value (expressed in MCK clk cycles) to assign to this xx_PULSE |
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* parameter |
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* |
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* This function encodes the @ncycles value as described in the datasheet |
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* (section "SMC Pulse Register"), and then stores the result in the |
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* @conf->setup field at @shift position. |
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* |
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* Returns -EINVAL if @shift is invalid, -ERANGE if @ncycles does not fit in |
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* the field, and 0 otherwise. |
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*/ |
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int atmel_smc_cs_conf_set_pulse(struct atmel_smc_cs_conf *conf, |
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unsigned int shift, unsigned int ncycles) |
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{ |
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unsigned int val; |
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int ret; |
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if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NCS_WR_SHIFT && |
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shift != ATMEL_SMC_NRD_SHIFT && shift != ATMEL_SMC_NCS_RD_SHIFT) |
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return -EINVAL; |
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/* |
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* The formula described in atmel datasheets (section "SMC Pulse |
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* Register"): |
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* |
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* ncycles = (256 * xx_PULSE[6]) + xx_PULSE[5:0] |
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*/ |
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ret = atmel_smc_cs_encode_ncycles(ncycles, 6, 1, 256, &val); |
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conf->pulse &= ~GENMASK(shift + 7, shift); |
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conf->pulse |= val << shift; |
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return ret; |
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} |
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EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_set_pulse); |
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/** |
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* atmel_smc_cs_conf_set_cycle - set the SMC CS conf xx_CYCLE parameter to a |
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* specific value |
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* @conf: SMC CS conf descriptor |
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* @shift: the position of the xx_CYCLE field in the CYCLE register |
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* @ncycles: value (expressed in MCK clk cycles) to assign to this xx_CYCLE |
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* parameter |
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* |
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* This function encodes the @ncycles value as described in the datasheet |
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* (section "SMC Cycle Register"), and then stores the result in the |
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* @conf->setup field at @shift position. |
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* |
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* Returns -EINVAL if @shift is invalid, -ERANGE if @ncycles does not fit in |
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* the field, and 0 otherwise. |
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*/ |
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int atmel_smc_cs_conf_set_cycle(struct atmel_smc_cs_conf *conf, |
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unsigned int shift, unsigned int ncycles) |
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{ |
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unsigned int val; |
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int ret; |
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if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NRD_SHIFT) |
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return -EINVAL; |
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/* |
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* The formula described in atmel datasheets (section "SMC Cycle |
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* Register"): |
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* |
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* ncycles = (xx_CYCLE[8:7] * 256) + xx_CYCLE[6:0] |
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*/ |
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ret = atmel_smc_cs_encode_ncycles(ncycles, 7, 2, 256, &val); |
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conf->cycle &= ~GENMASK(shift + 15, shift); |
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conf->cycle |= val << shift; |
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return ret; |
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} |
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EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_set_cycle); |
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/** |
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* atmel_smc_cs_conf_apply - apply an SMC CS conf |
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* @regmap: the SMC regmap |
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* @cs: the CS id |
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* @conf: the SMC CS conf to apply |
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* |
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* Applies an SMC CS configuration. |
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* Only valid on at91sam9/avr32 SoCs. |
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*/ |
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void atmel_smc_cs_conf_apply(struct regmap *regmap, int cs, |
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const struct atmel_smc_cs_conf *conf) |
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{ |
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regmap_write(regmap, ATMEL_SMC_SETUP(cs), conf->setup); |
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regmap_write(regmap, ATMEL_SMC_PULSE(cs), conf->pulse); |
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regmap_write(regmap, ATMEL_SMC_CYCLE(cs), conf->cycle); |
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regmap_write(regmap, ATMEL_SMC_MODE(cs), conf->mode); |
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} |
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EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_apply); |
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/** |
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* atmel_hsmc_cs_conf_apply - apply an SMC CS conf |
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* @regmap: the HSMC regmap |
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* @cs: the CS id |
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* @layout: the layout of registers |
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* @conf: the SMC CS conf to apply |
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* |
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* Applies an SMC CS configuration. |
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* Only valid on post-sama5 SoCs. |
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*/ |
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void atmel_hsmc_cs_conf_apply(struct regmap *regmap, |
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const struct atmel_hsmc_reg_layout *layout, |
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int cs, const struct atmel_smc_cs_conf *conf) |
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{ |
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regmap_write(regmap, ATMEL_HSMC_SETUP(layout, cs), conf->setup); |
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regmap_write(regmap, ATMEL_HSMC_PULSE(layout, cs), conf->pulse); |
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regmap_write(regmap, ATMEL_HSMC_CYCLE(layout, cs), conf->cycle); |
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regmap_write(regmap, ATMEL_HSMC_TIMINGS(layout, cs), conf->timings); |
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regmap_write(regmap, ATMEL_HSMC_MODE(layout, cs), conf->mode); |
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} |
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EXPORT_SYMBOL_GPL(atmel_hsmc_cs_conf_apply); |
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/** |
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* atmel_smc_cs_conf_get - retrieve the current SMC CS conf |
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* @regmap: the SMC regmap |
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* @cs: the CS id |
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* @conf: the SMC CS conf object to store the current conf |
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* |
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* Retrieve the SMC CS configuration. |
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* Only valid on at91sam9/avr32 SoCs. |
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*/ |
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void atmel_smc_cs_conf_get(struct regmap *regmap, int cs, |
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struct atmel_smc_cs_conf *conf) |
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{ |
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regmap_read(regmap, ATMEL_SMC_SETUP(cs), &conf->setup); |
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regmap_read(regmap, ATMEL_SMC_PULSE(cs), &conf->pulse); |
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regmap_read(regmap, ATMEL_SMC_CYCLE(cs), &conf->cycle); |
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regmap_read(regmap, ATMEL_SMC_MODE(cs), &conf->mode); |
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} |
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EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_get); |
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/** |
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* atmel_hsmc_cs_conf_get - retrieve the current SMC CS conf |
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* @regmap: the HSMC regmap |
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* @cs: the CS id |
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* @layout: the layout of registers |
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* @conf: the SMC CS conf object to store the current conf |
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* |
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* Retrieve the SMC CS configuration. |
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* Only valid on post-sama5 SoCs. |
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*/ |
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void atmel_hsmc_cs_conf_get(struct regmap *regmap, |
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const struct atmel_hsmc_reg_layout *layout, |
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int cs, struct atmel_smc_cs_conf *conf) |
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{ |
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regmap_read(regmap, ATMEL_HSMC_SETUP(layout, cs), &conf->setup); |
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regmap_read(regmap, ATMEL_HSMC_PULSE(layout, cs), &conf->pulse); |
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regmap_read(regmap, ATMEL_HSMC_CYCLE(layout, cs), &conf->cycle); |
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regmap_read(regmap, ATMEL_HSMC_TIMINGS(layout, cs), &conf->timings); |
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regmap_read(regmap, ATMEL_HSMC_MODE(layout, cs), &conf->mode); |
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} |
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EXPORT_SYMBOL_GPL(atmel_hsmc_cs_conf_get); |
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static const struct atmel_hsmc_reg_layout sama5d3_reg_layout = { |
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.timing_regs_offset = 0x600, |
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}; |
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static const struct atmel_hsmc_reg_layout sama5d2_reg_layout = { |
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.timing_regs_offset = 0x700, |
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}; |
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static const struct of_device_id atmel_smc_ids[] = { |
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{ .compatible = "atmel,at91sam9260-smc", .data = NULL }, |
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{ .compatible = "atmel,sama5d3-smc", .data = &sama5d3_reg_layout }, |
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{ .compatible = "atmel,sama5d2-smc", .data = &sama5d2_reg_layout }, |
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{ /* sentinel */ }, |
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}; |
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/** |
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* atmel_hsmc_get_reg_layout - retrieve the layout of HSMC registers |
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* @np: the HSMC regmap |
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* |
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* Retrieve the layout of HSMC registers. |
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* |
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* Returns NULL in case of SMC, a struct atmel_hsmc_reg_layout pointer |
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* in HSMC case, otherwise ERR_PTR(-EINVAL). |
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*/ |
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const struct atmel_hsmc_reg_layout * |
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atmel_hsmc_get_reg_layout(struct device_node *np) |
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{ |
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const struct of_device_id *match; |
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match = of_match_node(atmel_smc_ids, np); |
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return match ? match->data : ERR_PTR(-EINVAL); |
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} |
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EXPORT_SYMBOL_GPL(atmel_hsmc_get_reg_layout);
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