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508 lines
12 KiB
508 lines
12 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* Driver for Cadence MIPI-CSI2 RX Controller v1.3 |
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* |
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* Copyright (C) 2017 Cadence Design Systems Inc. |
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*/ |
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#include <linux/clk.h> |
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#include <linux/delay.h> |
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#include <linux/io.h> |
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#include <linux/module.h> |
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#include <linux/of.h> |
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#include <linux/of_graph.h> |
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#include <linux/phy/phy.h> |
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#include <linux/platform_device.h> |
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#include <linux/slab.h> |
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#include <media/v4l2-ctrls.h> |
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#include <media/v4l2-device.h> |
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#include <media/v4l2-fwnode.h> |
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#include <media/v4l2-subdev.h> |
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#define CSI2RX_DEVICE_CFG_REG 0x000 |
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#define CSI2RX_SOFT_RESET_REG 0x004 |
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#define CSI2RX_SOFT_RESET_PROTOCOL BIT(1) |
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#define CSI2RX_SOFT_RESET_FRONT BIT(0) |
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#define CSI2RX_STATIC_CFG_REG 0x008 |
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#define CSI2RX_STATIC_CFG_DLANE_MAP(llane, plane) ((plane) << (16 + (llane) * 4)) |
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#define CSI2RX_STATIC_CFG_LANES_MASK GENMASK(11, 8) |
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#define CSI2RX_STREAM_BASE(n) (((n) + 1) * 0x100) |
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#define CSI2RX_STREAM_CTRL_REG(n) (CSI2RX_STREAM_BASE(n) + 0x000) |
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#define CSI2RX_STREAM_CTRL_START BIT(0) |
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#define CSI2RX_STREAM_DATA_CFG_REG(n) (CSI2RX_STREAM_BASE(n) + 0x008) |
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#define CSI2RX_STREAM_DATA_CFG_EN_VC_SELECT BIT(31) |
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#define CSI2RX_STREAM_DATA_CFG_VC_SELECT(n) BIT((n) + 16) |
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#define CSI2RX_STREAM_CFG_REG(n) (CSI2RX_STREAM_BASE(n) + 0x00c) |
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#define CSI2RX_STREAM_CFG_FIFO_MODE_LARGE_BUF (1 << 8) |
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#define CSI2RX_LANES_MAX 4 |
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#define CSI2RX_STREAMS_MAX 4 |
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enum csi2rx_pads { |
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CSI2RX_PAD_SINK, |
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CSI2RX_PAD_SOURCE_STREAM0, |
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CSI2RX_PAD_SOURCE_STREAM1, |
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CSI2RX_PAD_SOURCE_STREAM2, |
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CSI2RX_PAD_SOURCE_STREAM3, |
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CSI2RX_PAD_MAX, |
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}; |
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struct csi2rx_priv { |
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struct device *dev; |
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unsigned int count; |
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/* |
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* Used to prevent race conditions between multiple, |
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* concurrent calls to start and stop. |
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*/ |
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struct mutex lock; |
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void __iomem *base; |
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struct clk *sys_clk; |
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struct clk *p_clk; |
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struct clk *pixel_clk[CSI2RX_STREAMS_MAX]; |
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struct phy *dphy; |
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u8 lanes[CSI2RX_LANES_MAX]; |
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u8 num_lanes; |
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u8 max_lanes; |
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u8 max_streams; |
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bool has_internal_dphy; |
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struct v4l2_subdev subdev; |
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struct v4l2_async_notifier notifier; |
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struct media_pad pads[CSI2RX_PAD_MAX]; |
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/* Remote source */ |
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struct v4l2_subdev *source_subdev; |
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int source_pad; |
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}; |
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static inline |
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struct csi2rx_priv *v4l2_subdev_to_csi2rx(struct v4l2_subdev *subdev) |
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{ |
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return container_of(subdev, struct csi2rx_priv, subdev); |
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} |
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static void csi2rx_reset(struct csi2rx_priv *csi2rx) |
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{ |
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writel(CSI2RX_SOFT_RESET_PROTOCOL | CSI2RX_SOFT_RESET_FRONT, |
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csi2rx->base + CSI2RX_SOFT_RESET_REG); |
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udelay(10); |
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writel(0, csi2rx->base + CSI2RX_SOFT_RESET_REG); |
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} |
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static int csi2rx_start(struct csi2rx_priv *csi2rx) |
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{ |
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unsigned int i; |
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unsigned long lanes_used = 0; |
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u32 reg; |
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int ret; |
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ret = clk_prepare_enable(csi2rx->p_clk); |
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if (ret) |
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return ret; |
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csi2rx_reset(csi2rx); |
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reg = csi2rx->num_lanes << 8; |
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for (i = 0; i < csi2rx->num_lanes; i++) { |
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reg |= CSI2RX_STATIC_CFG_DLANE_MAP(i, csi2rx->lanes[i]); |
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set_bit(csi2rx->lanes[i], &lanes_used); |
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} |
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/* |
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* Even the unused lanes need to be mapped. In order to avoid |
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* to map twice to the same physical lane, keep the lanes used |
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* in the previous loop, and only map unused physical lanes to |
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* the rest of our logical lanes. |
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*/ |
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for (i = csi2rx->num_lanes; i < csi2rx->max_lanes; i++) { |
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unsigned int idx = find_first_zero_bit(&lanes_used, |
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csi2rx->max_lanes); |
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set_bit(idx, &lanes_used); |
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reg |= CSI2RX_STATIC_CFG_DLANE_MAP(i, i + 1); |
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} |
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writel(reg, csi2rx->base + CSI2RX_STATIC_CFG_REG); |
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ret = v4l2_subdev_call(csi2rx->source_subdev, video, s_stream, true); |
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if (ret) |
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goto err_disable_pclk; |
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/* |
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* Create a static mapping between the CSI virtual channels |
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* and the output stream. |
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* |
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* This should be enhanced, but v4l2 lacks the support for |
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* changing that mapping dynamically. |
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* |
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* We also cannot enable and disable independent streams here, |
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* hence the reference counting. |
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*/ |
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for (i = 0; i < csi2rx->max_streams; i++) { |
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ret = clk_prepare_enable(csi2rx->pixel_clk[i]); |
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if (ret) |
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goto err_disable_pixclk; |
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writel(CSI2RX_STREAM_CFG_FIFO_MODE_LARGE_BUF, |
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csi2rx->base + CSI2RX_STREAM_CFG_REG(i)); |
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writel(CSI2RX_STREAM_DATA_CFG_EN_VC_SELECT | |
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CSI2RX_STREAM_DATA_CFG_VC_SELECT(i), |
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csi2rx->base + CSI2RX_STREAM_DATA_CFG_REG(i)); |
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writel(CSI2RX_STREAM_CTRL_START, |
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csi2rx->base + CSI2RX_STREAM_CTRL_REG(i)); |
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} |
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ret = clk_prepare_enable(csi2rx->sys_clk); |
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if (ret) |
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goto err_disable_pixclk; |
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clk_disable_unprepare(csi2rx->p_clk); |
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return 0; |
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err_disable_pixclk: |
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for (; i > 0; i--) |
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clk_disable_unprepare(csi2rx->pixel_clk[i - 1]); |
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err_disable_pclk: |
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clk_disable_unprepare(csi2rx->p_clk); |
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return ret; |
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} |
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static void csi2rx_stop(struct csi2rx_priv *csi2rx) |
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{ |
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unsigned int i; |
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clk_prepare_enable(csi2rx->p_clk); |
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clk_disable_unprepare(csi2rx->sys_clk); |
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for (i = 0; i < csi2rx->max_streams; i++) { |
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writel(0, csi2rx->base + CSI2RX_STREAM_CTRL_REG(i)); |
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clk_disable_unprepare(csi2rx->pixel_clk[i]); |
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} |
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clk_disable_unprepare(csi2rx->p_clk); |
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if (v4l2_subdev_call(csi2rx->source_subdev, video, s_stream, false)) |
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dev_warn(csi2rx->dev, "Couldn't disable our subdev\n"); |
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} |
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static int csi2rx_s_stream(struct v4l2_subdev *subdev, int enable) |
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{ |
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struct csi2rx_priv *csi2rx = v4l2_subdev_to_csi2rx(subdev); |
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int ret = 0; |
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mutex_lock(&csi2rx->lock); |
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if (enable) { |
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/* |
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* If we're not the first users, there's no need to |
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* enable the whole controller. |
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*/ |
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if (!csi2rx->count) { |
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ret = csi2rx_start(csi2rx); |
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if (ret) |
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goto out; |
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} |
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csi2rx->count++; |
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} else { |
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csi2rx->count--; |
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/* |
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* Let the last user turn off the lights. |
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*/ |
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if (!csi2rx->count) |
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csi2rx_stop(csi2rx); |
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} |
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out: |
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mutex_unlock(&csi2rx->lock); |
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return ret; |
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} |
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static const struct v4l2_subdev_video_ops csi2rx_video_ops = { |
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.s_stream = csi2rx_s_stream, |
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}; |
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static const struct v4l2_subdev_ops csi2rx_subdev_ops = { |
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.video = &csi2rx_video_ops, |
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}; |
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static int csi2rx_async_bound(struct v4l2_async_notifier *notifier, |
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struct v4l2_subdev *s_subdev, |
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struct v4l2_async_subdev *asd) |
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{ |
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struct v4l2_subdev *subdev = notifier->sd; |
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struct csi2rx_priv *csi2rx = v4l2_subdev_to_csi2rx(subdev); |
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csi2rx->source_pad = media_entity_get_fwnode_pad(&s_subdev->entity, |
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s_subdev->fwnode, |
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MEDIA_PAD_FL_SOURCE); |
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if (csi2rx->source_pad < 0) { |
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dev_err(csi2rx->dev, "Couldn't find output pad for subdev %s\n", |
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s_subdev->name); |
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return csi2rx->source_pad; |
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} |
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csi2rx->source_subdev = s_subdev; |
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dev_dbg(csi2rx->dev, "Bound %s pad: %d\n", s_subdev->name, |
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csi2rx->source_pad); |
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return media_create_pad_link(&csi2rx->source_subdev->entity, |
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csi2rx->source_pad, |
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&csi2rx->subdev.entity, 0, |
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MEDIA_LNK_FL_ENABLED | |
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MEDIA_LNK_FL_IMMUTABLE); |
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} |
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static const struct v4l2_async_notifier_operations csi2rx_notifier_ops = { |
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.bound = csi2rx_async_bound, |
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}; |
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static int csi2rx_get_resources(struct csi2rx_priv *csi2rx, |
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struct platform_device *pdev) |
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{ |
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struct resource *res; |
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unsigned char i; |
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u32 dev_cfg; |
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int ret; |
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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csi2rx->base = devm_ioremap_resource(&pdev->dev, res); |
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if (IS_ERR(csi2rx->base)) |
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return PTR_ERR(csi2rx->base); |
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csi2rx->sys_clk = devm_clk_get(&pdev->dev, "sys_clk"); |
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if (IS_ERR(csi2rx->sys_clk)) { |
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dev_err(&pdev->dev, "Couldn't get sys clock\n"); |
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return PTR_ERR(csi2rx->sys_clk); |
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} |
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csi2rx->p_clk = devm_clk_get(&pdev->dev, "p_clk"); |
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if (IS_ERR(csi2rx->p_clk)) { |
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dev_err(&pdev->dev, "Couldn't get P clock\n"); |
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return PTR_ERR(csi2rx->p_clk); |
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} |
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csi2rx->dphy = devm_phy_optional_get(&pdev->dev, "dphy"); |
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if (IS_ERR(csi2rx->dphy)) { |
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dev_err(&pdev->dev, "Couldn't get external D-PHY\n"); |
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return PTR_ERR(csi2rx->dphy); |
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} |
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/* |
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* FIXME: Once we'll have external D-PHY support, the check |
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* will need to be removed. |
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*/ |
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if (csi2rx->dphy) { |
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dev_err(&pdev->dev, "External D-PHY not supported yet\n"); |
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return -EINVAL; |
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} |
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ret = clk_prepare_enable(csi2rx->p_clk); |
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if (ret) { |
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dev_err(&pdev->dev, "Couldn't prepare and enable P clock\n"); |
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return ret; |
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} |
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dev_cfg = readl(csi2rx->base + CSI2RX_DEVICE_CFG_REG); |
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clk_disable_unprepare(csi2rx->p_clk); |
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csi2rx->max_lanes = dev_cfg & 7; |
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if (csi2rx->max_lanes > CSI2RX_LANES_MAX) { |
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dev_err(&pdev->dev, "Invalid number of lanes: %u\n", |
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csi2rx->max_lanes); |
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return -EINVAL; |
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} |
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csi2rx->max_streams = (dev_cfg >> 4) & 7; |
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if (csi2rx->max_streams > CSI2RX_STREAMS_MAX) { |
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dev_err(&pdev->dev, "Invalid number of streams: %u\n", |
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csi2rx->max_streams); |
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return -EINVAL; |
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} |
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csi2rx->has_internal_dphy = dev_cfg & BIT(3) ? true : false; |
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/* |
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* FIXME: Once we'll have internal D-PHY support, the check |
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* will need to be removed. |
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*/ |
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if (csi2rx->has_internal_dphy) { |
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dev_err(&pdev->dev, "Internal D-PHY not supported yet\n"); |
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return -EINVAL; |
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} |
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for (i = 0; i < csi2rx->max_streams; i++) { |
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char clk_name[16]; |
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snprintf(clk_name, sizeof(clk_name), "pixel_if%u_clk", i); |
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csi2rx->pixel_clk[i] = devm_clk_get(&pdev->dev, clk_name); |
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if (IS_ERR(csi2rx->pixel_clk[i])) { |
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dev_err(&pdev->dev, "Couldn't get clock %s\n", clk_name); |
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return PTR_ERR(csi2rx->pixel_clk[i]); |
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} |
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} |
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return 0; |
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} |
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static int csi2rx_parse_dt(struct csi2rx_priv *csi2rx) |
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{ |
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struct v4l2_fwnode_endpoint v4l2_ep = { .bus_type = 0 }; |
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struct v4l2_async_subdev *asd; |
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struct fwnode_handle *fwh; |
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struct device_node *ep; |
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int ret; |
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ep = of_graph_get_endpoint_by_regs(csi2rx->dev->of_node, 0, 0); |
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if (!ep) |
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return -EINVAL; |
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fwh = of_fwnode_handle(ep); |
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ret = v4l2_fwnode_endpoint_parse(fwh, &v4l2_ep); |
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if (ret) { |
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dev_err(csi2rx->dev, "Could not parse v4l2 endpoint\n"); |
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of_node_put(ep); |
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return ret; |
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} |
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if (v4l2_ep.bus_type != V4L2_MBUS_CSI2_DPHY) { |
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dev_err(csi2rx->dev, "Unsupported media bus type: 0x%x\n", |
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v4l2_ep.bus_type); |
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of_node_put(ep); |
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return -EINVAL; |
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} |
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memcpy(csi2rx->lanes, v4l2_ep.bus.mipi_csi2.data_lanes, |
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sizeof(csi2rx->lanes)); |
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csi2rx->num_lanes = v4l2_ep.bus.mipi_csi2.num_data_lanes; |
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if (csi2rx->num_lanes > csi2rx->max_lanes) { |
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dev_err(csi2rx->dev, "Unsupported number of data-lanes: %d\n", |
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csi2rx->num_lanes); |
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of_node_put(ep); |
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return -EINVAL; |
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} |
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v4l2_async_notifier_init(&csi2rx->notifier); |
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asd = v4l2_async_notifier_add_fwnode_remote_subdev(&csi2rx->notifier, |
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fwh, |
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struct v4l2_async_subdev); |
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of_node_put(ep); |
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if (IS_ERR(asd)) |
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return PTR_ERR(asd); |
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csi2rx->notifier.ops = &csi2rx_notifier_ops; |
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ret = v4l2_async_subdev_notifier_register(&csi2rx->subdev, |
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&csi2rx->notifier); |
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if (ret) |
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v4l2_async_notifier_cleanup(&csi2rx->notifier); |
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return ret; |
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} |
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static int csi2rx_probe(struct platform_device *pdev) |
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{ |
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struct csi2rx_priv *csi2rx; |
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unsigned int i; |
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int ret; |
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csi2rx = kzalloc(sizeof(*csi2rx), GFP_KERNEL); |
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if (!csi2rx) |
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return -ENOMEM; |
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platform_set_drvdata(pdev, csi2rx); |
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csi2rx->dev = &pdev->dev; |
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mutex_init(&csi2rx->lock); |
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ret = csi2rx_get_resources(csi2rx, pdev); |
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if (ret) |
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goto err_free_priv; |
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ret = csi2rx_parse_dt(csi2rx); |
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if (ret) |
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goto err_free_priv; |
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csi2rx->subdev.owner = THIS_MODULE; |
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csi2rx->subdev.dev = &pdev->dev; |
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v4l2_subdev_init(&csi2rx->subdev, &csi2rx_subdev_ops); |
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v4l2_set_subdevdata(&csi2rx->subdev, &pdev->dev); |
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snprintf(csi2rx->subdev.name, V4L2_SUBDEV_NAME_SIZE, "%s.%s", |
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KBUILD_MODNAME, dev_name(&pdev->dev)); |
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/* Create our media pads */ |
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csi2rx->subdev.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; |
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csi2rx->pads[CSI2RX_PAD_SINK].flags = MEDIA_PAD_FL_SINK; |
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for (i = CSI2RX_PAD_SOURCE_STREAM0; i < CSI2RX_PAD_MAX; i++) |
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csi2rx->pads[i].flags = MEDIA_PAD_FL_SOURCE; |
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ret = media_entity_pads_init(&csi2rx->subdev.entity, CSI2RX_PAD_MAX, |
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csi2rx->pads); |
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if (ret) |
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goto err_cleanup; |
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ret = v4l2_async_register_subdev(&csi2rx->subdev); |
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if (ret < 0) |
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goto err_cleanup; |
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dev_info(&pdev->dev, |
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"Probed CSI2RX with %u/%u lanes, %u streams, %s D-PHY\n", |
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csi2rx->num_lanes, csi2rx->max_lanes, csi2rx->max_streams, |
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csi2rx->has_internal_dphy ? "internal" : "no"); |
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return 0; |
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err_cleanup: |
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v4l2_async_notifier_cleanup(&csi2rx->notifier); |
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err_free_priv: |
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kfree(csi2rx); |
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return ret; |
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} |
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static int csi2rx_remove(struct platform_device *pdev) |
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{ |
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struct csi2rx_priv *csi2rx = platform_get_drvdata(pdev); |
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v4l2_async_unregister_subdev(&csi2rx->subdev); |
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kfree(csi2rx); |
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return 0; |
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} |
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static const struct of_device_id csi2rx_of_table[] = { |
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{ .compatible = "cdns,csi2rx" }, |
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{ }, |
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}; |
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MODULE_DEVICE_TABLE(of, csi2rx_of_table); |
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static struct platform_driver csi2rx_driver = { |
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.probe = csi2rx_probe, |
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.remove = csi2rx_remove, |
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.driver = { |
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.name = "cdns-csi2rx", |
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.of_match_table = csi2rx_of_table, |
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}, |
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}; |
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module_platform_driver(csi2rx_driver); |
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MODULE_AUTHOR("Maxime Ripard <[email protected]>"); |
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MODULE_DESCRIPTION("Cadence CSI2-RX controller"); |
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MODULE_LICENSE("GPL");
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