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234 lines
6.2 KiB
234 lines
6.2 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (C) 2014-2015 Toradex AG |
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* Author: Stefan Agner <[email protected]> |
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* |
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* IRQ chip driver for MSCM interrupt router available on Vybrid SoC's. |
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* The interrupt router is between the CPU's interrupt controller and the |
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* peripheral. The router allows to route the peripheral interrupts to |
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* one of the two available CPU's on Vybrid VF6xx SoC's (Cortex-A5 or |
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* Cortex-M4). The router will be configured transparently on a IRQ |
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* request. |
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* |
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* o All peripheral interrupts of the Vybrid SoC can be routed to |
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* CPU 0, CPU 1 or both. The routing is useful for dual-core |
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* variants of Vybrid SoC such as VF6xx. This driver routes the |
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* requested interrupt to the CPU currently running on. |
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* |
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* o It is required to setup the interrupt router even on single-core |
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* variants of Vybrid. |
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*/ |
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#include <linux/cpu_pm.h> |
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#include <linux/io.h> |
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#include <linux/irq.h> |
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#include <linux/irqchip.h> |
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#include <linux/irqdomain.h> |
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#include <linux/mfd/syscon.h> |
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#include <dt-bindings/interrupt-controller/arm-gic.h> |
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#include <linux/of.h> |
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#include <linux/of_address.h> |
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#include <linux/slab.h> |
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#include <linux/regmap.h> |
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#define MSCM_CPxNUM 0x4 |
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#define MSCM_IRSPRC(n) (0x80 + 2 * (n)) |
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#define MSCM_IRSPRC_CPEN_MASK 0x3 |
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#define MSCM_IRSPRC_NUM 112 |
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struct vf610_mscm_ir_chip_data { |
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void __iomem *mscm_ir_base; |
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u16 cpu_mask; |
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u16 saved_irsprc[MSCM_IRSPRC_NUM]; |
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bool is_nvic; |
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}; |
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static struct vf610_mscm_ir_chip_data *mscm_ir_data; |
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static inline void vf610_mscm_ir_save(struct vf610_mscm_ir_chip_data *data) |
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{ |
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int i; |
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for (i = 0; i < MSCM_IRSPRC_NUM; i++) |
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data->saved_irsprc[i] = readw_relaxed(data->mscm_ir_base + MSCM_IRSPRC(i)); |
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} |
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static inline void vf610_mscm_ir_restore(struct vf610_mscm_ir_chip_data *data) |
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{ |
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int i; |
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for (i = 0; i < MSCM_IRSPRC_NUM; i++) |
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writew_relaxed(data->saved_irsprc[i], data->mscm_ir_base + MSCM_IRSPRC(i)); |
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} |
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static int vf610_mscm_ir_notifier(struct notifier_block *self, |
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unsigned long cmd, void *v) |
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{ |
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switch (cmd) { |
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case CPU_CLUSTER_PM_ENTER: |
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vf610_mscm_ir_save(mscm_ir_data); |
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break; |
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case CPU_CLUSTER_PM_ENTER_FAILED: |
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case CPU_CLUSTER_PM_EXIT: |
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vf610_mscm_ir_restore(mscm_ir_data); |
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break; |
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} |
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return NOTIFY_OK; |
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} |
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static struct notifier_block mscm_ir_notifier_block = { |
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.notifier_call = vf610_mscm_ir_notifier, |
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}; |
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static void vf610_mscm_ir_enable(struct irq_data *data) |
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{ |
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irq_hw_number_t hwirq = data->hwirq; |
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struct vf610_mscm_ir_chip_data *chip_data = data->chip_data; |
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u16 irsprc; |
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irsprc = readw_relaxed(chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); |
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irsprc &= MSCM_IRSPRC_CPEN_MASK; |
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WARN_ON(irsprc & ~chip_data->cpu_mask); |
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writew_relaxed(chip_data->cpu_mask, |
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chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); |
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irq_chip_enable_parent(data); |
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} |
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static void vf610_mscm_ir_disable(struct irq_data *data) |
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{ |
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irq_hw_number_t hwirq = data->hwirq; |
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struct vf610_mscm_ir_chip_data *chip_data = data->chip_data; |
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writew_relaxed(0x0, chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); |
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irq_chip_disable_parent(data); |
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} |
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static struct irq_chip vf610_mscm_ir_irq_chip = { |
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.name = "mscm-ir", |
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.irq_mask = irq_chip_mask_parent, |
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.irq_unmask = irq_chip_unmask_parent, |
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.irq_eoi = irq_chip_eoi_parent, |
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.irq_enable = vf610_mscm_ir_enable, |
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.irq_disable = vf610_mscm_ir_disable, |
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.irq_retrigger = irq_chip_retrigger_hierarchy, |
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.irq_set_affinity = irq_chip_set_affinity_parent, |
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}; |
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static int vf610_mscm_ir_domain_alloc(struct irq_domain *domain, unsigned int virq, |
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unsigned int nr_irqs, void *arg) |
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{ |
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int i; |
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irq_hw_number_t hwirq; |
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struct irq_fwspec *fwspec = arg; |
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struct irq_fwspec parent_fwspec; |
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if (!irq_domain_get_of_node(domain->parent)) |
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return -EINVAL; |
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if (fwspec->param_count != 2) |
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return -EINVAL; |
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hwirq = fwspec->param[0]; |
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for (i = 0; i < nr_irqs; i++) |
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irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, |
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&vf610_mscm_ir_irq_chip, |
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domain->host_data); |
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parent_fwspec.fwnode = domain->parent->fwnode; |
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if (mscm_ir_data->is_nvic) { |
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parent_fwspec.param_count = 1; |
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parent_fwspec.param[0] = fwspec->param[0]; |
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} else { |
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parent_fwspec.param_count = 3; |
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parent_fwspec.param[0] = GIC_SPI; |
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parent_fwspec.param[1] = fwspec->param[0]; |
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parent_fwspec.param[2] = fwspec->param[1]; |
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} |
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return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, |
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&parent_fwspec); |
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} |
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static int vf610_mscm_ir_domain_translate(struct irq_domain *d, |
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struct irq_fwspec *fwspec, |
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unsigned long *hwirq, |
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unsigned int *type) |
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{ |
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if (WARN_ON(fwspec->param_count < 2)) |
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return -EINVAL; |
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*hwirq = fwspec->param[0]; |
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*type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK; |
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return 0; |
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} |
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static const struct irq_domain_ops mscm_irq_domain_ops = { |
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.translate = vf610_mscm_ir_domain_translate, |
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.alloc = vf610_mscm_ir_domain_alloc, |
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.free = irq_domain_free_irqs_common, |
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}; |
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static int __init vf610_mscm_ir_of_init(struct device_node *node, |
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struct device_node *parent) |
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{ |
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struct irq_domain *domain, *domain_parent; |
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struct regmap *mscm_cp_regmap; |
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int ret, cpuid; |
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domain_parent = irq_find_host(parent); |
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if (!domain_parent) { |
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pr_err("vf610_mscm_ir: interrupt-parent not found\n"); |
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return -EINVAL; |
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} |
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mscm_ir_data = kzalloc(sizeof(*mscm_ir_data), GFP_KERNEL); |
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if (!mscm_ir_data) |
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return -ENOMEM; |
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mscm_ir_data->mscm_ir_base = of_io_request_and_map(node, 0, "mscm-ir"); |
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if (IS_ERR(mscm_ir_data->mscm_ir_base)) { |
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pr_err("vf610_mscm_ir: unable to map mscm register\n"); |
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ret = PTR_ERR(mscm_ir_data->mscm_ir_base); |
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goto out_free; |
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} |
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mscm_cp_regmap = syscon_regmap_lookup_by_phandle(node, "fsl,cpucfg"); |
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if (IS_ERR(mscm_cp_regmap)) { |
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ret = PTR_ERR(mscm_cp_regmap); |
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pr_err("vf610_mscm_ir: regmap lookup for cpucfg failed\n"); |
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goto out_unmap; |
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} |
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regmap_read(mscm_cp_regmap, MSCM_CPxNUM, &cpuid); |
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mscm_ir_data->cpu_mask = 0x1 << cpuid; |
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domain = irq_domain_add_hierarchy(domain_parent, 0, |
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MSCM_IRSPRC_NUM, node, |
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&mscm_irq_domain_ops, mscm_ir_data); |
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if (!domain) { |
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ret = -ENOMEM; |
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goto out_unmap; |
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} |
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if (of_device_is_compatible(irq_domain_get_of_node(domain->parent), |
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"arm,armv7m-nvic")) |
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mscm_ir_data->is_nvic = true; |
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cpu_pm_register_notifier(&mscm_ir_notifier_block); |
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return 0; |
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out_unmap: |
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iounmap(mscm_ir_data->mscm_ir_base); |
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out_free: |
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kfree(mscm_ir_data); |
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return ret; |
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} |
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IRQCHIP_DECLARE(vf610_mscm_ir, "fsl,vf610-mscm-ir", vf610_mscm_ir_of_init);
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