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270 lines
7.5 KiB
270 lines
7.5 KiB
/* |
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* Copyright (C) 2002 Toshiba Corporation |
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* Copyright (C) 2005-2006 MontaVista Software, Inc. <[email protected]> |
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* |
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* This file is licensed under the terms of the GNU General Public |
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* License version 2. This program is licensed "as is" without any |
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* warranty of any kind, whether express or implied. |
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*/ |
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#include <linux/types.h> |
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#include <linux/pci.h> |
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#include <linux/ide.h> |
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#include <linux/module.h> |
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#define DRV_NAME "tc86c001" |
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static void tc86c001_set_mode(ide_hwif_t *hwif, ide_drive_t *drive) |
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{ |
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unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00); |
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u16 mode, scr = inw(scr_port); |
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const u8 speed = drive->dma_mode; |
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switch (speed) { |
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case XFER_UDMA_4: mode = 0x00c0; break; |
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case XFER_UDMA_3: mode = 0x00b0; break; |
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case XFER_UDMA_2: mode = 0x00a0; break; |
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case XFER_UDMA_1: mode = 0x0090; break; |
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case XFER_UDMA_0: mode = 0x0080; break; |
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case XFER_MW_DMA_2: mode = 0x0070; break; |
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case XFER_MW_DMA_1: mode = 0x0060; break; |
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case XFER_MW_DMA_0: mode = 0x0050; break; |
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case XFER_PIO_4: mode = 0x0400; break; |
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case XFER_PIO_3: mode = 0x0300; break; |
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case XFER_PIO_2: mode = 0x0200; break; |
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case XFER_PIO_1: mode = 0x0100; break; |
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case XFER_PIO_0: |
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default: mode = 0x0000; break; |
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} |
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scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f; |
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scr |= mode; |
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outw(scr, scr_port); |
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} |
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static void tc86c001_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) |
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{ |
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drive->dma_mode = drive->pio_mode; |
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tc86c001_set_mode(hwif, drive); |
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} |
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/* |
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* HACKITY HACK |
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* |
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* This is a workaround for the limitation 5 of the TC86C001 IDE controller: |
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* if a DMA transfer terminates prematurely, the controller leaves the device's |
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* interrupt request (INTRQ) pending and does not generate a PCI interrupt (or |
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* set the interrupt bit in the DMA status register), thus no PCI interrupt |
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* will occur until a DMA transfer has been successfully completed. |
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* |
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* We work around this by initiating dummy, zero-length DMA transfer on |
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* a DMA timeout expiration. I found no better way to do this with the current |
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* IDE core than to temporarily replace a higher level driver's timer expiry |
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* handler with our own backing up to that handler in case our recovery fails. |
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*/ |
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static int tc86c001_timer_expiry(ide_drive_t *drive) |
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{ |
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ide_hwif_t *hwif = drive->hwif; |
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ide_expiry_t *expiry = ide_get_hwifdata(hwif); |
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u8 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); |
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/* Restore a higher level driver's expiry handler first. */ |
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hwif->expiry = expiry; |
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if ((dma_stat & 5) == 1) { /* DMA active and no interrupt */ |
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unsigned long sc_base = hwif->config_data; |
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unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04); |
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u8 dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); |
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printk(KERN_WARNING "%s: DMA interrupt possibly stuck, " |
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"attempting recovery...\n", drive->name); |
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/* Stop DMA */ |
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outb(dma_cmd & ~0x01, hwif->dma_base + ATA_DMA_CMD); |
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/* Setup the dummy DMA transfer */ |
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outw(0, sc_base + 0x0a); /* Sector Count */ |
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outw(0, twcr_port); /* Transfer Word Count 1 or 2 */ |
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/* Start the dummy DMA transfer */ |
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/* clear R_OR_WCTR for write */ |
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outb(0x00, hwif->dma_base + ATA_DMA_CMD); |
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/* set START_STOPBM */ |
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outb(0x01, hwif->dma_base + ATA_DMA_CMD); |
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/* |
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* If an interrupt was pending, it should come thru shortly. |
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* If not, a higher level driver's expiry handler should |
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* eventually cause some kind of recovery from the DMA stall. |
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*/ |
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return WAIT_MIN_SLEEP; |
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} |
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/* Chain to the restored expiry handler if DMA wasn't active. */ |
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if (likely(expiry != NULL)) |
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return expiry(drive); |
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/* If there was no handler, "emulate" that for ide_timer_expiry()... */ |
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return -1; |
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} |
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static void tc86c001_dma_start(ide_drive_t *drive) |
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{ |
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ide_hwif_t *hwif = drive->hwif; |
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unsigned long sc_base = hwif->config_data; |
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unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04); |
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unsigned long nsectors = blk_rq_sectors(hwif->rq); |
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/* |
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* We have to manually load the sector count and size into |
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* the appropriate system control registers for DMA to work |
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* with LBA48 and ATAPI devices... |
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*/ |
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outw(nsectors, sc_base + 0x0a); /* Sector Count */ |
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outw(SECTOR_SIZE / 2, twcr_port); /* Transfer Word Count 1/2 */ |
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/* Install our timeout expiry hook, saving the current handler... */ |
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ide_set_hwifdata(hwif, hwif->expiry); |
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hwif->expiry = &tc86c001_timer_expiry; |
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ide_dma_start(drive); |
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} |
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static u8 tc86c001_cable_detect(ide_hwif_t *hwif) |
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{ |
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struct pci_dev *dev = to_pci_dev(hwif->dev); |
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unsigned long sc_base = pci_resource_start(dev, 5); |
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u16 scr1 = inw(sc_base + 0x00); |
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/* |
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* System Control 1 Register bit 13 (PDIAGN): |
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* 0=80-pin cable, 1=40-pin cable |
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*/ |
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return (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; |
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} |
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static void init_hwif_tc86c001(ide_hwif_t *hwif) |
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{ |
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struct pci_dev *dev = to_pci_dev(hwif->dev); |
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unsigned long sc_base = pci_resource_start(dev, 5); |
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u16 scr1 = inw(sc_base + 0x00); |
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/* System Control 1 Register bit 15 (Soft Reset) set */ |
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outw(scr1 | 0x8000, sc_base + 0x00); |
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/* System Control 1 Register bit 14 (FIFO Reset) set */ |
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outw(scr1 | 0x4000, sc_base + 0x00); |
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/* System Control 1 Register: reset clear */ |
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outw(scr1 & ~0xc000, sc_base + 0x00); |
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/* Store the system control register base for convenience... */ |
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hwif->config_data = sc_base; |
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if (!hwif->dma_base) |
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return; |
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/* |
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* Sector Count Control Register bits 0 and 1 set: |
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* software sets Sector Count Register for master and slave device |
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*/ |
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outw(0x0003, sc_base + 0x0c); |
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/* Sector Count Register limit */ |
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hwif->rqsize = 0xffff; |
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} |
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static const struct ide_port_ops tc86c001_port_ops = { |
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.set_pio_mode = tc86c001_set_pio_mode, |
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.set_dma_mode = tc86c001_set_mode, |
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.cable_detect = tc86c001_cable_detect, |
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}; |
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static const struct ide_dma_ops tc86c001_dma_ops = { |
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.dma_host_set = ide_dma_host_set, |
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.dma_setup = ide_dma_setup, |
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.dma_start = tc86c001_dma_start, |
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.dma_end = ide_dma_end, |
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.dma_test_irq = ide_dma_test_irq, |
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.dma_lost_irq = ide_dma_lost_irq, |
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.dma_timer_expiry = ide_dma_sff_timer_expiry, |
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.dma_sff_read_status = ide_dma_sff_read_status, |
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}; |
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static const struct ide_port_info tc86c001_chipset = { |
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.name = DRV_NAME, |
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.init_hwif = init_hwif_tc86c001, |
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.port_ops = &tc86c001_port_ops, |
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.dma_ops = &tc86c001_dma_ops, |
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.host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD, |
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.pio_mask = ATA_PIO4, |
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.mwdma_mask = ATA_MWDMA2, |
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.udma_mask = ATA_UDMA4, |
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}; |
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static int tc86c001_init_one(struct pci_dev *dev, |
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const struct pci_device_id *id) |
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{ |
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int rc; |
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rc = pci_enable_device(dev); |
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if (rc) |
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goto out; |
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rc = pci_request_region(dev, 5, DRV_NAME); |
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if (rc) { |
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printk(KERN_ERR DRV_NAME ": system control regs already in use"); |
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goto out_disable; |
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} |
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rc = ide_pci_init_one(dev, &tc86c001_chipset, NULL); |
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if (rc) |
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goto out_release; |
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goto out; |
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out_release: |
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pci_release_region(dev, 5); |
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out_disable: |
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pci_disable_device(dev); |
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out: |
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return rc; |
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} |
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static void tc86c001_remove(struct pci_dev *dev) |
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{ |
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ide_pci_remove(dev); |
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pci_release_region(dev, 5); |
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pci_disable_device(dev); |
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} |
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static const struct pci_device_id tc86c001_pci_tbl[] = { |
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{ PCI_VDEVICE(TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE), 0 }, |
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{ 0, } |
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}; |
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MODULE_DEVICE_TABLE(pci, tc86c001_pci_tbl); |
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static struct pci_driver tc86c001_pci_driver = { |
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.name = "TC86C001", |
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.id_table = tc86c001_pci_tbl, |
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.probe = tc86c001_init_one, |
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.remove = tc86c001_remove, |
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}; |
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static int __init tc86c001_ide_init(void) |
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{ |
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return ide_pci_register_driver(&tc86c001_pci_driver); |
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} |
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static void __exit tc86c001_ide_exit(void) |
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{ |
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pci_unregister_driver(&tc86c001_pci_driver); |
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} |
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module_init(tc86c001_ide_init); |
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module_exit(tc86c001_ide_exit); |
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MODULE_AUTHOR("MontaVista Software, Inc. <[email protected]>"); |
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MODULE_DESCRIPTION("PCI driver module for TC86C001 IDE"); |
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MODULE_LICENSE("GPL");
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