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216 lines
6.0 KiB
216 lines
6.0 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (C) 2004-2005 Advanced Micro Devices, Inc. |
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* Copyright (C) 2007 Bartlomiej Zolnierkiewicz |
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* |
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* History: |
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* 09/20/2005 - Jaya Kumar <[email protected]> |
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* - Reworked tuneproc, set_drive, misc mods to prep for mainline |
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* - Work was sponsored by CIS (M) Sdn Bhd. |
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* Ported to Kernel 2.6.11 on June 26, 2005 by |
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* Wolfgang Zuleger <[email protected]> |
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* Alexander Kiausch <[email protected]> |
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* Originally developed by AMD for 2.4/2.6 |
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* |
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* Development of this chipset driver was funded |
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* by the nice folks at National Semiconductor/AMD. |
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* |
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* Documentation: |
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* CS5535 documentation available from AMD |
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*/ |
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#include <linux/module.h> |
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#include <linux/pci.h> |
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#include <linux/ide.h> |
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#define DRV_NAME "cs5535" |
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#define MSR_ATAC_BASE 0x51300000 |
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#define ATAC_GLD_MSR_CAP (MSR_ATAC_BASE+0) |
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#define ATAC_GLD_MSR_CONFIG (MSR_ATAC_BASE+0x01) |
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#define ATAC_GLD_MSR_SMI (MSR_ATAC_BASE+0x02) |
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#define ATAC_GLD_MSR_ERROR (MSR_ATAC_BASE+0x03) |
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#define ATAC_GLD_MSR_PM (MSR_ATAC_BASE+0x04) |
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#define ATAC_GLD_MSR_DIAG (MSR_ATAC_BASE+0x05) |
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#define ATAC_IO_BAR (MSR_ATAC_BASE+0x08) |
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#define ATAC_RESET (MSR_ATAC_BASE+0x10) |
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#define ATAC_CH0D0_PIO (MSR_ATAC_BASE+0x20) |
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#define ATAC_CH0D0_DMA (MSR_ATAC_BASE+0x21) |
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#define ATAC_CH0D1_PIO (MSR_ATAC_BASE+0x22) |
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#define ATAC_CH0D1_DMA (MSR_ATAC_BASE+0x23) |
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#define ATAC_PCI_ABRTERR (MSR_ATAC_BASE+0x24) |
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#define ATAC_BM0_CMD_PRIM 0x00 |
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#define ATAC_BM0_STS_PRIM 0x02 |
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#define ATAC_BM0_PRD 0x04 |
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#define CS5535_CABLE_DETECT 0x48 |
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/* Format I PIO settings. We separate out cmd and data for safer timings */ |
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static unsigned int cs5535_pio_cmd_timings[5] = |
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{ 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131 }; |
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static unsigned int cs5535_pio_dta_timings[5] = |
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{ 0xF7F4, 0xF173, 0x8141, 0x5131, 0x1131 }; |
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static unsigned int cs5535_mwdma_timings[3] = |
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{ 0x7F0FFFF3, 0x7F035352, 0x7f024241 }; |
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static unsigned int cs5535_udma_timings[5] = |
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{ 0x7F7436A1, 0x7F733481, 0x7F723261, 0x7F713161, 0x7F703061 }; |
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/* Macros to check if the register is the reset value - reset value is an |
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invalid timing and indicates the register has not been set previously */ |
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#define CS5535_BAD_PIO(timings) ( (timings&~0x80000000UL) == 0x00009172 ) |
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#define CS5535_BAD_DMA(timings) ( (timings & 0x000FFFFF) == 0x00077771 ) |
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/**** |
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* cs5535_set_speed - Configure the chipset to the new speed |
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* @drive: Drive to set up |
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* @speed: desired speed |
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* |
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* cs5535_set_speed() configures the chipset to a new speed. |
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*/ |
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static void cs5535_set_speed(ide_drive_t *drive, const u8 speed) |
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{ |
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u32 reg = 0, dummy; |
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u8 unit = drive->dn & 1; |
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/* Set the PIO timings */ |
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if (speed < XFER_SW_DMA_0) { |
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ide_drive_t *pair = ide_get_pair_dev(drive); |
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u8 cmd, pioa; |
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cmd = pioa = speed - XFER_PIO_0; |
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if (pair) { |
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u8 piob = pair->pio_mode - XFER_PIO_0; |
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if (piob < cmd) |
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cmd = piob; |
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} |
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/* Write the speed of the current drive */ |
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reg = (cs5535_pio_cmd_timings[cmd] << 16) | |
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cs5535_pio_dta_timings[pioa]; |
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wrmsr(unit ? ATAC_CH0D1_PIO : ATAC_CH0D0_PIO, reg, 0); |
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/* And if nessesary - change the speed of the other drive */ |
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rdmsr(unit ? ATAC_CH0D0_PIO : ATAC_CH0D1_PIO, reg, dummy); |
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if (((reg >> 16) & cs5535_pio_cmd_timings[cmd]) != |
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cs5535_pio_cmd_timings[cmd]) { |
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reg &= 0x0000FFFF; |
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reg |= cs5535_pio_cmd_timings[cmd] << 16; |
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wrmsr(unit ? ATAC_CH0D0_PIO : ATAC_CH0D1_PIO, reg, 0); |
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} |
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/* Set bit 31 of the DMA register for PIO format 1 timings */ |
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rdmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, dummy); |
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wrmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, |
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reg | 0x80000000UL, 0); |
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} else { |
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rdmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, dummy); |
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reg &= 0x80000000UL; /* Preserve the PIO format bit */ |
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if (speed >= XFER_UDMA_0 && speed <= XFER_UDMA_4) |
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reg |= cs5535_udma_timings[speed - XFER_UDMA_0]; |
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else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) |
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reg |= cs5535_mwdma_timings[speed - XFER_MW_DMA_0]; |
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else |
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return; |
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wrmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, 0); |
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} |
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} |
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/** |
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* cs5535_set_dma_mode - set host controller for DMA mode |
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* @hwif: port |
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* @drive: drive |
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* |
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* Programs the chipset for DMA mode. |
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*/ |
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static void cs5535_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) |
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{ |
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cs5535_set_speed(drive, drive->dma_mode); |
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} |
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/** |
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* cs5535_set_pio_mode - set host controller for PIO mode |
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* @hwif: port |
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* @drive: drive |
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* |
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* A callback from the upper layers for PIO-only tuning. |
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*/ |
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static void cs5535_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) |
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{ |
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cs5535_set_speed(drive, drive->pio_mode); |
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} |
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static u8 cs5535_cable_detect(ide_hwif_t *hwif) |
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{ |
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struct pci_dev *dev = to_pci_dev(hwif->dev); |
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u8 bit; |
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/* if a 80 wire cable was detected */ |
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pci_read_config_byte(dev, CS5535_CABLE_DETECT, &bit); |
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return (bit & 1) ? ATA_CBL_PATA80 : ATA_CBL_PATA40; |
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} |
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static const struct ide_port_ops cs5535_port_ops = { |
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.set_pio_mode = cs5535_set_pio_mode, |
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.set_dma_mode = cs5535_set_dma_mode, |
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.cable_detect = cs5535_cable_detect, |
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}; |
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static const struct ide_port_info cs5535_chipset = { |
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.name = DRV_NAME, |
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.port_ops = &cs5535_port_ops, |
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.host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE, |
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.pio_mask = ATA_PIO4, |
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.mwdma_mask = ATA_MWDMA2, |
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.udma_mask = ATA_UDMA4, |
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}; |
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static int cs5535_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
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{ |
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return ide_pci_init_one(dev, &cs5535_chipset, NULL); |
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} |
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static const struct pci_device_id cs5535_pci_tbl[] = { |
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{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_CS5535_IDE), 0 }, |
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5535_IDE), }, |
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{ 0, }, |
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}; |
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MODULE_DEVICE_TABLE(pci, cs5535_pci_tbl); |
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static struct pci_driver cs5535_pci_driver = { |
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.name = "CS5535_IDE", |
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.id_table = cs5535_pci_tbl, |
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.probe = cs5535_init_one, |
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.remove = ide_pci_remove, |
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.suspend = ide_pci_suspend, |
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.resume = ide_pci_resume, |
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}; |
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static int __init cs5535_ide_init(void) |
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{ |
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return ide_pci_register_driver(&cs5535_pci_driver); |
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} |
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static void __exit cs5535_ide_exit(void) |
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{ |
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pci_unregister_driver(&cs5535_pci_driver); |
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} |
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module_init(cs5535_ide_init); |
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module_exit(cs5535_ide_exit); |
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MODULE_AUTHOR("AMD"); |
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MODULE_DESCRIPTION("PCI driver module for AMD/NS CS5535 IDE"); |
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MODULE_LICENSE("GPL");
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