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339 lines
8.5 KiB
339 lines
8.5 KiB
/* |
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* P2WI (Push-Pull Two Wire Interface) bus driver. |
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* |
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* Author: Boris BREZILLON <[email protected]> |
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* |
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* This file is licensed under the terms of the GNU General Public License |
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* version 2. This program is licensed "as is" without any warranty of any |
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* kind, whether express or implied. |
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* |
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* The P2WI controller looks like an SMBus controller which only supports byte |
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* data transfers. But, it differs from standard SMBus protocol on several |
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* aspects: |
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* - it supports only one slave device, and thus drop the address field |
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* - it adds a parity bit every 8bits of data |
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* - only one read access is required to read a byte (instead of a write |
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* followed by a read access in standard SMBus protocol) |
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* - there's no Ack bit after each byte transfer |
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* |
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* This means this bus cannot be used to interface with standard SMBus |
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* devices (the only known device to support this interface is the AXP221 |
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* PMIC). |
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* |
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*/ |
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#include <linux/clk.h> |
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#include <linux/i2c.h> |
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#include <linux/io.h> |
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#include <linux/interrupt.h> |
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#include <linux/module.h> |
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#include <linux/of.h> |
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#include <linux/platform_device.h> |
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#include <linux/reset.h> |
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/* P2WI registers */ |
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#define P2WI_CTRL 0x0 |
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#define P2WI_CCR 0x4 |
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#define P2WI_INTE 0x8 |
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#define P2WI_INTS 0xc |
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#define P2WI_DADDR0 0x10 |
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#define P2WI_DADDR1 0x14 |
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#define P2WI_DLEN 0x18 |
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#define P2WI_DATA0 0x1c |
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#define P2WI_DATA1 0x20 |
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#define P2WI_LCR 0x24 |
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#define P2WI_PMCR 0x28 |
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/* CTRL fields */ |
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#define P2WI_CTRL_START_TRANS BIT(7) |
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#define P2WI_CTRL_ABORT_TRANS BIT(6) |
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#define P2WI_CTRL_GLOBAL_INT_ENB BIT(1) |
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#define P2WI_CTRL_SOFT_RST BIT(0) |
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/* CLK CTRL fields */ |
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#define P2WI_CCR_SDA_OUT_DELAY(v) (((v) & 0x7) << 8) |
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#define P2WI_CCR_MAX_CLK_DIV 0xff |
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#define P2WI_CCR_CLK_DIV(v) ((v) & P2WI_CCR_MAX_CLK_DIV) |
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/* STATUS fields */ |
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#define P2WI_INTS_TRANS_ERR_ID(v) (((v) >> 8) & 0xff) |
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#define P2WI_INTS_LOAD_BSY BIT(2) |
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#define P2WI_INTS_TRANS_ERR BIT(1) |
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#define P2WI_INTS_TRANS_OVER BIT(0) |
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/* DATA LENGTH fields*/ |
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#define P2WI_DLEN_READ BIT(4) |
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#define P2WI_DLEN_DATA_LENGTH(v) ((v - 1) & 0x7) |
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/* LINE CTRL fields*/ |
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#define P2WI_LCR_SCL_STATE BIT(5) |
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#define P2WI_LCR_SDA_STATE BIT(4) |
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#define P2WI_LCR_SCL_CTL BIT(3) |
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#define P2WI_LCR_SCL_CTL_EN BIT(2) |
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#define P2WI_LCR_SDA_CTL BIT(1) |
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#define P2WI_LCR_SDA_CTL_EN BIT(0) |
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/* PMU MODE CTRL fields */ |
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#define P2WI_PMCR_PMU_INIT_SEND BIT(31) |
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#define P2WI_PMCR_PMU_INIT_DATA(v) (((v) & 0xff) << 16) |
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#define P2WI_PMCR_PMU_MODE_REG(v) (((v) & 0xff) << 8) |
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#define P2WI_PMCR_PMU_DEV_ADDR(v) ((v) & 0xff) |
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#define P2WI_MAX_FREQ 6000000 |
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struct p2wi { |
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struct i2c_adapter adapter; |
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struct completion complete; |
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unsigned int status; |
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void __iomem *regs; |
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struct clk *clk; |
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struct reset_control *rstc; |
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int slave_addr; |
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}; |
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static irqreturn_t p2wi_interrupt(int irq, void *dev_id) |
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{ |
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struct p2wi *p2wi = dev_id; |
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unsigned long status; |
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status = readl(p2wi->regs + P2WI_INTS); |
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p2wi->status = status; |
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/* Clear interrupts */ |
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status &= (P2WI_INTS_LOAD_BSY | P2WI_INTS_TRANS_ERR | |
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P2WI_INTS_TRANS_OVER); |
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writel(status, p2wi->regs + P2WI_INTS); |
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complete(&p2wi->complete); |
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return IRQ_HANDLED; |
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} |
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static u32 p2wi_functionality(struct i2c_adapter *adap) |
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{ |
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return I2C_FUNC_SMBUS_BYTE_DATA; |
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} |
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static int p2wi_smbus_xfer(struct i2c_adapter *adap, u16 addr, |
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unsigned short flags, char read_write, |
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u8 command, int size, union i2c_smbus_data *data) |
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{ |
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struct p2wi *p2wi = i2c_get_adapdata(adap); |
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unsigned long dlen = P2WI_DLEN_DATA_LENGTH(1); |
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if (p2wi->slave_addr >= 0 && addr != p2wi->slave_addr) { |
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dev_err(&adap->dev, "invalid P2WI address\n"); |
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return -EINVAL; |
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} |
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if (!data) |
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return -EINVAL; |
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writel(command, p2wi->regs + P2WI_DADDR0); |
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if (read_write == I2C_SMBUS_READ) |
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dlen |= P2WI_DLEN_READ; |
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else |
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writel(data->byte, p2wi->regs + P2WI_DATA0); |
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writel(dlen, p2wi->regs + P2WI_DLEN); |
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if (readl(p2wi->regs + P2WI_CTRL) & P2WI_CTRL_START_TRANS) { |
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dev_err(&adap->dev, "P2WI bus busy\n"); |
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return -EBUSY; |
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} |
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reinit_completion(&p2wi->complete); |
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writel(P2WI_INTS_LOAD_BSY | P2WI_INTS_TRANS_ERR | P2WI_INTS_TRANS_OVER, |
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p2wi->regs + P2WI_INTE); |
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writel(P2WI_CTRL_START_TRANS | P2WI_CTRL_GLOBAL_INT_ENB, |
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p2wi->regs + P2WI_CTRL); |
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wait_for_completion(&p2wi->complete); |
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if (p2wi->status & P2WI_INTS_LOAD_BSY) { |
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dev_err(&adap->dev, "P2WI bus busy\n"); |
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return -EBUSY; |
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} |
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if (p2wi->status & P2WI_INTS_TRANS_ERR) { |
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dev_err(&adap->dev, "P2WI bus xfer error\n"); |
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return -ENXIO; |
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} |
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if (read_write == I2C_SMBUS_READ) |
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data->byte = readl(p2wi->regs + P2WI_DATA0); |
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return 0; |
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} |
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static const struct i2c_algorithm p2wi_algo = { |
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.smbus_xfer = p2wi_smbus_xfer, |
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.functionality = p2wi_functionality, |
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}; |
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static const struct of_device_id p2wi_of_match_table[] = { |
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{ .compatible = "allwinner,sun6i-a31-p2wi" }, |
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{} |
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}; |
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MODULE_DEVICE_TABLE(of, p2wi_of_match_table); |
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static int p2wi_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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struct device_node *np = dev->of_node; |
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struct device_node *childnp; |
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unsigned long parent_clk_freq; |
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u32 clk_freq = I2C_MAX_STANDARD_MODE_FREQ; |
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struct p2wi *p2wi; |
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u32 slave_addr; |
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int clk_div; |
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int irq; |
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int ret; |
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of_property_read_u32(np, "clock-frequency", &clk_freq); |
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if (clk_freq > P2WI_MAX_FREQ) { |
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dev_err(dev, |
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"required clock-frequency (%u Hz) is too high (max = 6MHz)", |
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clk_freq); |
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return -EINVAL; |
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} |
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if (of_get_child_count(np) > 1) { |
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dev_err(dev, "P2WI only supports one slave device\n"); |
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return -EINVAL; |
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} |
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p2wi = devm_kzalloc(dev, sizeof(struct p2wi), GFP_KERNEL); |
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if (!p2wi) |
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return -ENOMEM; |
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p2wi->slave_addr = -1; |
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/* |
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* Authorize a p2wi node without any children to be able to use an |
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* i2c-dev from userpace. |
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* In this case the slave_addr is set to -1 and won't be checked when |
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* launching a P2WI transfer. |
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*/ |
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childnp = of_get_next_available_child(np, NULL); |
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if (childnp) { |
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ret = of_property_read_u32(childnp, "reg", &slave_addr); |
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if (ret) { |
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dev_err(dev, "invalid slave address on node %pOF\n", |
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childnp); |
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return -EINVAL; |
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} |
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p2wi->slave_addr = slave_addr; |
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} |
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p2wi->regs = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(p2wi->regs)) |
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return PTR_ERR(p2wi->regs); |
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strlcpy(p2wi->adapter.name, pdev->name, sizeof(p2wi->adapter.name)); |
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irq = platform_get_irq(pdev, 0); |
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if (irq < 0) |
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return irq; |
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p2wi->clk = devm_clk_get(dev, NULL); |
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if (IS_ERR(p2wi->clk)) { |
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ret = PTR_ERR(p2wi->clk); |
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dev_err(dev, "failed to retrieve clk: %d\n", ret); |
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return ret; |
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} |
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ret = clk_prepare_enable(p2wi->clk); |
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if (ret) { |
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dev_err(dev, "failed to enable clk: %d\n", ret); |
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return ret; |
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} |
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parent_clk_freq = clk_get_rate(p2wi->clk); |
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p2wi->rstc = devm_reset_control_get_exclusive(dev, NULL); |
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if (IS_ERR(p2wi->rstc)) { |
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ret = PTR_ERR(p2wi->rstc); |
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dev_err(dev, "failed to retrieve reset controller: %d\n", ret); |
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goto err_clk_disable; |
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} |
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ret = reset_control_deassert(p2wi->rstc); |
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if (ret) { |
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dev_err(dev, "failed to deassert reset line: %d\n", ret); |
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goto err_clk_disable; |
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} |
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init_completion(&p2wi->complete); |
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p2wi->adapter.dev.parent = dev; |
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p2wi->adapter.algo = &p2wi_algo; |
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p2wi->adapter.owner = THIS_MODULE; |
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p2wi->adapter.dev.of_node = pdev->dev.of_node; |
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platform_set_drvdata(pdev, p2wi); |
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i2c_set_adapdata(&p2wi->adapter, p2wi); |
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ret = devm_request_irq(dev, irq, p2wi_interrupt, 0, pdev->name, p2wi); |
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if (ret) { |
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dev_err(dev, "can't register interrupt handler irq%d: %d\n", |
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irq, ret); |
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goto err_reset_assert; |
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} |
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writel(P2WI_CTRL_SOFT_RST, p2wi->regs + P2WI_CTRL); |
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clk_div = parent_clk_freq / clk_freq; |
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if (!clk_div) { |
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dev_warn(dev, |
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"clock-frequency is too high, setting it to %lu Hz\n", |
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parent_clk_freq); |
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clk_div = 1; |
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} else if (clk_div > P2WI_CCR_MAX_CLK_DIV) { |
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dev_warn(dev, |
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"clock-frequency is too low, setting it to %lu Hz\n", |
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parent_clk_freq / P2WI_CCR_MAX_CLK_DIV); |
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clk_div = P2WI_CCR_MAX_CLK_DIV; |
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} |
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writel(P2WI_CCR_SDA_OUT_DELAY(1) | P2WI_CCR_CLK_DIV(clk_div), |
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p2wi->regs + P2WI_CCR); |
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ret = i2c_add_adapter(&p2wi->adapter); |
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if (!ret) |
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return 0; |
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err_reset_assert: |
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reset_control_assert(p2wi->rstc); |
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err_clk_disable: |
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clk_disable_unprepare(p2wi->clk); |
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return ret; |
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} |
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static int p2wi_remove(struct platform_device *dev) |
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{ |
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struct p2wi *p2wi = platform_get_drvdata(dev); |
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reset_control_assert(p2wi->rstc); |
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clk_disable_unprepare(p2wi->clk); |
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i2c_del_adapter(&p2wi->adapter); |
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return 0; |
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} |
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static struct platform_driver p2wi_driver = { |
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.probe = p2wi_probe, |
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.remove = p2wi_remove, |
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.driver = { |
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.name = "i2c-sunxi-p2wi", |
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.of_match_table = p2wi_of_match_table, |
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}, |
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}; |
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module_platform_driver(p2wi_driver); |
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MODULE_AUTHOR("Boris BREZILLON <[email protected]>"); |
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MODULE_DESCRIPTION("Allwinner P2WI driver"); |
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MODULE_LICENSE("GPL v2");
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