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168 lines
3.6 KiB
168 lines
3.6 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* Sparx5 SoC temperature sensor driver |
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* |
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* Copyright (C) 2020 Lars Povlsen <[email protected]> |
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*/ |
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#include <linux/bitfield.h> |
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#include <linux/clk.h> |
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#include <linux/hwmon.h> |
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#include <linux/init.h> |
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#include <linux/io.h> |
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#include <linux/mod_devicetable.h> |
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#include <linux/module.h> |
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#include <linux/platform_device.h> |
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#define TEMP_CTRL 0 |
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#define TEMP_CFG 4 |
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#define TEMP_CFG_CYCLES GENMASK(24, 15) |
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#define TEMP_CFG_ENA BIT(0) |
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#define TEMP_STAT 8 |
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#define TEMP_STAT_VALID BIT(12) |
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#define TEMP_STAT_TEMP GENMASK(11, 0) |
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struct s5_hwmon { |
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void __iomem *base; |
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struct clk *clk; |
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}; |
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static void s5_temp_clk_disable(void *data) |
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{ |
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struct clk *clk = data; |
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clk_disable_unprepare(clk); |
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} |
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static void s5_temp_enable(struct s5_hwmon *hwmon) |
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{ |
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u32 val = readl(hwmon->base + TEMP_CFG); |
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u32 clk = clk_get_rate(hwmon->clk) / USEC_PER_SEC; |
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val &= ~TEMP_CFG_CYCLES; |
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val |= FIELD_PREP(TEMP_CFG_CYCLES, clk); |
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val |= TEMP_CFG_ENA; |
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writel(val, hwmon->base + TEMP_CFG); |
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} |
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static int s5_read(struct device *dev, enum hwmon_sensor_types type, |
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u32 attr, int channel, long *temp) |
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{ |
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struct s5_hwmon *hwmon = dev_get_drvdata(dev); |
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int rc = 0, value; |
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u32 stat; |
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switch (attr) { |
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case hwmon_temp_input: |
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stat = readl_relaxed(hwmon->base + TEMP_STAT); |
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if (!(stat & TEMP_STAT_VALID)) |
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return -EAGAIN; |
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value = stat & TEMP_STAT_TEMP; |
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/* |
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* From register documentation: |
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* Temp(C) = TEMP_SENSOR_STAT.TEMP / 4096 * 352.2 - 109.4 |
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*/ |
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value = DIV_ROUND_CLOSEST(value * 3522, 4096) - 1094; |
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/* |
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* Scale down by 10 from above and multiply by 1000 to |
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* have millidegrees as specified by the hwmon sysfs |
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* interface. |
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*/ |
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value *= 100; |
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*temp = value; |
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break; |
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default: |
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rc = -EOPNOTSUPP; |
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break; |
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} |
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return rc; |
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} |
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static umode_t s5_is_visible(const void *_data, enum hwmon_sensor_types type, |
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u32 attr, int channel) |
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{ |
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if (type != hwmon_temp) |
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return 0; |
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switch (attr) { |
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case hwmon_temp_input: |
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return 0444; |
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default: |
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return 0; |
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} |
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} |
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static const struct hwmon_channel_info *s5_info[] = { |
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HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ), |
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HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT), |
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NULL |
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}; |
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static const struct hwmon_ops s5_hwmon_ops = { |
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.is_visible = s5_is_visible, |
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.read = s5_read, |
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}; |
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static const struct hwmon_chip_info s5_chip_info = { |
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.ops = &s5_hwmon_ops, |
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.info = s5_info, |
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}; |
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static int s5_temp_probe(struct platform_device *pdev) |
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{ |
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struct device *hwmon_dev; |
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struct s5_hwmon *hwmon; |
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int ret; |
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hwmon = devm_kzalloc(&pdev->dev, sizeof(*hwmon), GFP_KERNEL); |
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if (!hwmon) |
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return -ENOMEM; |
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hwmon->base = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(hwmon->base)) |
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return PTR_ERR(hwmon->base); |
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hwmon->clk = devm_clk_get(&pdev->dev, NULL); |
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if (IS_ERR(hwmon->clk)) |
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return PTR_ERR(hwmon->clk); |
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ret = clk_prepare_enable(hwmon->clk); |
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if (ret) |
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return ret; |
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ret = devm_add_action_or_reset(&pdev->dev, s5_temp_clk_disable, |
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hwmon->clk); |
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if (ret) |
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return ret; |
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s5_temp_enable(hwmon); |
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hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev, |
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"s5_temp", |
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hwmon, |
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&s5_chip_info, |
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NULL); |
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return PTR_ERR_OR_ZERO(hwmon_dev); |
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} |
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static const struct of_device_id s5_temp_match[] = { |
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{ .compatible = "microchip,sparx5-temp" }, |
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{}, |
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}; |
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MODULE_DEVICE_TABLE(of, s5_temp_match); |
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static struct platform_driver s5_temp_driver = { |
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.probe = s5_temp_probe, |
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.driver = { |
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.name = "sparx5-temp", |
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.of_match_table = s5_temp_match, |
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}, |
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}; |
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module_platform_driver(s5_temp_driver); |
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MODULE_AUTHOR("Lars Povlsen <[email protected]>"); |
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MODULE_DESCRIPTION("Sparx5 SoC temperature sensor driver"); |
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MODULE_LICENSE("GPL");
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