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550 lines
15 KiB
550 lines
15 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Fan Control HDL CORE driver |
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* |
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* Copyright 2019 Analog Devices Inc. |
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*/ |
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#include <linux/bits.h> |
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#include <linux/clk.h> |
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#include <linux/fpga/adi-axi-common.h> |
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#include <linux/hwmon.h> |
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#include <linux/hwmon-sysfs.h> |
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#include <linux/interrupt.h> |
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#include <linux/io.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/of.h> |
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#include <linux/platform_device.h> |
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/* register map */ |
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#define ADI_REG_RSTN 0x0080 |
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#define ADI_REG_PWM_WIDTH 0x0084 |
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#define ADI_REG_TACH_PERIOD 0x0088 |
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#define ADI_REG_TACH_TOLERANCE 0x008c |
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#define ADI_REG_PWM_PERIOD 0x00c0 |
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#define ADI_REG_TACH_MEASUR 0x00c4 |
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#define ADI_REG_TEMPERATURE 0x00c8 |
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#define ADI_REG_TEMP_00_H 0x0100 |
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#define ADI_REG_TEMP_25_L 0x0104 |
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#define ADI_REG_TEMP_25_H 0x0108 |
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#define ADI_REG_TEMP_50_L 0x010c |
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#define ADI_REG_TEMP_50_H 0x0110 |
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#define ADI_REG_TEMP_75_L 0x0114 |
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#define ADI_REG_TEMP_75_H 0x0118 |
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#define ADI_REG_TEMP_100_L 0x011c |
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#define ADI_REG_IRQ_MASK 0x0040 |
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#define ADI_REG_IRQ_PENDING 0x0044 |
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#define ADI_REG_IRQ_SRC 0x0048 |
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/* IRQ sources */ |
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#define ADI_IRQ_SRC_PWM_CHANGED BIT(0) |
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#define ADI_IRQ_SRC_TACH_ERR BIT(1) |
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#define ADI_IRQ_SRC_TEMP_INCREASE BIT(2) |
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#define ADI_IRQ_SRC_NEW_MEASUR BIT(3) |
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#define ADI_IRQ_SRC_MASK GENMASK(3, 0) |
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#define ADI_IRQ_MASK_OUT_ALL 0xFFFFFFFFU |
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#define SYSFS_PWM_MAX 255 |
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struct axi_fan_control_data { |
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void __iomem *base; |
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struct device *hdev; |
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unsigned long clk_rate; |
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int irq; |
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/* pulses per revolution */ |
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u32 ppr; |
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bool hw_pwm_req; |
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bool update_tacho_params; |
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u8 fan_fault; |
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}; |
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static inline void axi_iowrite(const u32 val, const u32 reg, |
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const struct axi_fan_control_data *ctl) |
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{ |
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iowrite32(val, ctl->base + reg); |
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} |
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static inline u32 axi_ioread(const u32 reg, |
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const struct axi_fan_control_data *ctl) |
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{ |
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return ioread32(ctl->base + reg); |
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} |
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/* |
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* The core calculates the temperature as: |
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* T = /raw * 509.3140064 / 65535) - 280.2308787 |
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*/ |
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static ssize_t axi_fan_control_show(struct device *dev, struct device_attribute *da, char *buf) |
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{ |
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struct axi_fan_control_data *ctl = dev_get_drvdata(dev); |
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struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
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u32 temp = axi_ioread(attr->index, ctl); |
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temp = DIV_ROUND_CLOSEST_ULL(temp * 509314ULL, 65535) - 280230; |
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return sprintf(buf, "%u\n", temp); |
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} |
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static ssize_t axi_fan_control_store(struct device *dev, struct device_attribute *da, |
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const char *buf, size_t count) |
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{ |
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struct axi_fan_control_data *ctl = dev_get_drvdata(dev); |
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struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
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u32 temp; |
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int ret; |
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ret = kstrtou32(buf, 10, &temp); |
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if (ret) |
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return ret; |
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temp = DIV_ROUND_CLOSEST_ULL((temp + 280230) * 65535ULL, 509314); |
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axi_iowrite(temp, attr->index, ctl); |
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return count; |
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} |
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static long axi_fan_control_get_pwm_duty(const struct axi_fan_control_data *ctl) |
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{ |
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u32 pwm_width = axi_ioread(ADI_REG_PWM_WIDTH, ctl); |
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u32 pwm_period = axi_ioread(ADI_REG_PWM_PERIOD, ctl); |
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/* |
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* PWM_PERIOD is a RO register set by the core. It should never be 0. |
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* For now we are trusting the HW... |
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*/ |
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return DIV_ROUND_CLOSEST(pwm_width * SYSFS_PWM_MAX, pwm_period); |
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} |
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static int axi_fan_control_set_pwm_duty(const long val, |
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struct axi_fan_control_data *ctl) |
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{ |
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u32 pwm_period = axi_ioread(ADI_REG_PWM_PERIOD, ctl); |
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u32 new_width; |
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long __val = clamp_val(val, 0, SYSFS_PWM_MAX); |
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new_width = DIV_ROUND_CLOSEST(__val * pwm_period, SYSFS_PWM_MAX); |
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axi_iowrite(new_width, ADI_REG_PWM_WIDTH, ctl); |
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return 0; |
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} |
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static long axi_fan_control_get_fan_rpm(const struct axi_fan_control_data *ctl) |
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{ |
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const u32 tach = axi_ioread(ADI_REG_TACH_MEASUR, ctl); |
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if (tach == 0) |
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/* should we return error, EAGAIN maybe? */ |
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return 0; |
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/* |
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* The tacho period should be: |
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* TACH = 60/(ppr * rpm), where rpm is revolutions per second |
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* and ppr is pulses per revolution. |
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* Given the tacho period, we can multiply it by the input clock |
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* so that we know how many clocks we need to have this period. |
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* From this, we can derive the RPM value. |
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*/ |
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return DIV_ROUND_CLOSEST(60 * ctl->clk_rate, ctl->ppr * tach); |
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} |
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static int axi_fan_control_read_temp(struct device *dev, u32 attr, long *val) |
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{ |
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struct axi_fan_control_data *ctl = dev_get_drvdata(dev); |
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long raw_temp; |
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switch (attr) { |
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case hwmon_temp_input: |
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raw_temp = axi_ioread(ADI_REG_TEMPERATURE, ctl); |
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/* |
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* The formula for the temperature is: |
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* T = (ADC * 501.3743 / 2^bits) - 273.6777 |
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* It's multiplied by 1000 to have millidegrees as |
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* specified by the hwmon sysfs interface. |
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*/ |
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*val = ((raw_temp * 501374) >> 16) - 273677; |
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return 0; |
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default: |
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return -ENOTSUPP; |
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} |
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} |
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static int axi_fan_control_read_fan(struct device *dev, u32 attr, long *val) |
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{ |
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struct axi_fan_control_data *ctl = dev_get_drvdata(dev); |
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switch (attr) { |
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case hwmon_fan_fault: |
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*val = ctl->fan_fault; |
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/* clear it now */ |
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ctl->fan_fault = 0; |
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return 0; |
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case hwmon_fan_input: |
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*val = axi_fan_control_get_fan_rpm(ctl); |
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return 0; |
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default: |
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return -ENOTSUPP; |
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} |
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} |
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static int axi_fan_control_read_pwm(struct device *dev, u32 attr, long *val) |
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{ |
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struct axi_fan_control_data *ctl = dev_get_drvdata(dev); |
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switch (attr) { |
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case hwmon_pwm_input: |
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*val = axi_fan_control_get_pwm_duty(ctl); |
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return 0; |
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default: |
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return -ENOTSUPP; |
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} |
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} |
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static int axi_fan_control_write_pwm(struct device *dev, u32 attr, long val) |
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{ |
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struct axi_fan_control_data *ctl = dev_get_drvdata(dev); |
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switch (attr) { |
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case hwmon_pwm_input: |
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return axi_fan_control_set_pwm_duty(val, ctl); |
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default: |
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return -ENOTSUPP; |
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} |
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} |
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static int axi_fan_control_read_labels(struct device *dev, |
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enum hwmon_sensor_types type, |
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u32 attr, int channel, const char **str) |
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{ |
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switch (type) { |
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case hwmon_fan: |
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*str = "FAN"; |
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return 0; |
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case hwmon_temp: |
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*str = "SYSMON4"; |
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return 0; |
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default: |
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return -ENOTSUPP; |
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} |
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} |
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static int axi_fan_control_read(struct device *dev, |
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enum hwmon_sensor_types type, |
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u32 attr, int channel, long *val) |
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{ |
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switch (type) { |
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case hwmon_fan: |
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return axi_fan_control_read_fan(dev, attr, val); |
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case hwmon_pwm: |
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return axi_fan_control_read_pwm(dev, attr, val); |
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case hwmon_temp: |
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return axi_fan_control_read_temp(dev, attr, val); |
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default: |
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return -ENOTSUPP; |
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} |
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} |
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static int axi_fan_control_write(struct device *dev, |
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enum hwmon_sensor_types type, |
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u32 attr, int channel, long val) |
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{ |
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switch (type) { |
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case hwmon_pwm: |
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return axi_fan_control_write_pwm(dev, attr, val); |
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default: |
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return -ENOTSUPP; |
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} |
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} |
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static umode_t axi_fan_control_fan_is_visible(const u32 attr) |
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{ |
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switch (attr) { |
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case hwmon_fan_input: |
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case hwmon_fan_fault: |
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case hwmon_fan_label: |
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return 0444; |
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default: |
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return 0; |
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} |
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} |
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static umode_t axi_fan_control_pwm_is_visible(const u32 attr) |
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{ |
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switch (attr) { |
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case hwmon_pwm_input: |
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return 0644; |
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default: |
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return 0; |
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} |
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} |
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static umode_t axi_fan_control_temp_is_visible(const u32 attr) |
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{ |
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switch (attr) { |
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case hwmon_temp_input: |
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case hwmon_temp_label: |
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return 0444; |
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default: |
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return 0; |
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} |
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} |
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static umode_t axi_fan_control_is_visible(const void *data, |
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enum hwmon_sensor_types type, |
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u32 attr, int channel) |
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{ |
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switch (type) { |
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case hwmon_fan: |
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return axi_fan_control_fan_is_visible(attr); |
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case hwmon_pwm: |
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return axi_fan_control_pwm_is_visible(attr); |
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case hwmon_temp: |
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return axi_fan_control_temp_is_visible(attr); |
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default: |
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return 0; |
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} |
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} |
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/* |
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* This core has two main ways of changing the PWM duty cycle. It is done, |
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* either by a request from userspace (writing on pwm1_input) or by the |
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* core itself. When the change is done by the core, it will use predefined |
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* parameters to evaluate the tach signal and, on that case we cannot set them. |
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* On the other hand, when the request is done by the user, with some arbitrary |
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* value that the core does not now about, we have to provide the tach |
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* parameters so that, the core can evaluate the signal. On the IRQ handler we |
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* distinguish this by using the ADI_IRQ_SRC_TEMP_INCREASE interrupt. This tell |
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* us that the CORE requested a new duty cycle. After this, there is 5s delay |
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* on which the core waits for the fan rotation speed to stabilize. After this |
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* we get ADI_IRQ_SRC_PWM_CHANGED irq where we will decide if we need to set |
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* the tach parameters or not on the next tach measurement cycle (corresponding |
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* already to the ney duty cycle) based on the %ctl->hw_pwm_req flag. |
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*/ |
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static irqreturn_t axi_fan_control_irq_handler(int irq, void *data) |
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{ |
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struct axi_fan_control_data *ctl = (struct axi_fan_control_data *)data; |
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u32 irq_pending = axi_ioread(ADI_REG_IRQ_PENDING, ctl); |
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u32 clear_mask; |
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if (irq_pending & ADI_IRQ_SRC_TEMP_INCREASE) |
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/* hardware requested a new pwm */ |
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ctl->hw_pwm_req = true; |
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if (irq_pending & ADI_IRQ_SRC_PWM_CHANGED) { |
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/* |
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* if the pwm changes on behalf of software, |
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* we need to provide new tacho parameters to the core. |
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* Wait for the next measurement for that... |
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*/ |
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if (!ctl->hw_pwm_req) { |
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ctl->update_tacho_params = true; |
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} else { |
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ctl->hw_pwm_req = false; |
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sysfs_notify(&ctl->hdev->kobj, NULL, "pwm1"); |
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} |
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} |
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if (irq_pending & ADI_IRQ_SRC_NEW_MEASUR) { |
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if (ctl->update_tacho_params) { |
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u32 new_tach = axi_ioread(ADI_REG_TACH_MEASUR, ctl); |
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/* get 25% tolerance */ |
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u32 tach_tol = DIV_ROUND_CLOSEST(new_tach * 25, 100); |
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/* set new tacho parameters */ |
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axi_iowrite(new_tach, ADI_REG_TACH_PERIOD, ctl); |
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axi_iowrite(tach_tol, ADI_REG_TACH_TOLERANCE, ctl); |
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ctl->update_tacho_params = false; |
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} |
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} |
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if (irq_pending & ADI_IRQ_SRC_TACH_ERR) |
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ctl->fan_fault = 1; |
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/* clear all interrupts */ |
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clear_mask = irq_pending & ADI_IRQ_SRC_MASK; |
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axi_iowrite(clear_mask, ADI_REG_IRQ_PENDING, ctl); |
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return IRQ_HANDLED; |
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} |
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static int axi_fan_control_init(struct axi_fan_control_data *ctl, |
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const struct device_node *np) |
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{ |
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int ret; |
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/* get fan pulses per revolution */ |
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ret = of_property_read_u32(np, "pulses-per-revolution", &ctl->ppr); |
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if (ret) |
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return ret; |
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/* 1, 2 and 4 are the typical and accepted values */ |
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if (ctl->ppr != 1 && ctl->ppr != 2 && ctl->ppr != 4) |
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return -EINVAL; |
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/* |
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* Enable all IRQs |
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*/ |
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axi_iowrite(ADI_IRQ_MASK_OUT_ALL & |
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~(ADI_IRQ_SRC_NEW_MEASUR | ADI_IRQ_SRC_TACH_ERR | |
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ADI_IRQ_SRC_PWM_CHANGED | ADI_IRQ_SRC_TEMP_INCREASE), |
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ADI_REG_IRQ_MASK, ctl); |
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/* bring the device out of reset */ |
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axi_iowrite(0x01, ADI_REG_RSTN, ctl); |
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return ret; |
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} |
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static void axi_fan_control_clk_disable(void *clk) |
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{ |
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clk_disable_unprepare(clk); |
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} |
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static const struct hwmon_channel_info *axi_fan_control_info[] = { |
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HWMON_CHANNEL_INFO(pwm, HWMON_PWM_INPUT), |
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HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT | HWMON_F_FAULT | HWMON_F_LABEL), |
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HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_LABEL), |
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NULL |
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}; |
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static const struct hwmon_ops axi_fan_control_hwmon_ops = { |
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.is_visible = axi_fan_control_is_visible, |
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.read = axi_fan_control_read, |
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.write = axi_fan_control_write, |
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.read_string = axi_fan_control_read_labels, |
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}; |
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static const struct hwmon_chip_info axi_chip_info = { |
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.ops = &axi_fan_control_hwmon_ops, |
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.info = axi_fan_control_info, |
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}; |
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/* temperature threshold below which PWM should be 0% */ |
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static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point1_temp_hyst, axi_fan_control, ADI_REG_TEMP_00_H); |
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/* temperature threshold above which PWM should be 25% */ |
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static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point1_temp, axi_fan_control, ADI_REG_TEMP_25_L); |
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/* temperature threshold below which PWM should be 25% */ |
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static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point2_temp_hyst, axi_fan_control, ADI_REG_TEMP_25_H); |
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/* temperature threshold above which PWM should be 50% */ |
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static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point2_temp, axi_fan_control, ADI_REG_TEMP_50_L); |
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/* temperature threshold below which PWM should be 50% */ |
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static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point3_temp_hyst, axi_fan_control, ADI_REG_TEMP_50_H); |
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/* temperature threshold above which PWM should be 75% */ |
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static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point3_temp, axi_fan_control, ADI_REG_TEMP_75_L); |
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/* temperature threshold below which PWM should be 75% */ |
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static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point4_temp_hyst, axi_fan_control, ADI_REG_TEMP_75_H); |
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/* temperature threshold above which PWM should be 100% */ |
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static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point4_temp, axi_fan_control, ADI_REG_TEMP_100_L); |
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static struct attribute *axi_fan_control_attrs[] = { |
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&sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr, |
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&sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr, |
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&sensor_dev_attr_pwm1_auto_point2_temp_hyst.dev_attr.attr, |
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&sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr, |
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&sensor_dev_attr_pwm1_auto_point3_temp_hyst.dev_attr.attr, |
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&sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr, |
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&sensor_dev_attr_pwm1_auto_point4_temp_hyst.dev_attr.attr, |
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&sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr, |
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NULL, |
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}; |
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ATTRIBUTE_GROUPS(axi_fan_control); |
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static const u32 version_1_0_0 = ADI_AXI_PCORE_VER(1, 0, 'a'); |
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static const struct of_device_id axi_fan_control_of_match[] = { |
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{ .compatible = "adi,axi-fan-control-1.00.a", |
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.data = (void *)&version_1_0_0}, |
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{}, |
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}; |
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MODULE_DEVICE_TABLE(of, axi_fan_control_of_match); |
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static int axi_fan_control_probe(struct platform_device *pdev) |
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{ |
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struct axi_fan_control_data *ctl; |
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struct clk *clk; |
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const struct of_device_id *id; |
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const char *name = "axi_fan_control"; |
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u32 version; |
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int ret; |
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id = of_match_node(axi_fan_control_of_match, pdev->dev.of_node); |
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if (!id) |
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return -EINVAL; |
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ctl = devm_kzalloc(&pdev->dev, sizeof(*ctl), GFP_KERNEL); |
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if (!ctl) |
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return -ENOMEM; |
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ctl->base = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(ctl->base)) |
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return PTR_ERR(ctl->base); |
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clk = devm_clk_get(&pdev->dev, NULL); |
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if (IS_ERR(clk)) { |
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dev_err(&pdev->dev, "clk_get failed with %ld\n", PTR_ERR(clk)); |
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return PTR_ERR(clk); |
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} |
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ret = clk_prepare_enable(clk); |
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if (ret) |
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return ret; |
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ret = devm_add_action_or_reset(&pdev->dev, axi_fan_control_clk_disable, clk); |
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if (ret) |
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return ret; |
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ctl->clk_rate = clk_get_rate(clk); |
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if (!ctl->clk_rate) |
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return -EINVAL; |
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version = axi_ioread(ADI_AXI_REG_VERSION, ctl); |
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if (ADI_AXI_PCORE_VER_MAJOR(version) != |
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ADI_AXI_PCORE_VER_MAJOR((*(u32 *)id->data))) { |
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dev_err(&pdev->dev, "Major version mismatch. Expected %d.%.2d.%c, Reported %d.%.2d.%c\n", |
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ADI_AXI_PCORE_VER_MAJOR((*(u32 *)id->data)), |
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ADI_AXI_PCORE_VER_MINOR((*(u32 *)id->data)), |
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ADI_AXI_PCORE_VER_PATCH((*(u32 *)id->data)), |
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ADI_AXI_PCORE_VER_MAJOR(version), |
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ADI_AXI_PCORE_VER_MINOR(version), |
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ADI_AXI_PCORE_VER_PATCH(version)); |
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return -ENODEV; |
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} |
|
|
|
ctl->irq = platform_get_irq(pdev, 0); |
|
if (ctl->irq < 0) |
|
return ctl->irq; |
|
|
|
ret = devm_request_threaded_irq(&pdev->dev, ctl->irq, NULL, |
|
axi_fan_control_irq_handler, |
|
IRQF_ONESHOT | IRQF_TRIGGER_HIGH, |
|
pdev->driver_override, ctl); |
|
if (ret) { |
|
dev_err(&pdev->dev, "failed to request an irq, %d", ret); |
|
return ret; |
|
} |
|
|
|
ret = axi_fan_control_init(ctl, pdev->dev.of_node); |
|
if (ret) { |
|
dev_err(&pdev->dev, "Failed to initialize device\n"); |
|
return ret; |
|
} |
|
|
|
ctl->hdev = devm_hwmon_device_register_with_info(&pdev->dev, |
|
name, |
|
ctl, |
|
&axi_chip_info, |
|
axi_fan_control_groups); |
|
|
|
return PTR_ERR_OR_ZERO(ctl->hdev); |
|
} |
|
|
|
static struct platform_driver axi_fan_control_driver = { |
|
.driver = { |
|
.name = "axi_fan_control_driver", |
|
.of_match_table = axi_fan_control_of_match, |
|
}, |
|
.probe = axi_fan_control_probe, |
|
}; |
|
module_platform_driver(axi_fan_control_driver); |
|
|
|
MODULE_AUTHOR("Nuno Sa <[email protected]>"); |
|
MODULE_DESCRIPTION("Analog Devices Fan Control HDL CORE driver"); |
|
MODULE_LICENSE("GPL");
|
|
|