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327 lines
8.6 KiB
327 lines
8.6 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* GPIO driver for the ACCES 104-IDI-48 family |
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* Copyright (C) 2015 William Breathitt Gray |
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* |
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* This driver supports the following ACCES devices: 104-IDI-48A, |
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* 104-IDI-48AC, 104-IDI-48B, and 104-IDI-48BC. |
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*/ |
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#include <linux/bitmap.h> |
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#include <linux/bitops.h> |
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#include <linux/device.h> |
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#include <linux/errno.h> |
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#include <linux/gpio/driver.h> |
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#include <linux/io.h> |
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#include <linux/ioport.h> |
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#include <linux/interrupt.h> |
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#include <linux/irqdesc.h> |
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#include <linux/isa.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/moduleparam.h> |
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#include <linux/spinlock.h> |
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#define IDI_48_EXTENT 8 |
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#define MAX_NUM_IDI_48 max_num_isa_dev(IDI_48_EXTENT) |
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static unsigned int base[MAX_NUM_IDI_48]; |
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static unsigned int num_idi_48; |
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module_param_hw_array(base, uint, ioport, &num_idi_48, 0); |
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MODULE_PARM_DESC(base, "ACCES 104-IDI-48 base addresses"); |
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static unsigned int irq[MAX_NUM_IDI_48]; |
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module_param_hw_array(irq, uint, irq, NULL, 0); |
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MODULE_PARM_DESC(irq, "ACCES 104-IDI-48 interrupt line numbers"); |
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/** |
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* struct idi_48_gpio - GPIO device private data structure |
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* @chip: instance of the gpio_chip |
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* @lock: synchronization lock to prevent I/O race conditions |
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* @ack_lock: synchronization lock to prevent IRQ handler race conditions |
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* @irq_mask: input bits affected by interrupts |
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* @base: base port address of the GPIO device |
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* @cos_enb: Change-Of-State IRQ enable boundaries mask |
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*/ |
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struct idi_48_gpio { |
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struct gpio_chip chip; |
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raw_spinlock_t lock; |
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spinlock_t ack_lock; |
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unsigned char irq_mask[6]; |
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unsigned base; |
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unsigned char cos_enb; |
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}; |
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static int idi_48_gpio_get_direction(struct gpio_chip *chip, unsigned offset) |
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{ |
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return GPIO_LINE_DIRECTION_IN; |
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} |
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static int idi_48_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
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{ |
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return 0; |
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} |
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static int idi_48_gpio_get(struct gpio_chip *chip, unsigned offset) |
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{ |
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struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip); |
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unsigned i; |
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static const unsigned int register_offset[6] = { 0, 1, 2, 4, 5, 6 }; |
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unsigned base_offset; |
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unsigned mask; |
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for (i = 0; i < 48; i += 8) |
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if (offset < i + 8) { |
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base_offset = register_offset[i / 8]; |
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mask = BIT(offset - i); |
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return !!(inb(idi48gpio->base + base_offset) & mask); |
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} |
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/* The following line should never execute since offset < 48 */ |
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return 0; |
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} |
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static int idi_48_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, |
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unsigned long *bits) |
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{ |
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struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip); |
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unsigned long offset; |
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unsigned long gpio_mask; |
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static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; |
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unsigned int port_addr; |
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unsigned long port_state; |
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/* clear bits array to a clean slate */ |
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bitmap_zero(bits, chip->ngpio); |
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for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) { |
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port_addr = idi48gpio->base + ports[offset / 8]; |
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port_state = inb(port_addr) & gpio_mask; |
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bitmap_set_value8(bits, port_state, offset); |
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} |
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return 0; |
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} |
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static void idi_48_irq_ack(struct irq_data *data) |
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{ |
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} |
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static void idi_48_irq_mask(struct irq_data *data) |
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{ |
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data); |
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struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip); |
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const unsigned offset = irqd_to_hwirq(data); |
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unsigned i; |
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unsigned mask; |
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unsigned boundary; |
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unsigned long flags; |
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for (i = 0; i < 48; i += 8) |
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if (offset < i + 8) { |
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mask = BIT(offset - i); |
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boundary = i / 8; |
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idi48gpio->irq_mask[boundary] &= ~mask; |
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if (!idi48gpio->irq_mask[boundary]) { |
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idi48gpio->cos_enb &= ~BIT(boundary); |
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raw_spin_lock_irqsave(&idi48gpio->lock, flags); |
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outb(idi48gpio->cos_enb, idi48gpio->base + 7); |
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raw_spin_unlock_irqrestore(&idi48gpio->lock, flags); |
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} |
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return; |
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} |
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} |
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static void idi_48_irq_unmask(struct irq_data *data) |
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{ |
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data); |
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struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip); |
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const unsigned offset = irqd_to_hwirq(data); |
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unsigned i; |
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unsigned mask; |
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unsigned boundary; |
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unsigned prev_irq_mask; |
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unsigned long flags; |
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for (i = 0; i < 48; i += 8) |
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if (offset < i + 8) { |
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mask = BIT(offset - i); |
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boundary = i / 8; |
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prev_irq_mask = idi48gpio->irq_mask[boundary]; |
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idi48gpio->irq_mask[boundary] |= mask; |
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if (!prev_irq_mask) { |
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idi48gpio->cos_enb |= BIT(boundary); |
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raw_spin_lock_irqsave(&idi48gpio->lock, flags); |
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outb(idi48gpio->cos_enb, idi48gpio->base + 7); |
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raw_spin_unlock_irqrestore(&idi48gpio->lock, flags); |
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} |
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return; |
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} |
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} |
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static int idi_48_irq_set_type(struct irq_data *data, unsigned flow_type) |
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{ |
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/* The only valid irq types are none and both-edges */ |
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if (flow_type != IRQ_TYPE_NONE && |
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(flow_type & IRQ_TYPE_EDGE_BOTH) != IRQ_TYPE_EDGE_BOTH) |
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return -EINVAL; |
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return 0; |
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} |
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static struct irq_chip idi_48_irqchip = { |
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.name = "104-idi-48", |
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.irq_ack = idi_48_irq_ack, |
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.irq_mask = idi_48_irq_mask, |
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.irq_unmask = idi_48_irq_unmask, |
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.irq_set_type = idi_48_irq_set_type |
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}; |
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static irqreturn_t idi_48_irq_handler(int irq, void *dev_id) |
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{ |
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struct idi_48_gpio *const idi48gpio = dev_id; |
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unsigned long cos_status; |
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unsigned long boundary; |
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unsigned long irq_mask; |
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unsigned long bit_num; |
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unsigned long gpio; |
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struct gpio_chip *const chip = &idi48gpio->chip; |
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spin_lock(&idi48gpio->ack_lock); |
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raw_spin_lock(&idi48gpio->lock); |
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cos_status = inb(idi48gpio->base + 7); |
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raw_spin_unlock(&idi48gpio->lock); |
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/* IRQ Status (bit 6) is active low (0 = IRQ generated by device) */ |
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if (cos_status & BIT(6)) { |
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spin_unlock(&idi48gpio->ack_lock); |
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return IRQ_NONE; |
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} |
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/* Bit 0-5 indicate which Change-Of-State boundary triggered the IRQ */ |
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cos_status &= 0x3F; |
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for_each_set_bit(boundary, &cos_status, 6) { |
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irq_mask = idi48gpio->irq_mask[boundary]; |
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for_each_set_bit(bit_num, &irq_mask, 8) { |
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gpio = bit_num + boundary * 8; |
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generic_handle_domain_irq(chip->irq.domain, |
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gpio); |
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} |
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} |
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spin_unlock(&idi48gpio->ack_lock); |
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return IRQ_HANDLED; |
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} |
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#define IDI48_NGPIO 48 |
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static const char *idi48_names[IDI48_NGPIO] = { |
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"Bit 0 A", "Bit 1 A", "Bit 2 A", "Bit 3 A", "Bit 4 A", "Bit 5 A", |
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"Bit 6 A", "Bit 7 A", "Bit 8 A", "Bit 9 A", "Bit 10 A", "Bit 11 A", |
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"Bit 12 A", "Bit 13 A", "Bit 14 A", "Bit 15 A", "Bit 16 A", "Bit 17 A", |
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"Bit 18 A", "Bit 19 A", "Bit 20 A", "Bit 21 A", "Bit 22 A", "Bit 23 A", |
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"Bit 0 B", "Bit 1 B", "Bit 2 B", "Bit 3 B", "Bit 4 B", "Bit 5 B", |
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"Bit 6 B", "Bit 7 B", "Bit 8 B", "Bit 9 B", "Bit 10 B", "Bit 11 B", |
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"Bit 12 B", "Bit 13 B", "Bit 14 B", "Bit 15 B", "Bit 16 B", "Bit 17 B", |
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"Bit 18 B", "Bit 19 B", "Bit 20 B", "Bit 21 B", "Bit 22 B", "Bit 23 B" |
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}; |
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static int idi_48_irq_init_hw(struct gpio_chip *gc) |
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{ |
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struct idi_48_gpio *const idi48gpio = gpiochip_get_data(gc); |
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/* Disable IRQ by default */ |
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outb(0, idi48gpio->base + 7); |
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inb(idi48gpio->base + 7); |
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return 0; |
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} |
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static int idi_48_probe(struct device *dev, unsigned int id) |
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{ |
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struct idi_48_gpio *idi48gpio; |
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const char *const name = dev_name(dev); |
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struct gpio_irq_chip *girq; |
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int err; |
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idi48gpio = devm_kzalloc(dev, sizeof(*idi48gpio), GFP_KERNEL); |
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if (!idi48gpio) |
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return -ENOMEM; |
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if (!devm_request_region(dev, base[id], IDI_48_EXTENT, name)) { |
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dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n", |
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base[id], base[id] + IDI_48_EXTENT); |
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return -EBUSY; |
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} |
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idi48gpio->chip.label = name; |
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idi48gpio->chip.parent = dev; |
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idi48gpio->chip.owner = THIS_MODULE; |
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idi48gpio->chip.base = -1; |
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idi48gpio->chip.ngpio = IDI48_NGPIO; |
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idi48gpio->chip.names = idi48_names; |
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idi48gpio->chip.get_direction = idi_48_gpio_get_direction; |
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idi48gpio->chip.direction_input = idi_48_gpio_direction_input; |
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idi48gpio->chip.get = idi_48_gpio_get; |
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idi48gpio->chip.get_multiple = idi_48_gpio_get_multiple; |
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idi48gpio->base = base[id]; |
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girq = &idi48gpio->chip.irq; |
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girq->chip = &idi_48_irqchip; |
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/* This will let us handle the parent IRQ in the driver */ |
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girq->parent_handler = NULL; |
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girq->num_parents = 0; |
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girq->parents = NULL; |
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girq->default_type = IRQ_TYPE_NONE; |
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girq->handler = handle_edge_irq; |
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girq->init_hw = idi_48_irq_init_hw; |
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raw_spin_lock_init(&idi48gpio->lock); |
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spin_lock_init(&idi48gpio->ack_lock); |
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err = devm_gpiochip_add_data(dev, &idi48gpio->chip, idi48gpio); |
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if (err) { |
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dev_err(dev, "GPIO registering failed (%d)\n", err); |
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return err; |
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} |
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err = devm_request_irq(dev, irq[id], idi_48_irq_handler, IRQF_SHARED, |
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name, idi48gpio); |
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if (err) { |
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dev_err(dev, "IRQ handler registering failed (%d)\n", err); |
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return err; |
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} |
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return 0; |
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} |
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static struct isa_driver idi_48_driver = { |
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.probe = idi_48_probe, |
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.driver = { |
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.name = "104-idi-48" |
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}, |
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}; |
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module_isa_driver(idi_48_driver, num_idi_48); |
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MODULE_AUTHOR("William Breathitt Gray <[email protected]>"); |
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MODULE_DESCRIPTION("ACCES 104-IDI-48 GPIO driver"); |
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MODULE_LICENSE("GPL v2");
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