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83 lines
2.0 KiB
83 lines
2.0 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (C) 2019-2021 Xilinx, Inc. |
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*/ |
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#include <linux/dma-mapping.h> |
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#include <linux/fpga/fpga-mgr.h> |
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#include <linux/io.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/of_address.h> |
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#include <linux/string.h> |
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#include <linux/firmware/xlnx-zynqmp.h> |
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static int versal_fpga_ops_write_init(struct fpga_manager *mgr, |
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struct fpga_image_info *info, |
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const char *buf, size_t size) |
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{ |
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return 0; |
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} |
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static int versal_fpga_ops_write(struct fpga_manager *mgr, |
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const char *buf, size_t size) |
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{ |
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dma_addr_t dma_addr = 0; |
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char *kbuf; |
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int ret; |
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kbuf = dma_alloc_coherent(mgr->dev.parent, size, &dma_addr, GFP_KERNEL); |
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if (!kbuf) |
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return -ENOMEM; |
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memcpy(kbuf, buf, size); |
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ret = zynqmp_pm_load_pdi(PDI_SRC_DDR, dma_addr); |
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dma_free_coherent(mgr->dev.parent, size, kbuf, dma_addr); |
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return ret; |
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} |
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static const struct fpga_manager_ops versal_fpga_ops = { |
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.write_init = versal_fpga_ops_write_init, |
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.write = versal_fpga_ops_write, |
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}; |
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static int versal_fpga_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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struct fpga_manager *mgr; |
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int ret; |
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ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); |
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if (ret < 0) { |
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dev_err(dev, "no usable DMA configuration\n"); |
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return ret; |
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} |
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mgr = devm_fpga_mgr_create(dev, "Xilinx Versal FPGA Manager", |
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&versal_fpga_ops, NULL); |
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if (!mgr) |
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return -ENOMEM; |
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return devm_fpga_mgr_register(dev, mgr); |
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} |
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static const struct of_device_id versal_fpga_of_match[] = { |
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{ .compatible = "xlnx,versal-fpga", }, |
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{}, |
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}; |
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MODULE_DEVICE_TABLE(of, versal_fpga_of_match); |
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static struct platform_driver versal_fpga_driver = { |
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.probe = versal_fpga_probe, |
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.driver = { |
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.name = "versal_fpga_manager", |
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.of_match_table = of_match_ptr(versal_fpga_of_match), |
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}, |
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}; |
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module_platform_driver(versal_fpga_driver); |
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MODULE_AUTHOR("Nava kishore Manne <[email protected]>"); |
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MODULE_AUTHOR("Appana Durga Kedareswara rao <[email protected]>"); |
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MODULE_DESCRIPTION("Xilinx Versal FPGA Manager"); |
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MODULE_LICENSE("GPL");
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