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406 lines
12 KiB
406 lines
12 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* |
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* K3 SA2UL crypto accelerator driver |
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* |
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* Copyright (C) 2018-2020 Texas Instruments Incorporated - http://www.ti.com |
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* |
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* Authors: Keerthy |
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* Vitaly Andrianov |
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* Tero Kristo |
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*/ |
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#ifndef _K3_SA2UL_ |
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#define _K3_SA2UL_ |
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#include <crypto/aes.h> |
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#include <crypto/sha1.h> |
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#include <crypto/sha2.h> |
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#define SA_ENGINE_ENABLE_CONTROL 0x1000 |
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struct sa_tfm_ctx; |
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/* |
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* SA_ENGINE_ENABLE_CONTROL register bits |
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*/ |
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#define SA_EEC_ENCSS_EN 0x00000001 |
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#define SA_EEC_AUTHSS_EN 0x00000002 |
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#define SA_EEC_TRNG_EN 0x00000008 |
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#define SA_EEC_PKA_EN 0x00000010 |
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#define SA_EEC_CTXCACH_EN 0x00000080 |
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#define SA_EEC_CPPI_PORT_IN_EN 0x00000200 |
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#define SA_EEC_CPPI_PORT_OUT_EN 0x00000800 |
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/* |
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* Encoding used to identify the typo of crypto operation |
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* performed on the packet when the packet is returned |
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* by SA |
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*/ |
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#define SA_REQ_SUBTYPE_ENC 0x0001 |
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#define SA_REQ_SUBTYPE_DEC 0x0002 |
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#define SA_REQ_SUBTYPE_SHIFT 16 |
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#define SA_REQ_SUBTYPE_MASK 0xffff |
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/* Number of 32 bit words in EPIB */ |
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#define SA_DMA_NUM_EPIB_WORDS 4 |
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/* Number of 32 bit words in PS data */ |
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#define SA_DMA_NUM_PS_WORDS 16 |
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#define NKEY_SZ 3 |
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#define MCI_SZ 27 |
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/* |
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* Maximum number of simultaeneous security contexts |
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* supported by the driver |
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*/ |
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#define SA_MAX_NUM_CTX 512 |
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/* |
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* Assumption: CTX size is multiple of 32 |
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*/ |
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#define SA_CTX_SIZE_TO_DMA_SIZE(ctx_sz) \ |
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((ctx_sz) ? ((ctx_sz) / 32 - 1) : 0) |
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#define SA_CTX_ENC_KEY_OFFSET 32 |
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#define SA_CTX_ENC_AUX1_OFFSET 64 |
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#define SA_CTX_ENC_AUX2_OFFSET 96 |
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#define SA_CTX_ENC_AUX3_OFFSET 112 |
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#define SA_CTX_ENC_AUX4_OFFSET 128 |
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/* Next Engine Select code in CP_ACE */ |
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#define SA_ENG_ID_EM1 2 /* Enc/Dec engine with AES/DEC core */ |
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#define SA_ENG_ID_EM2 3 /* Encryption/Decryption enginefor pass 2 */ |
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#define SA_ENG_ID_AM1 4 /* Auth. engine with SHA1/MD5/SHA2 core */ |
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#define SA_ENG_ID_AM2 5 /* Authentication engine for pass 2 */ |
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#define SA_ENG_ID_OUTPORT2 20 /* Egress module 2 */ |
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/* |
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* Command Label Definitions |
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*/ |
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#define SA_CMDL_OFFSET_NESC 0 /* Next Engine Select Code */ |
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#define SA_CMDL_OFFSET_LABEL_LEN 1 /* Engine Command Label Length */ |
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/* 16-bit Length of Data to be processed */ |
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#define SA_CMDL_OFFSET_DATA_LEN 2 |
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#define SA_CMDL_OFFSET_DATA_OFFSET 4 /* Stat Data Offset */ |
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#define SA_CMDL_OFFSET_OPTION_CTRL1 5 /* Option Control Byte 1 */ |
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#define SA_CMDL_OFFSET_OPTION_CTRL2 6 /* Option Control Byte 2 */ |
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#define SA_CMDL_OFFSET_OPTION_CTRL3 7 /* Option Control Byte 3 */ |
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#define SA_CMDL_OFFSET_OPTION_BYTE 8 |
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#define SA_CMDL_HEADER_SIZE_BYTES 8 |
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#define SA_CMDL_OPTION_BYTES_MAX_SIZE 72 |
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#define SA_CMDL_MAX_SIZE_BYTES (SA_CMDL_HEADER_SIZE_BYTES + \ |
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SA_CMDL_OPTION_BYTES_MAX_SIZE) |
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/* SWINFO word-0 flags */ |
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#define SA_SW_INFO_FLAG_EVICT 0x0001 |
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#define SA_SW_INFO_FLAG_TEAR 0x0002 |
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#define SA_SW_INFO_FLAG_NOPD 0x0004 |
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/* |
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* This type represents the various packet types to be processed |
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* by the PHP engine in SA. |
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* It is used to identify the corresponding PHP processing function. |
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*/ |
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#define SA_CTX_PE_PKT_TYPE_3GPP_AIR 0 /* 3GPP Air Cipher */ |
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#define SA_CTX_PE_PKT_TYPE_SRTP 1 /* SRTP */ |
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#define SA_CTX_PE_PKT_TYPE_IPSEC_AH 2 /* IPSec Authentication Header */ |
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/* IPSec Encapsulating Security Payload */ |
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#define SA_CTX_PE_PKT_TYPE_IPSEC_ESP 3 |
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/* Indicates that it is in data mode, It may not be used by PHP */ |
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#define SA_CTX_PE_PKT_TYPE_NONE 4 |
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#define SA_CTX_ENC_TYPE1_SZ 64 /* Encryption SC with Key only */ |
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#define SA_CTX_ENC_TYPE2_SZ 96 /* Encryption SC with Key and Aux1 */ |
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#define SA_CTX_AUTH_TYPE1_SZ 64 /* Auth SC with Key only */ |
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#define SA_CTX_AUTH_TYPE2_SZ 96 /* Auth SC with Key and Aux1 */ |
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/* Size of security context for PHP engine */ |
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#define SA_CTX_PHP_PE_CTX_SZ 64 |
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#define SA_CTX_MAX_SZ (64 + SA_CTX_ENC_TYPE2_SZ + SA_CTX_AUTH_TYPE2_SZ) |
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/* |
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* Encoding of F/E control in SCCTL |
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* Bit 0-1: Fetch PHP Bytes |
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* Bit 2-3: Fetch Encryption/Air Ciphering Bytes |
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* Bit 4-5: Fetch Authentication Bytes or Encr pass 2 |
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* Bit 6-7: Evict PHP Bytes |
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* |
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* where 00 = 0 bytes |
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* 01 = 64 bytes |
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* 10 = 96 bytes |
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* 11 = 128 bytes |
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*/ |
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#define SA_CTX_DMA_SIZE_0 0 |
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#define SA_CTX_DMA_SIZE_64 1 |
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#define SA_CTX_DMA_SIZE_96 2 |
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#define SA_CTX_DMA_SIZE_128 3 |
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/* |
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* Byte offset of the owner word in SCCTL |
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* in the security context |
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*/ |
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#define SA_CTX_SCCTL_OWNER_OFFSET 0 |
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#define SA_CTX_ENC_KEY_OFFSET 32 |
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#define SA_CTX_ENC_AUX1_OFFSET 64 |
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#define SA_CTX_ENC_AUX2_OFFSET 96 |
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#define SA_CTX_ENC_AUX3_OFFSET 112 |
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#define SA_CTX_ENC_AUX4_OFFSET 128 |
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#define SA_SCCTL_FE_AUTH_ENC 0x65 |
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#define SA_SCCTL_FE_ENC 0x8D |
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#define SA_ALIGN_MASK (sizeof(u32) - 1) |
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#define SA_ALIGNED __aligned(32) |
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#define SA_AUTH_SW_CTRL_MD5 1 |
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#define SA_AUTH_SW_CTRL_SHA1 2 |
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#define SA_AUTH_SW_CTRL_SHA224 3 |
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#define SA_AUTH_SW_CTRL_SHA256 4 |
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#define SA_AUTH_SW_CTRL_SHA384 5 |
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#define SA_AUTH_SW_CTRL_SHA512 6 |
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/* SA2UL can only handle maximum data size of 64KB */ |
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#define SA_MAX_DATA_SZ U16_MAX |
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/* |
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* SA2UL can provide unpredictable results with packet sizes that fall |
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* the following range, so avoid using it. |
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*/ |
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#define SA_UNSAFE_DATA_SZ_MIN 240 |
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#define SA_UNSAFE_DATA_SZ_MAX 256 |
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struct sa_match_data; |
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/** |
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* struct sa_crypto_data - Crypto driver instance data |
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* @base: Base address of the register space |
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* @soc_data: Pointer to SoC specific data |
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* @pdev: Platform device pointer |
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* @sc_pool: security context pool |
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* @dev: Device pointer |
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* @scid_lock: secure context ID lock |
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* @sc_id_start: starting index for SC ID |
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* @sc_id_end: Ending index for SC ID |
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* @sc_id: Security Context ID |
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* @ctx_bm: Bitmap to keep track of Security context ID's |
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* @ctx: SA tfm context pointer |
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* @dma_rx1: Pointer to DMA rx channel for sizes < 256 Bytes |
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* @dma_rx2: Pointer to DMA rx channel for sizes > 256 Bytes |
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* @dma_tx: Pointer to DMA TX channel |
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*/ |
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struct sa_crypto_data { |
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void __iomem *base; |
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const struct sa_match_data *match_data; |
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struct platform_device *pdev; |
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struct dma_pool *sc_pool; |
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struct device *dev; |
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spinlock_t scid_lock; /* lock for SC-ID allocation */ |
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/* Security context data */ |
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u16 sc_id_start; |
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u16 sc_id_end; |
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u16 sc_id; |
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unsigned long ctx_bm[DIV_ROUND_UP(SA_MAX_NUM_CTX, |
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BITS_PER_LONG)]; |
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struct sa_tfm_ctx *ctx; |
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struct dma_chan *dma_rx1; |
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struct dma_chan *dma_rx2; |
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struct dma_chan *dma_tx; |
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}; |
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/** |
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* struct sa_cmdl_param_info: Command label parameters info |
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* @index: Index of the parameter in the command label format |
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* @offset: the offset of the parameter |
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* @size: Size of the parameter |
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*/ |
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struct sa_cmdl_param_info { |
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u16 index; |
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u16 offset; |
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u16 size; |
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}; |
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/* Maximum length of Auxiliary data in 32bit words */ |
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#define SA_MAX_AUX_DATA_WORDS 8 |
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/** |
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* struct sa_cmdl_upd_info: Command label updation info |
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* @flags: flags in command label |
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* @submode: Encryption submodes |
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* @enc_size: Size of first pass encryption size |
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* @enc_size2: Size of second pass encryption size |
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* @enc_offset: Encryption payload offset in the packet |
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* @enc_iv: Encryption initialization vector for pass2 |
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* @enc_iv2: Encryption initialization vector for pass2 |
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* @aad: Associated data |
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* @payload: Payload info |
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* @auth_size: Authentication size for pass 1 |
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* @auth_size2: Authentication size for pass 2 |
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* @auth_offset: Authentication payload offset |
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* @auth_iv: Authentication initialization vector |
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* @aux_key_info: Authentication aux key information |
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* @aux_key: Aux key for authentication |
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*/ |
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struct sa_cmdl_upd_info { |
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u16 flags; |
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u16 submode; |
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struct sa_cmdl_param_info enc_size; |
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struct sa_cmdl_param_info enc_size2; |
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struct sa_cmdl_param_info enc_offset; |
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struct sa_cmdl_param_info enc_iv; |
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struct sa_cmdl_param_info enc_iv2; |
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struct sa_cmdl_param_info aad; |
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struct sa_cmdl_param_info payload; |
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struct sa_cmdl_param_info auth_size; |
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struct sa_cmdl_param_info auth_size2; |
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struct sa_cmdl_param_info auth_offset; |
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struct sa_cmdl_param_info auth_iv; |
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struct sa_cmdl_param_info aux_key_info; |
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u32 aux_key[SA_MAX_AUX_DATA_WORDS]; |
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}; |
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/* |
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* Number of 32bit words appended after the command label |
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* in PSDATA to identify the crypto request context. |
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* word-0: Request type |
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* word-1: pointer to request |
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*/ |
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#define SA_PSDATA_CTX_WORDS 4 |
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/* Maximum size of Command label in 32 words */ |
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#define SA_MAX_CMDL_WORDS (SA_DMA_NUM_PS_WORDS - SA_PSDATA_CTX_WORDS) |
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/** |
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* struct sa_ctx_info: SA context information |
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* @sc: Pointer to security context |
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* @sc_phys: Security context physical address that is passed on to SA2UL |
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* @sc_id: Security context ID |
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* @cmdl_size: Command label size |
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* @cmdl: Command label for a particular iteration |
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* @cmdl_upd_info: structure holding command label updation info |
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* @epib: Extended protocol information block words |
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*/ |
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struct sa_ctx_info { |
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u8 *sc; |
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dma_addr_t sc_phys; |
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u16 sc_id; |
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u16 cmdl_size; |
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u32 cmdl[SA_MAX_CMDL_WORDS]; |
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struct sa_cmdl_upd_info cmdl_upd_info; |
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/* Store Auxiliary data such as K2/K3 subkeys in AES-XCBC */ |
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u32 epib[SA_DMA_NUM_EPIB_WORDS]; |
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}; |
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/** |
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* struct sa_tfm_ctx: TFM context structure |
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* @dev_data: struct sa_crypto_data pointer |
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* @enc: struct sa_ctx_info for encryption |
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* @dec: struct sa_ctx_info for decryption |
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* @keylen: encrption/decryption keylength |
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* @iv_idx: Initialization vector index |
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* @key: encryption key |
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* @fallback: SW fallback algorithm |
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*/ |
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struct sa_tfm_ctx { |
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struct sa_crypto_data *dev_data; |
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struct sa_ctx_info enc; |
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struct sa_ctx_info dec; |
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struct sa_ctx_info auth; |
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int keylen; |
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int iv_idx; |
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u32 key[AES_KEYSIZE_256 / sizeof(u32)]; |
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u8 authkey[SHA512_BLOCK_SIZE]; |
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struct crypto_shash *shash; |
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/* for fallback */ |
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union { |
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struct crypto_skcipher *skcipher; |
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struct crypto_ahash *ahash; |
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struct crypto_aead *aead; |
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} fallback; |
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}; |
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/** |
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* struct sa_sha_req_ctx: Structure used for sha request |
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* @dev_data: struct sa_crypto_data pointer |
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* @cmdl: Complete command label with psdata and epib included |
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* @fallback_req: SW fallback request container |
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*/ |
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struct sa_sha_req_ctx { |
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struct sa_crypto_data *dev_data; |
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u32 cmdl[SA_MAX_CMDL_WORDS + SA_PSDATA_CTX_WORDS]; |
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struct ahash_request fallback_req; |
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}; |
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enum sa_submode { |
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SA_MODE_GEN = 0, |
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SA_MODE_CCM, |
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SA_MODE_GCM, |
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SA_MODE_GMAC |
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}; |
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/* Encryption algorithms */ |
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enum sa_ealg_id { |
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SA_EALG_ID_NONE = 0, /* No encryption */ |
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SA_EALG_ID_NULL, /* NULL encryption */ |
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SA_EALG_ID_AES_CTR, /* AES Counter mode */ |
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SA_EALG_ID_AES_F8, /* AES F8 mode */ |
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SA_EALG_ID_AES_CBC, /* AES CBC mode */ |
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SA_EALG_ID_DES_CBC, /* DES CBC mode */ |
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SA_EALG_ID_3DES_CBC, /* 3DES CBC mode */ |
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SA_EALG_ID_CCM, /* Counter with CBC-MAC mode */ |
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SA_EALG_ID_GCM, /* Galois Counter mode */ |
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SA_EALG_ID_AES_ECB, |
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SA_EALG_ID_LAST |
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}; |
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/* Authentication algorithms */ |
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enum sa_aalg_id { |
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SA_AALG_ID_NONE = 0, /* No Authentication */ |
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SA_AALG_ID_NULL = SA_EALG_ID_LAST, /* NULL Authentication */ |
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SA_AALG_ID_MD5, /* MD5 mode */ |
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SA_AALG_ID_SHA1, /* SHA1 mode */ |
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SA_AALG_ID_SHA2_224, /* 224-bit SHA2 mode */ |
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SA_AALG_ID_SHA2_256, /* 256-bit SHA2 mode */ |
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SA_AALG_ID_SHA2_512, /* 512-bit SHA2 mode */ |
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SA_AALG_ID_HMAC_MD5, /* HMAC with MD5 mode */ |
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SA_AALG_ID_HMAC_SHA1, /* HMAC with SHA1 mode */ |
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SA_AALG_ID_HMAC_SHA2_224, /* HMAC with 224-bit SHA2 mode */ |
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SA_AALG_ID_HMAC_SHA2_256, /* HMAC with 256-bit SHA2 mode */ |
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SA_AALG_ID_GMAC, /* Galois Message Auth. Code mode */ |
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SA_AALG_ID_CMAC, /* Cipher-based Mes. Auth. Code mode */ |
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SA_AALG_ID_CBC_MAC, /* Cipher Block Chaining */ |
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SA_AALG_ID_AES_XCBC /* AES Extended Cipher Block Chaining */ |
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}; |
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/* |
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* Mode control engine algorithms used to index the |
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* mode control instruction tables |
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*/ |
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enum sa_eng_algo_id { |
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SA_ENG_ALGO_ECB = 0, |
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SA_ENG_ALGO_CBC, |
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SA_ENG_ALGO_CFB, |
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SA_ENG_ALGO_OFB, |
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SA_ENG_ALGO_CTR, |
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SA_ENG_ALGO_F8, |
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SA_ENG_ALGO_F8F9, |
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SA_ENG_ALGO_GCM, |
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SA_ENG_ALGO_GMAC, |
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SA_ENG_ALGO_CCM, |
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SA_ENG_ALGO_CMAC, |
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SA_ENG_ALGO_CBCMAC, |
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SA_NUM_ENG_ALGOS |
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}; |
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/** |
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* struct sa_eng_info: Security accelerator engine info |
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* @eng_id: Engine ID |
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* @sc_size: security context size |
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*/ |
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struct sa_eng_info { |
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u8 eng_id; |
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u16 sc_size; |
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}; |
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#endif /* _K3_SA2UL_ */
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