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253 lines
5.8 KiB
253 lines
5.8 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (C) 2012 STMicroelectronics Limited |
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* |
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* Authors: Francesco Virlinzi <[email protected]> |
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* Alexandre Torgue <[email protected]> |
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*/ |
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#include <linux/init.h> |
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#include <linux/module.h> |
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#include <linux/export.h> |
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#include <linux/platform_device.h> |
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#include <linux/clk.h> |
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#include <linux/of.h> |
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#include <linux/ahci_platform.h> |
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#include <linux/libata.h> |
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#include <linux/reset.h> |
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#include <linux/io.h> |
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#include <linux/dma-mapping.h> |
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#include "ahci.h" |
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#define DRV_NAME "st_ahci" |
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#define ST_AHCI_OOBR 0xbc |
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#define ST_AHCI_OOBR_WE BIT(31) |
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#define ST_AHCI_OOBR_CWMIN_SHIFT 24 |
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#define ST_AHCI_OOBR_CWMAX_SHIFT 16 |
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#define ST_AHCI_OOBR_CIMIN_SHIFT 8 |
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#define ST_AHCI_OOBR_CIMAX_SHIFT 0 |
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struct st_ahci_drv_data { |
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struct platform_device *ahci; |
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struct reset_control *pwr; |
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struct reset_control *sw_rst; |
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struct reset_control *pwr_rst; |
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}; |
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static void st_ahci_configure_oob(void __iomem *mmio) |
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{ |
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unsigned long old_val, new_val; |
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new_val = (0x02 << ST_AHCI_OOBR_CWMIN_SHIFT) | |
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(0x04 << ST_AHCI_OOBR_CWMAX_SHIFT) | |
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(0x08 << ST_AHCI_OOBR_CIMIN_SHIFT) | |
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(0x0C << ST_AHCI_OOBR_CIMAX_SHIFT); |
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old_val = readl(mmio + ST_AHCI_OOBR); |
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writel(old_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR); |
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writel(new_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR); |
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writel(new_val, mmio + ST_AHCI_OOBR); |
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} |
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static int st_ahci_deassert_resets(struct ahci_host_priv *hpriv, |
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struct device *dev) |
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{ |
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struct st_ahci_drv_data *drv_data = hpriv->plat_data; |
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int err; |
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if (drv_data->pwr) { |
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err = reset_control_deassert(drv_data->pwr); |
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if (err) { |
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dev_err(dev, "unable to bring out of pwrdwn\n"); |
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return err; |
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} |
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} |
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if (drv_data->sw_rst) { |
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err = reset_control_deassert(drv_data->sw_rst); |
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if (err) { |
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dev_err(dev, "unable to bring out of sw-rst\n"); |
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return err; |
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} |
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} |
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if (drv_data->pwr_rst) { |
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err = reset_control_deassert(drv_data->pwr_rst); |
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if (err) { |
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dev_err(dev, "unable to bring out of pwr-rst\n"); |
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return err; |
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} |
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} |
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return 0; |
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} |
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static void st_ahci_host_stop(struct ata_host *host) |
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{ |
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struct ahci_host_priv *hpriv = host->private_data; |
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struct st_ahci_drv_data *drv_data = hpriv->plat_data; |
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struct device *dev = host->dev; |
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int err; |
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if (drv_data->pwr) { |
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err = reset_control_assert(drv_data->pwr); |
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if (err) |
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dev_err(dev, "unable to pwrdwn\n"); |
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} |
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ahci_platform_disable_resources(hpriv); |
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} |
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static int st_ahci_probe_resets(struct ahci_host_priv *hpriv, |
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struct device *dev) |
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{ |
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struct st_ahci_drv_data *drv_data = hpriv->plat_data; |
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drv_data->pwr = devm_reset_control_get(dev, "pwr-dwn"); |
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if (IS_ERR(drv_data->pwr)) { |
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dev_info(dev, "power reset control not defined\n"); |
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drv_data->pwr = NULL; |
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} |
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drv_data->sw_rst = devm_reset_control_get(dev, "sw-rst"); |
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if (IS_ERR(drv_data->sw_rst)) { |
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dev_info(dev, "soft reset control not defined\n"); |
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drv_data->sw_rst = NULL; |
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} |
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drv_data->pwr_rst = devm_reset_control_get(dev, "pwr-rst"); |
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if (IS_ERR(drv_data->pwr_rst)) { |
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dev_dbg(dev, "power soft reset control not defined\n"); |
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drv_data->pwr_rst = NULL; |
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} |
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return st_ahci_deassert_resets(hpriv, dev); |
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} |
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static struct ata_port_operations st_ahci_port_ops = { |
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.inherits = &ahci_platform_ops, |
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.host_stop = st_ahci_host_stop, |
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}; |
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static const struct ata_port_info st_ahci_port_info = { |
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.flags = AHCI_FLAG_COMMON, |
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.pio_mask = ATA_PIO4, |
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.udma_mask = ATA_UDMA6, |
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.port_ops = &st_ahci_port_ops, |
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}; |
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static struct scsi_host_template ahci_platform_sht = { |
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AHCI_SHT(DRV_NAME), |
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}; |
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static int st_ahci_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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struct st_ahci_drv_data *drv_data; |
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struct ahci_host_priv *hpriv; |
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int err; |
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drv_data = devm_kzalloc(&pdev->dev, sizeof(*drv_data), GFP_KERNEL); |
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if (!drv_data) |
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return -ENOMEM; |
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hpriv = ahci_platform_get_resources(pdev, 0); |
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if (IS_ERR(hpriv)) |
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return PTR_ERR(hpriv); |
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hpriv->plat_data = drv_data; |
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err = st_ahci_probe_resets(hpriv, &pdev->dev); |
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if (err) |
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return err; |
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err = ahci_platform_enable_resources(hpriv); |
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if (err) |
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return err; |
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st_ahci_configure_oob(hpriv->mmio); |
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of_property_read_u32(dev->of_node, |
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"ports-implemented", &hpriv->force_port_map); |
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err = ahci_platform_init_host(pdev, hpriv, &st_ahci_port_info, |
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&ahci_platform_sht); |
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if (err) { |
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ahci_platform_disable_resources(hpriv); |
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return err; |
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} |
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return 0; |
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} |
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#ifdef CONFIG_PM_SLEEP |
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static int st_ahci_suspend(struct device *dev) |
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{ |
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struct ata_host *host = dev_get_drvdata(dev); |
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struct ahci_host_priv *hpriv = host->private_data; |
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struct st_ahci_drv_data *drv_data = hpriv->plat_data; |
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int err; |
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err = ahci_platform_suspend_host(dev); |
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if (err) |
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return err; |
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if (drv_data->pwr) { |
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err = reset_control_assert(drv_data->pwr); |
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if (err) { |
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dev_err(dev, "unable to pwrdwn"); |
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return err; |
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} |
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} |
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ahci_platform_disable_resources(hpriv); |
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return 0; |
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} |
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static int st_ahci_resume(struct device *dev) |
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{ |
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struct ata_host *host = dev_get_drvdata(dev); |
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struct ahci_host_priv *hpriv = host->private_data; |
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int err; |
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err = ahci_platform_enable_resources(hpriv); |
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if (err) |
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return err; |
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err = st_ahci_deassert_resets(hpriv, dev); |
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if (err) { |
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ahci_platform_disable_resources(hpriv); |
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return err; |
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} |
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st_ahci_configure_oob(hpriv->mmio); |
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return ahci_platform_resume_host(dev); |
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} |
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#endif |
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static SIMPLE_DEV_PM_OPS(st_ahci_pm_ops, st_ahci_suspend, st_ahci_resume); |
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static const struct of_device_id st_ahci_match[] = { |
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{ .compatible = "st,ahci", }, |
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{}, |
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}; |
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MODULE_DEVICE_TABLE(of, st_ahci_match); |
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static struct platform_driver st_ahci_driver = { |
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.driver = { |
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.name = DRV_NAME, |
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.pm = &st_ahci_pm_ops, |
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.of_match_table = of_match_ptr(st_ahci_match), |
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}, |
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.probe = st_ahci_probe, |
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.remove = ata_platform_remove_one, |
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}; |
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module_platform_driver(st_ahci_driver); |
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MODULE_AUTHOR("Alexandre Torgue <[email protected]>"); |
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MODULE_AUTHOR("Francesco Virlinzi <[email protected]>"); |
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MODULE_DESCRIPTION("STMicroelectronics SATA AHCI Driver"); |
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MODULE_LICENSE("GPL v2");
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