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261 lines
6.7 KiB
261 lines
6.7 KiB
/* |
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* AHCI glue platform driver for Marvell EBU SOCs |
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* |
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* Copyright (C) 2014 Marvell |
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* |
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* Thomas Petazzoni <[email protected]> |
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* Marcin Wojtas <[email protected]> |
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* |
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* This file is licensed under the terms of the GNU General Public |
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* License version 2. This program is licensed "as is" without any |
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* warranty of any kind, whether express or implied. |
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*/ |
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#include <linux/ahci_platform.h> |
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#include <linux/kernel.h> |
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#include <linux/mbus.h> |
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#include <linux/module.h> |
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#include <linux/of_device.h> |
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#include <linux/platform_device.h> |
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#include "ahci.h" |
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#define DRV_NAME "ahci-mvebu" |
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#define AHCI_VENDOR_SPECIFIC_0_ADDR 0xa0 |
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#define AHCI_VENDOR_SPECIFIC_0_DATA 0xa4 |
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#define AHCI_WINDOW_CTRL(win) (0x60 + ((win) << 4)) |
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#define AHCI_WINDOW_BASE(win) (0x64 + ((win) << 4)) |
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#define AHCI_WINDOW_SIZE(win) (0x68 + ((win) << 4)) |
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struct ahci_mvebu_plat_data { |
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int (*plat_config)(struct ahci_host_priv *hpriv); |
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unsigned int flags; |
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}; |
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static void ahci_mvebu_mbus_config(struct ahci_host_priv *hpriv, |
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const struct mbus_dram_target_info *dram) |
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{ |
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int i; |
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for (i = 0; i < 4; i++) { |
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writel(0, hpriv->mmio + AHCI_WINDOW_CTRL(i)); |
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writel(0, hpriv->mmio + AHCI_WINDOW_BASE(i)); |
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writel(0, hpriv->mmio + AHCI_WINDOW_SIZE(i)); |
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} |
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for (i = 0; i < dram->num_cs; i++) { |
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const struct mbus_dram_window *cs = dram->cs + i; |
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writel((cs->mbus_attr << 8) | |
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(dram->mbus_dram_target_id << 4) | 1, |
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hpriv->mmio + AHCI_WINDOW_CTRL(i)); |
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writel(cs->base >> 16, hpriv->mmio + AHCI_WINDOW_BASE(i)); |
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writel(((cs->size - 1) & 0xffff0000), |
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hpriv->mmio + AHCI_WINDOW_SIZE(i)); |
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} |
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} |
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static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv) |
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{ |
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/* |
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* Enable the regret bit to allow the SATA unit to regret a |
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* request that didn't receive an acknowlegde and avoid a |
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* deadlock |
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*/ |
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writel(0x4, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_ADDR); |
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writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA); |
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} |
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static int ahci_mvebu_armada_380_config(struct ahci_host_priv *hpriv) |
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{ |
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const struct mbus_dram_target_info *dram; |
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int rc = 0; |
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dram = mv_mbus_dram_info(); |
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if (dram) |
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ahci_mvebu_mbus_config(hpriv, dram); |
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else |
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rc = -ENODEV; |
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ahci_mvebu_regret_option(hpriv); |
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return rc; |
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} |
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static int ahci_mvebu_armada_3700_config(struct ahci_host_priv *hpriv) |
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{ |
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u32 reg; |
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writel(0, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_ADDR); |
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reg = readl(hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA); |
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reg |= BIT(6); |
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writel(reg, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA); |
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return 0; |
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} |
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/** |
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* ahci_mvebu_stop_engine |
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* |
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* @ap: Target ata port |
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* |
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* Errata Ref#226 - SATA Disk HOT swap issue when connected through |
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* Port Multiplier in FIS-based Switching mode. |
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* |
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* To avoid the issue, according to design, the bits[11:8, 0] of |
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* register PxFBS are cleared when Port Command and Status (0x18) bit[0] |
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* changes its value from 1 to 0, i.e. falling edge of Port |
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* Command and Status bit[0] sends PULSE that resets PxFBS |
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* bits[11:8; 0]. |
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* |
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* This function is used to override function of "ahci_stop_engine" |
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* from libahci.c by adding the mvebu work around(WA) to save PxFBS |
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* value before the PxCMD ST write of 0, then restore PxFBS value. |
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* |
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* Return: 0 on success; Error code otherwise. |
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*/ |
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static int ahci_mvebu_stop_engine(struct ata_port *ap) |
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{ |
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void __iomem *port_mmio = ahci_port_base(ap); |
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u32 tmp, port_fbs; |
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tmp = readl(port_mmio + PORT_CMD); |
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/* check if the HBA is idle */ |
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if ((tmp & (PORT_CMD_START | PORT_CMD_LIST_ON)) == 0) |
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return 0; |
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/* save the port PxFBS register for later restore */ |
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port_fbs = readl(port_mmio + PORT_FBS); |
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/* setting HBA to idle */ |
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tmp &= ~PORT_CMD_START; |
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writel(tmp, port_mmio + PORT_CMD); |
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/* |
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* bit #15 PxCMD signal doesn't clear PxFBS, |
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* restore the PxFBS register right after clearing the PxCMD ST, |
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* no need to wait for the PxCMD bit #15. |
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*/ |
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writel(port_fbs, port_mmio + PORT_FBS); |
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/* wait for engine to stop. This could be as long as 500 msec */ |
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tmp = ata_wait_register(ap, port_mmio + PORT_CMD, |
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PORT_CMD_LIST_ON, PORT_CMD_LIST_ON, 1, 500); |
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if (tmp & PORT_CMD_LIST_ON) |
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return -EIO; |
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return 0; |
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} |
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#ifdef CONFIG_PM_SLEEP |
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static int ahci_mvebu_suspend(struct platform_device *pdev, pm_message_t state) |
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{ |
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return ahci_platform_suspend_host(&pdev->dev); |
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} |
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static int ahci_mvebu_resume(struct platform_device *pdev) |
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{ |
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struct ata_host *host = platform_get_drvdata(pdev); |
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struct ahci_host_priv *hpriv = host->private_data; |
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const struct ahci_mvebu_plat_data *pdata = hpriv->plat_data; |
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pdata->plat_config(hpriv); |
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return ahci_platform_resume_host(&pdev->dev); |
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} |
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#else |
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#define ahci_mvebu_suspend NULL |
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#define ahci_mvebu_resume NULL |
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#endif |
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static const struct ata_port_info ahci_mvebu_port_info = { |
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.flags = AHCI_FLAG_COMMON, |
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.pio_mask = ATA_PIO4, |
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.udma_mask = ATA_UDMA6, |
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.port_ops = &ahci_platform_ops, |
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}; |
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static struct scsi_host_template ahci_platform_sht = { |
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AHCI_SHT(DRV_NAME), |
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}; |
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static int ahci_mvebu_probe(struct platform_device *pdev) |
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{ |
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const struct ahci_mvebu_plat_data *pdata; |
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struct ahci_host_priv *hpriv; |
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int rc; |
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pdata = of_device_get_match_data(&pdev->dev); |
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if (!pdata) |
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return -EINVAL; |
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hpriv = ahci_platform_get_resources(pdev, 0); |
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if (IS_ERR(hpriv)) |
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return PTR_ERR(hpriv); |
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hpriv->flags |= pdata->flags; |
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hpriv->plat_data = (void *)pdata; |
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rc = ahci_platform_enable_resources(hpriv); |
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if (rc) |
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return rc; |
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hpriv->stop_engine = ahci_mvebu_stop_engine; |
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rc = pdata->plat_config(hpriv); |
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if (rc) |
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goto disable_resources; |
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rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info, |
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&ahci_platform_sht); |
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if (rc) |
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goto disable_resources; |
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return 0; |
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disable_resources: |
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ahci_platform_disable_resources(hpriv); |
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return rc; |
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} |
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static const struct ahci_mvebu_plat_data ahci_mvebu_armada_380_plat_data = { |
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.plat_config = ahci_mvebu_armada_380_config, |
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}; |
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static const struct ahci_mvebu_plat_data ahci_mvebu_armada_3700_plat_data = { |
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.plat_config = ahci_mvebu_armada_3700_config, |
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.flags = AHCI_HFLAG_SUSPEND_PHYS | AHCI_HFLAG_IGN_NOTSUPP_POWER_ON, |
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}; |
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static const struct of_device_id ahci_mvebu_of_match[] = { |
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{ |
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.compatible = "marvell,armada-380-ahci", |
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.data = &ahci_mvebu_armada_380_plat_data, |
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}, |
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{ |
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.compatible = "marvell,armada-3700-ahci", |
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.data = &ahci_mvebu_armada_3700_plat_data, |
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}, |
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{ }, |
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}; |
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MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match); |
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static struct platform_driver ahci_mvebu_driver = { |
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.probe = ahci_mvebu_probe, |
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.remove = ata_platform_remove_one, |
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.suspend = ahci_mvebu_suspend, |
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.resume = ahci_mvebu_resume, |
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.driver = { |
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.name = DRV_NAME, |
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.of_match_table = ahci_mvebu_of_match, |
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}, |
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}; |
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module_platform_driver(ahci_mvebu_driver); |
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MODULE_DESCRIPTION("Marvell EBU AHCI SATA driver"); |
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MODULE_AUTHOR("Thomas Petazzoni <[email protected]>, Marcin Wojtas <[email protected]>"); |
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MODULE_LICENSE("GPL"); |
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MODULE_ALIAS("platform:ahci_mvebu");
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