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196 lines
5.0 KiB
196 lines
5.0 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* DaVinci DM816 AHCI SATA platform driver |
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* |
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* Copyright (C) 2017 BayLibre SAS |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/device.h> |
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#include <linux/pm.h> |
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#include <linux/platform_device.h> |
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#include <linux/libata.h> |
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#include <linux/ahci_platform.h> |
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#include "ahci.h" |
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#define AHCI_DM816_DRV_NAME "ahci-dm816" |
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#define AHCI_DM816_PHY_ENPLL(x) ((x) << 0) |
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#define AHCI_DM816_PHY_MPY(x) ((x) << 1) |
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#define AHCI_DM816_PHY_LOS(x) ((x) << 12) |
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#define AHCI_DM816_PHY_RXCDR(x) ((x) << 13) |
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#define AHCI_DM816_PHY_RXEQ(x) ((x) << 16) |
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#define AHCI_DM816_PHY_TXSWING(x) ((x) << 23) |
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#define AHCI_DM816_P0PHYCR_REG 0x178 |
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#define AHCI_DM816_P1PHYCR_REG 0x1f8 |
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#define AHCI_DM816_PLL_OUT 1500000000LU |
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static const unsigned long pll_mpy_table[] = { |
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400, 500, 600, 800, 825, 1000, 1200, |
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1250, 1500, 1600, 1650, 2000, 2200, 2500 |
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}; |
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static int ahci_dm816_get_mpy_bits(unsigned long refclk_rate) |
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{ |
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unsigned long pll_multiplier; |
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int i; |
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/* |
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* We need to determine the value of the multiplier (MPY) bits. |
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* In order to include the 8.25 multiplier we need to first divide |
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* the refclk rate by 100. |
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*/ |
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pll_multiplier = AHCI_DM816_PLL_OUT / (refclk_rate / 100); |
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for (i = 0; i < ARRAY_SIZE(pll_mpy_table); i++) { |
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if (pll_mpy_table[i] == pll_multiplier) |
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return i; |
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} |
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/* |
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* We should have divided evenly - if not, return an invalid |
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* value. |
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*/ |
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return -1; |
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} |
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static int ahci_dm816_phy_init(struct ahci_host_priv *hpriv, struct device *dev) |
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{ |
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unsigned long refclk_rate; |
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int mpy; |
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u32 val; |
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/* |
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* We should have been supplied two clocks: the functional and |
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* keep-alive clock and the external reference clock. We need the |
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* rate of the latter to calculate the correct value of MPY bits. |
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*/ |
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if (!hpriv->clks[1]) { |
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dev_err(dev, "reference clock not supplied\n"); |
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return -EINVAL; |
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} |
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refclk_rate = clk_get_rate(hpriv->clks[1]); |
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if ((refclk_rate % 100) != 0) { |
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dev_err(dev, "reference clock rate must be divisible by 100\n"); |
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return -EINVAL; |
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} |
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mpy = ahci_dm816_get_mpy_bits(refclk_rate); |
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if (mpy < 0) { |
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dev_err(dev, "can't calculate the MPY bits value\n"); |
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return -EINVAL; |
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} |
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/* Enable the PHY and configure the first HBA port. */ |
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val = AHCI_DM816_PHY_MPY(mpy) | AHCI_DM816_PHY_LOS(1) | |
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AHCI_DM816_PHY_RXCDR(4) | AHCI_DM816_PHY_RXEQ(1) | |
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AHCI_DM816_PHY_TXSWING(3) | AHCI_DM816_PHY_ENPLL(1); |
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writel(val, hpriv->mmio + AHCI_DM816_P0PHYCR_REG); |
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/* Configure the second HBA port. */ |
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val = AHCI_DM816_PHY_LOS(1) | AHCI_DM816_PHY_RXCDR(4) | |
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AHCI_DM816_PHY_RXEQ(1) | AHCI_DM816_PHY_TXSWING(3); |
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writel(val, hpriv->mmio + AHCI_DM816_P1PHYCR_REG); |
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return 0; |
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} |
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static int ahci_dm816_softreset(struct ata_link *link, |
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unsigned int *class, unsigned long deadline) |
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{ |
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int pmp, ret; |
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pmp = sata_srst_pmp(link); |
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/* |
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* There's an issue with the SATA controller on DM816 SoC: if we |
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* enable Port Multiplier support, but the drive is connected directly |
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* to the board, it can't be detected. As a workaround: if PMP is |
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* enabled, we first call ahci_do_softreset() and pass it the result of |
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* sata_srst_pmp(). If this call fails, we retry with pmp = 0. |
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*/ |
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ret = ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready); |
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if (pmp && ret == -EBUSY) |
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return ahci_do_softreset(link, class, 0, |
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deadline, ahci_check_ready); |
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return ret; |
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} |
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static struct ata_port_operations ahci_dm816_port_ops = { |
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.inherits = &ahci_platform_ops, |
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.softreset = ahci_dm816_softreset, |
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}; |
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static const struct ata_port_info ahci_dm816_port_info = { |
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.flags = AHCI_FLAG_COMMON, |
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.pio_mask = ATA_PIO4, |
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.udma_mask = ATA_UDMA6, |
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.port_ops = &ahci_dm816_port_ops, |
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}; |
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static struct scsi_host_template ahci_dm816_platform_sht = { |
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AHCI_SHT(AHCI_DM816_DRV_NAME), |
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}; |
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static int ahci_dm816_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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struct ahci_host_priv *hpriv; |
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int rc; |
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hpriv = ahci_platform_get_resources(pdev, 0); |
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if (IS_ERR(hpriv)) |
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return PTR_ERR(hpriv); |
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rc = ahci_platform_enable_resources(hpriv); |
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if (rc) |
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return rc; |
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rc = ahci_dm816_phy_init(hpriv, dev); |
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if (rc) |
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goto disable_resources; |
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rc = ahci_platform_init_host(pdev, hpriv, |
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&ahci_dm816_port_info, |
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&ahci_dm816_platform_sht); |
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if (rc) |
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goto disable_resources; |
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return 0; |
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disable_resources: |
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ahci_platform_disable_resources(hpriv); |
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return rc; |
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} |
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static SIMPLE_DEV_PM_OPS(ahci_dm816_pm_ops, |
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ahci_platform_suspend, |
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ahci_platform_resume); |
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static const struct of_device_id ahci_dm816_of_match[] = { |
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{ .compatible = "ti,dm816-ahci", }, |
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{ }, |
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}; |
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MODULE_DEVICE_TABLE(of, ahci_dm816_of_match); |
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static struct platform_driver ahci_dm816_driver = { |
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.probe = ahci_dm816_probe, |
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.remove = ata_platform_remove_one, |
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.driver = { |
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.name = AHCI_DM816_DRV_NAME, |
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.of_match_table = ahci_dm816_of_match, |
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.pm = &ahci_dm816_pm_ops, |
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}, |
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}; |
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module_platform_driver(ahci_dm816_driver); |
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MODULE_DESCRIPTION("DaVinci DM816 AHCI SATA platform driver"); |
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MODULE_AUTHOR("Bartosz Golaszewski <[email protected]>"); |
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MODULE_LICENSE("GPL");
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