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392 lines
10 KiB
392 lines
10 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* OpenRISC setup.c |
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* |
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* Linux architectural port borrowing liberally from similar works of |
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* others. All original copyrights apply as per the original source |
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* declaration. |
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* |
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* Modifications for the OpenRISC architecture: |
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* Copyright (C) 2003 Matjaz Breskvar <[email protected]> |
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* Copyright (C) 2010-2011 Jonas Bonn <[email protected]> |
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* |
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* This file handles the architecture-dependent parts of initialization |
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*/ |
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#include <linux/errno.h> |
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#include <linux/sched.h> |
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#include <linux/kernel.h> |
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#include <linux/mm.h> |
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#include <linux/stddef.h> |
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#include <linux/unistd.h> |
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#include <linux/ptrace.h> |
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#include <linux/slab.h> |
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#include <linux/tty.h> |
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#include <linux/ioport.h> |
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#include <linux/delay.h> |
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#include <linux/console.h> |
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#include <linux/init.h> |
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#include <linux/memblock.h> |
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#include <linux/seq_file.h> |
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#include <linux/serial.h> |
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#include <linux/initrd.h> |
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#include <linux/of_fdt.h> |
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#include <linux/of.h> |
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#include <linux/device.h> |
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#include <asm/sections.h> |
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#include <asm/types.h> |
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#include <asm/setup.h> |
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#include <asm/io.h> |
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#include <asm/cpuinfo.h> |
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#include <asm/delay.h> |
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#include "vmlinux.h" |
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static void __init setup_memory(void) |
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{ |
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unsigned long ram_start_pfn; |
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unsigned long ram_end_pfn; |
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phys_addr_t memory_start, memory_end; |
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memory_end = memory_start = 0; |
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/* Find main memory where is the kernel, we assume its the only one */ |
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memory_start = memblock_start_of_DRAM(); |
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memory_end = memblock_end_of_DRAM(); |
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if (!memory_end) { |
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panic("No memory!"); |
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} |
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ram_start_pfn = PFN_UP(memory_start); |
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ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM()); |
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/* setup bootmem globals (we use no_bootmem, but mm still depends on this) */ |
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min_low_pfn = ram_start_pfn; |
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max_low_pfn = ram_end_pfn; |
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max_pfn = ram_end_pfn; |
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/* |
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* initialize the boot-time allocator (with low memory only). |
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* |
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* This makes the memory from the end of the kernel to the end of |
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* RAM usable. |
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*/ |
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memblock_reserve(__pa(_stext), _end - _stext); |
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#ifdef CONFIG_BLK_DEV_INITRD |
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/* Then reserve the initrd, if any */ |
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if (initrd_start && (initrd_end > initrd_start)) { |
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unsigned long aligned_start = ALIGN_DOWN(initrd_start, PAGE_SIZE); |
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unsigned long aligned_end = ALIGN(initrd_end, PAGE_SIZE); |
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memblock_reserve(__pa(aligned_start), aligned_end - aligned_start); |
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} |
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#endif /* CONFIG_BLK_DEV_INITRD */ |
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early_init_fdt_reserve_self(); |
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early_init_fdt_scan_reserved_mem(); |
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memblock_dump_all(); |
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} |
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struct cpuinfo_or1k cpuinfo_or1k[NR_CPUS]; |
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static void print_cpuinfo(void) |
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{ |
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unsigned long upr = mfspr(SPR_UPR); |
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unsigned long vr = mfspr(SPR_VR); |
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unsigned int version; |
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unsigned int revision; |
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struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()]; |
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version = (vr & SPR_VR_VER) >> 24; |
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revision = (vr & SPR_VR_REV); |
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printk(KERN_INFO "CPU: OpenRISC-%x (revision %d) @%d MHz\n", |
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version, revision, cpuinfo->clock_frequency / 1000000); |
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if (!(upr & SPR_UPR_UP)) { |
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printk(KERN_INFO |
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"-- no UPR register... unable to detect configuration\n"); |
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return; |
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} |
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if (upr & SPR_UPR_DCP) |
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printk(KERN_INFO |
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"-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n", |
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cpuinfo->dcache_size, cpuinfo->dcache_block_size, |
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cpuinfo->dcache_ways); |
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else |
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printk(KERN_INFO "-- dcache disabled\n"); |
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if (upr & SPR_UPR_ICP) |
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printk(KERN_INFO |
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"-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n", |
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cpuinfo->icache_size, cpuinfo->icache_block_size, |
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cpuinfo->icache_ways); |
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else |
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printk(KERN_INFO "-- icache disabled\n"); |
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if (upr & SPR_UPR_DMP) |
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printk(KERN_INFO "-- dmmu: %4d entries, %lu way(s)\n", |
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1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2), |
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1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW)); |
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if (upr & SPR_UPR_IMP) |
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printk(KERN_INFO "-- immu: %4d entries, %lu way(s)\n", |
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1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2), |
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1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW)); |
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printk(KERN_INFO "-- additional features:\n"); |
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if (upr & SPR_UPR_DUP) |
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printk(KERN_INFO "-- debug unit\n"); |
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if (upr & SPR_UPR_PCUP) |
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printk(KERN_INFO "-- performance counters\n"); |
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if (upr & SPR_UPR_PMP) |
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printk(KERN_INFO "-- power management\n"); |
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if (upr & SPR_UPR_PICP) |
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printk(KERN_INFO "-- PIC\n"); |
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if (upr & SPR_UPR_TTP) |
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printk(KERN_INFO "-- timer\n"); |
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if (upr & SPR_UPR_CUP) |
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printk(KERN_INFO "-- custom unit(s)\n"); |
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} |
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static struct device_node *setup_find_cpu_node(int cpu) |
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{ |
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u32 hwid; |
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struct device_node *cpun; |
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for_each_of_cpu_node(cpun) { |
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if (of_property_read_u32(cpun, "reg", &hwid)) |
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continue; |
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if (hwid == cpu) |
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return cpun; |
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} |
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return NULL; |
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} |
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void __init setup_cpuinfo(void) |
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{ |
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struct device_node *cpu; |
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unsigned long iccfgr, dccfgr; |
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unsigned long cache_set_size; |
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int cpu_id = smp_processor_id(); |
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struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[cpu_id]; |
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cpu = setup_find_cpu_node(cpu_id); |
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if (!cpu) |
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panic("Couldn't find CPU%d in device tree...\n", cpu_id); |
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iccfgr = mfspr(SPR_ICCFGR); |
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cpuinfo->icache_ways = 1 << (iccfgr & SPR_ICCFGR_NCW); |
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cache_set_size = 1 << ((iccfgr & SPR_ICCFGR_NCS) >> 3); |
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cpuinfo->icache_block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7); |
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cpuinfo->icache_size = |
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cache_set_size * cpuinfo->icache_ways * cpuinfo->icache_block_size; |
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dccfgr = mfspr(SPR_DCCFGR); |
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cpuinfo->dcache_ways = 1 << (dccfgr & SPR_DCCFGR_NCW); |
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cache_set_size = 1 << ((dccfgr & SPR_DCCFGR_NCS) >> 3); |
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cpuinfo->dcache_block_size = 16 << ((dccfgr & SPR_DCCFGR_CBS) >> 7); |
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cpuinfo->dcache_size = |
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cache_set_size * cpuinfo->dcache_ways * cpuinfo->dcache_block_size; |
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if (of_property_read_u32(cpu, "clock-frequency", |
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&cpuinfo->clock_frequency)) { |
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printk(KERN_WARNING |
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"Device tree missing CPU 'clock-frequency' parameter." |
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"Assuming frequency 25MHZ" |
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"This is probably not what you want."); |
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} |
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cpuinfo->coreid = mfspr(SPR_COREID); |
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of_node_put(cpu); |
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print_cpuinfo(); |
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} |
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/** |
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* or1k_early_setup |
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* @fdt: pointer to the start of the device tree in memory or NULL |
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* |
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* Handles the pointer to the device tree that this kernel is to use |
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* for establishing the available platform devices. |
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* |
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* Falls back on built-in device tree in case null pointer is passed. |
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*/ |
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void __init or1k_early_setup(void *fdt) |
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{ |
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if (fdt) |
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pr_info("FDT at %p\n", fdt); |
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else { |
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fdt = __dtb_start; |
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pr_info("Compiled-in FDT at %p\n", fdt); |
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} |
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early_init_devtree(fdt); |
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} |
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static inline unsigned long extract_value_bits(unsigned long reg, |
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short bit_nr, short width) |
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{ |
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return (reg >> bit_nr) & (0 << width); |
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} |
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static inline unsigned long extract_value(unsigned long reg, unsigned long mask) |
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{ |
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while (!(mask & 0x1)) { |
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reg = reg >> 1; |
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mask = mask >> 1; |
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} |
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return mask & reg; |
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} |
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/* |
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* calibrate_delay |
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* |
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* Lightweight calibrate_delay implementation that calculates loops_per_jiffy |
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* from the clock frequency passed in via the device tree |
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* |
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*/ |
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void calibrate_delay(void) |
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{ |
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const int *val; |
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struct device_node *cpu = setup_find_cpu_node(smp_processor_id()); |
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val = of_get_property(cpu, "clock-frequency", NULL); |
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if (!val) |
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panic("no cpu 'clock-frequency' parameter in device tree"); |
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loops_per_jiffy = *val / HZ; |
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pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n", |
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loops_per_jiffy / (500000 / HZ), |
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(loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy); |
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of_node_put(cpu); |
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} |
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void __init setup_arch(char **cmdline_p) |
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{ |
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unflatten_and_copy_device_tree(); |
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setup_cpuinfo(); |
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#ifdef CONFIG_SMP |
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smp_init_cpus(); |
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#endif |
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/* process 1's initial memory region is the kernel code/data */ |
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setup_initial_init_mm(_stext, _etext, _edata, _end); |
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#ifdef CONFIG_BLK_DEV_INITRD |
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if (initrd_start == initrd_end) { |
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printk(KERN_INFO "Initial ramdisk not found\n"); |
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initrd_start = 0; |
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initrd_end = 0; |
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} else { |
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printk(KERN_INFO "Initial ramdisk at: 0x%p (%lu bytes)\n", |
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(void *)(initrd_start), initrd_end - initrd_start); |
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initrd_below_start_ok = 1; |
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} |
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#endif |
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/* setup memblock allocator */ |
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setup_memory(); |
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/* paging_init() sets up the MMU and marks all pages as reserved */ |
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paging_init(); |
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*cmdline_p = boot_command_line; |
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printk(KERN_INFO "OpenRISC Linux -- http://openrisc.io\n"); |
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} |
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static int show_cpuinfo(struct seq_file *m, void *v) |
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{ |
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unsigned int vr, cpucfgr; |
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unsigned int avr; |
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unsigned int version; |
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struct cpuinfo_or1k *cpuinfo = v; |
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vr = mfspr(SPR_VR); |
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cpucfgr = mfspr(SPR_CPUCFGR); |
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#ifdef CONFIG_SMP |
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seq_printf(m, "processor\t\t: %d\n", cpuinfo->coreid); |
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#endif |
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if (vr & SPR_VR_UVRP) { |
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vr = mfspr(SPR_VR2); |
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version = vr & SPR_VR2_VER; |
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avr = mfspr(SPR_AVR); |
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seq_printf(m, "cpu architecture\t: " |
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"OpenRISC 1000 (%d.%d-rev%d)\n", |
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(avr >> 24) & 0xff, |
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(avr >> 16) & 0xff, |
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(avr >> 8) & 0xff); |
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seq_printf(m, "cpu implementation id\t: 0x%x\n", |
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(vr & SPR_VR2_CPUID) >> 24); |
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seq_printf(m, "cpu version\t\t: 0x%x\n", version); |
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} else { |
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version = (vr & SPR_VR_VER) >> 24; |
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seq_printf(m, "cpu\t\t\t: OpenRISC-%x\n", version); |
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seq_printf(m, "revision\t\t: %d\n", vr & SPR_VR_REV); |
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} |
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seq_printf(m, "frequency\t\t: %ld\n", loops_per_jiffy * HZ); |
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seq_printf(m, "dcache size\t\t: %d bytes\n", cpuinfo->dcache_size); |
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seq_printf(m, "dcache block size\t: %d bytes\n", |
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cpuinfo->dcache_block_size); |
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seq_printf(m, "dcache ways\t\t: %d\n", cpuinfo->dcache_ways); |
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seq_printf(m, "icache size\t\t: %d bytes\n", cpuinfo->icache_size); |
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seq_printf(m, "icache block size\t: %d bytes\n", |
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cpuinfo->icache_block_size); |
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seq_printf(m, "icache ways\t\t: %d\n", cpuinfo->icache_ways); |
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seq_printf(m, "immu\t\t\t: %d entries, %lu ways\n", |
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1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2), |
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1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW)); |
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seq_printf(m, "dmmu\t\t\t: %d entries, %lu ways\n", |
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1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2), |
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1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW)); |
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seq_printf(m, "bogomips\t\t: %lu.%02lu\n", |
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(loops_per_jiffy * HZ) / 500000, |
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((loops_per_jiffy * HZ) / 5000) % 100); |
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seq_puts(m, "features\t\t: "); |
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seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OB32S ? "orbis32" : ""); |
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seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OB64S ? "orbis64" : ""); |
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seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OF32S ? "orfpx32" : ""); |
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seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OF64S ? "orfpx64" : ""); |
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seq_printf(m, "%s ", cpucfgr & SPR_CPUCFGR_OV64S ? "orvdx64" : ""); |
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seq_puts(m, "\n"); |
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seq_puts(m, "\n"); |
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return 0; |
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} |
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static void *c_start(struct seq_file *m, loff_t *pos) |
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{ |
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*pos = cpumask_next(*pos - 1, cpu_online_mask); |
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if ((*pos) < nr_cpu_ids) |
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return &cpuinfo_or1k[*pos]; |
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return NULL; |
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} |
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static void *c_next(struct seq_file *m, void *v, loff_t *pos) |
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{ |
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(*pos)++; |
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return c_start(m, pos); |
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} |
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static void c_stop(struct seq_file *m, void *v) |
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{ |
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} |
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const struct seq_operations cpuinfo_op = { |
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.start = c_start, |
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.next = c_next, |
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.stop = c_stop, |
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.show = show_cpuinfo, |
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};
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