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348 lines
10 KiB
348 lines
10 KiB
/***********************license start*************** |
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* Author: Cavium Networks |
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* |
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* Contact: [email protected] |
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* This file is part of the OCTEON SDK |
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* |
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* Copyright (c) 2003-2008 Cavium Networks |
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* |
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* This file is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License, Version 2, as |
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* published by the Free Software Foundation. |
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* |
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* This file is distributed in the hope that it will be useful, but |
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* AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty |
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or |
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* NONINFRINGEMENT. See the GNU General Public License for more |
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* details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this file; if not, write to the Free Software |
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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* or visit http://www.gnu.org/licenses/. |
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* |
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* This file may also be available under a different license from Cavium. |
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* Contact Cavium Networks for more information |
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***********************license end**************************************/ |
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/* |
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* |
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* Helper functions to abstract board specific data about |
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* network ports from the rest of the cvmx-helper files. |
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*/ |
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#include <linux/bug.h> |
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#include <asm/octeon/octeon.h> |
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#include <asm/octeon/cvmx-bootinfo.h> |
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#include <asm/octeon/cvmx-config.h> |
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#include <asm/octeon/cvmx-helper.h> |
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#include <asm/octeon/cvmx-helper-util.h> |
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#include <asm/octeon/cvmx-helper-board.h> |
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#include <asm/octeon/cvmx-gmxx-defs.h> |
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#include <asm/octeon/cvmx-asxx-defs.h> |
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/* |
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* Return the MII PHY address associated with the given IPD |
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* port. A result of -1 means there isn't a MII capable PHY |
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* connected to this port. On chips supporting multiple MII |
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* busses the bus number is encoded in bits <15:8>. |
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* |
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* This function must be modified for every new Octeon board. |
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* Internally it uses switch statements based on the cvmx_sysinfo |
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* data to determine board types and revisions. It replies on the |
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* fact that every Octeon board receives a unique board type |
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* enumeration from the bootloader. |
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* |
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* @ipd_port: Octeon IPD port to get the MII address for. |
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* |
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* Returns MII PHY address and bus number or -1. |
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*/ |
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int cvmx_helper_board_get_mii_address(int ipd_port) |
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{ |
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switch (cvmx_sysinfo_get()->board_type) { |
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case CVMX_BOARD_TYPE_SIM: |
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/* Simulator doesn't have MII */ |
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return -1; |
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case CVMX_BOARD_TYPE_EBT3000: |
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case CVMX_BOARD_TYPE_EBT5800: |
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case CVMX_BOARD_TYPE_THUNDER: |
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case CVMX_BOARD_TYPE_NICPRO2: |
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/* Interface 0 is SPI4, interface 1 is RGMII */ |
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if ((ipd_port >= 16) && (ipd_port < 20)) |
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return ipd_port - 16; |
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else |
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return -1; |
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case CVMX_BOARD_TYPE_KODAMA: |
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case CVMX_BOARD_TYPE_EBH3100: |
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case CVMX_BOARD_TYPE_HIKARI: |
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case CVMX_BOARD_TYPE_CN3010_EVB_HS5: |
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case CVMX_BOARD_TYPE_CN3005_EVB_HS5: |
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case CVMX_BOARD_TYPE_CN3020_EVB_HS5: |
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/* |
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* Port 0 is WAN connected to a PHY, Port 1 is GMII |
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* connected to a switch |
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*/ |
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if (ipd_port == 0) |
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return 4; |
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else if (ipd_port == 1) |
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return 9; |
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else |
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return -1; |
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case CVMX_BOARD_TYPE_NAC38: |
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/* Board has 8 RGMII ports PHYs are 0-7 */ |
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if ((ipd_port >= 0) && (ipd_port < 4)) |
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return ipd_port; |
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else if ((ipd_port >= 16) && (ipd_port < 20)) |
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return ipd_port - 16 + 4; |
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else |
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return -1; |
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case CVMX_BOARD_TYPE_EBH3000: |
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/* Board has dual SPI4 and no PHYs */ |
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return -1; |
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case CVMX_BOARD_TYPE_EBH5200: |
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case CVMX_BOARD_TYPE_EBH5201: |
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case CVMX_BOARD_TYPE_EBT5200: |
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/* Board has 2 management ports */ |
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if ((ipd_port >= CVMX_HELPER_BOARD_MGMT_IPD_PORT) && |
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(ipd_port < (CVMX_HELPER_BOARD_MGMT_IPD_PORT + 2))) |
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return ipd_port - CVMX_HELPER_BOARD_MGMT_IPD_PORT; |
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/* |
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* Board has 4 SGMII ports. The PHYs start right after the MII |
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* ports MII0 = 0, MII1 = 1, SGMII = 2-5. |
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*/ |
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if ((ipd_port >= 0) && (ipd_port < 4)) |
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return ipd_port + 2; |
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else |
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return -1; |
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case CVMX_BOARD_TYPE_EBH5600: |
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case CVMX_BOARD_TYPE_EBH5601: |
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case CVMX_BOARD_TYPE_EBH5610: |
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/* Board has 1 management port */ |
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if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT) |
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return 0; |
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/* |
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* Board has 8 SGMII ports. 4 connect out, two connect |
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* to a switch, and 2 loop to each other |
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*/ |
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if ((ipd_port >= 0) && (ipd_port < 4)) |
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return ipd_port + 1; |
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else |
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return -1; |
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case CVMX_BOARD_TYPE_CUST_NB5: |
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if (ipd_port == 2) |
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return 4; |
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else |
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return -1; |
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case CVMX_BOARD_TYPE_NIC_XLE_4G: |
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/* Board has 4 SGMII ports. connected QLM3(interface 1) */ |
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if ((ipd_port >= 16) && (ipd_port < 20)) |
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return ipd_port - 16 + 1; |
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else |
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return -1; |
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case CVMX_BOARD_TYPE_NIC_XLE_10G: |
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case CVMX_BOARD_TYPE_NIC10E: |
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return -1; |
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case CVMX_BOARD_TYPE_NIC4E: |
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if (ipd_port >= 0 && ipd_port <= 3) |
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return (ipd_port + 0x1f) & 0x1f; |
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else |
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return -1; |
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case CVMX_BOARD_TYPE_NIC2E: |
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if (ipd_port >= 0 && ipd_port <= 1) |
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return ipd_port + 1; |
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else |
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return -1; |
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case CVMX_BOARD_TYPE_BBGW_REF: |
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/* |
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* No PHYs are connected to Octeon, everything is |
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* through switch. |
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*/ |
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return -1; |
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case CVMX_BOARD_TYPE_CUST_WSX16: |
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if (ipd_port >= 0 && ipd_port <= 3) |
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return ipd_port; |
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else if (ipd_port >= 16 && ipd_port <= 19) |
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return ipd_port - 16 + 4; |
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else |
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return -1; |
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case CVMX_BOARD_TYPE_UBNT_E100: |
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if (ipd_port >= 0 && ipd_port <= 2) |
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return 7 - ipd_port; |
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else |
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return -1; |
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case CVMX_BOARD_TYPE_KONTRON_S1901: |
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if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT) |
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return 1; |
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else |
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return -1; |
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} |
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/* Some unknown board. Somebody forgot to update this function... */ |
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cvmx_dprintf |
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("cvmx_helper_board_get_mii_address: Unknown board type %d\n", |
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cvmx_sysinfo_get()->board_type); |
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return -1; |
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} |
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/* |
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* This function is the board specific method of determining an |
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* ethernet ports link speed. Most Octeon boards have Marvell PHYs |
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* and are handled by the fall through case. This function must be |
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* updated for boards that don't have the normal Marvell PHYs. |
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* |
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* This function must be modified for every new Octeon board. |
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* Internally it uses switch statements based on the cvmx_sysinfo |
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* data to determine board types and revisions. It relies on the |
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* fact that every Octeon board receives a unique board type |
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* enumeration from the bootloader. |
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* |
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* @ipd_port: IPD input port associated with the port we want to get link |
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* status for. |
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* |
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* Returns The ports link status. If the link isn't fully resolved, this must |
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* return zero. |
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*/ |
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union cvmx_helper_link_info __cvmx_helper_board_link_get(int ipd_port) |
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{ |
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union cvmx_helper_link_info result; |
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WARN(!octeon_is_simulation(), |
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"Using deprecated link status - please update your DT"); |
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/* Unless we fix it later, all links are defaulted to down */ |
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result.u64 = 0; |
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if (octeon_is_simulation()) { |
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/* The simulator gives you a simulated 1Gbps full duplex link */ |
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result.s.link_up = 1; |
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result.s.full_duplex = 1; |
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result.s.speed = 1000; |
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return result; |
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} |
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if (OCTEON_IS_MODEL(OCTEON_CN3XXX) |
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|| OCTEON_IS_MODEL(OCTEON_CN58XX) |
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|| OCTEON_IS_MODEL(OCTEON_CN50XX)) { |
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/* |
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* We don't have a PHY address, so attempt to use |
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* in-band status. It is really important that boards |
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* not supporting in-band status never get |
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* here. Reading broken in-band status tends to do bad |
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* things |
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*/ |
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union cvmx_gmxx_rxx_rx_inbnd inband_status; |
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int interface = cvmx_helper_get_interface_num(ipd_port); |
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int index = cvmx_helper_get_interface_index_num(ipd_port); |
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inband_status.u64 = |
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cvmx_read_csr(CVMX_GMXX_RXX_RX_INBND(index, interface)); |
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result.s.link_up = inband_status.s.status; |
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result.s.full_duplex = inband_status.s.duplex; |
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switch (inband_status.s.speed) { |
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case 0: /* 10 Mbps */ |
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result.s.speed = 10; |
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break; |
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case 1: /* 100 Mbps */ |
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result.s.speed = 100; |
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break; |
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case 2: /* 1 Gbps */ |
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result.s.speed = 1000; |
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break; |
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case 3: /* Illegal */ |
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result.u64 = 0; |
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break; |
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} |
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} else { |
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/* |
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* We don't have a PHY address and we don't have |
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* in-band status. There is no way to determine the |
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* link speed. Return down assuming this port isn't |
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* wired |
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*/ |
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result.u64 = 0; |
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} |
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/* If link is down, return all fields as zero. */ |
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if (!result.s.link_up) |
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result.u64 = 0; |
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return result; |
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} |
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/* |
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* This function is called by cvmx_helper_interface_probe() after it |
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* determines the number of ports Octeon can support on a specific |
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* interface. This function is the per board location to override |
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* this value. It is called with the number of ports Octeon might |
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* support and should return the number of actual ports on the |
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* board. |
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* |
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* This function must be modifed for every new Octeon board. |
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* Internally it uses switch statements based on the cvmx_sysinfo |
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* data to determine board types and revisions. It relys on the |
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* fact that every Octeon board receives a unique board type |
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* enumeration from the bootloader. |
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* |
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* @interface: Interface to probe |
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* @supported_ports: |
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* Number of ports Octeon supports. |
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* |
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* Returns Number of ports the actual board supports. Many times this will |
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* simple be "support_ports". |
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*/ |
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int __cvmx_helper_board_interface_probe(int interface, int supported_ports) |
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{ |
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switch (cvmx_sysinfo_get()->board_type) { |
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case CVMX_BOARD_TYPE_CN3005_EVB_HS5: |
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if (interface == 0) |
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return 2; |
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break; |
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case CVMX_BOARD_TYPE_BBGW_REF: |
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if (interface == 0) |
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return 2; |
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break; |
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case CVMX_BOARD_TYPE_NIC_XLE_4G: |
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if (interface == 0) |
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return 0; |
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break; |
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/* The 2nd interface on the EBH5600 is connected to the Marvel switch, |
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which we don't support. Disable ports connected to it */ |
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case CVMX_BOARD_TYPE_EBH5600: |
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if (interface == 1) |
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return 0; |
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break; |
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} |
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return supported_ports; |
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} |
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/* |
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* Get the clock type used for the USB block based on board type. |
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* Used by the USB code for auto configuration of clock type. |
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* |
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* Return USB clock type enumeration |
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*/ |
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enum cvmx_helper_board_usb_clock_types __cvmx_helper_board_usb_get_clock_type(void) |
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{ |
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switch (cvmx_sysinfo_get()->board_type) { |
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case CVMX_BOARD_TYPE_BBGW_REF: |
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case CVMX_BOARD_TYPE_LANAI2_A: |
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case CVMX_BOARD_TYPE_LANAI2_U: |
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case CVMX_BOARD_TYPE_LANAI2_G: |
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case CVMX_BOARD_TYPE_NIC10E_66: |
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case CVMX_BOARD_TYPE_UBNT_E100: |
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return USB_CLOCK_TYPE_CRYSTAL_12; |
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case CVMX_BOARD_TYPE_NIC10E: |
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return USB_CLOCK_TYPE_REF_12; |
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default: |
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break; |
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} |
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/* Most boards except NIC10e use a 12MHz crystal */ |
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if (OCTEON_IS_OCTEON2()) |
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return USB_CLOCK_TYPE_CRYSTAL_12; |
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return USB_CLOCK_TYPE_REF_48; |
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}
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