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271 lines
6.5 KiB
271 lines
6.5 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Macintosh interrupts |
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* |
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* General design: |
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* In contrary to the Amiga and Atari platforms, the Mac hardware seems to |
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* exclusively use the autovector interrupts (the 'generic level0-level7' |
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* interrupts with exception vectors 0x19-0x1f). The following interrupt levels |
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* are used: |
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* 1 - VIA1 |
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* - slot 0: one second interrupt (CA2) |
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* - slot 1: VBlank (CA1) |
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* - slot 2: ADB data ready (SR full) |
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* - slot 3: ADB data (CB2) |
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* - slot 4: ADB clock (CB1) |
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* - slot 5: timer 2 |
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* - slot 6: timer 1 |
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* - slot 7: status of IRQ; signals 'any enabled int.' |
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* |
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* 2 - VIA2 or RBV |
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* - slot 0: SCSI DRQ (CA2) |
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* - slot 1: NUBUS IRQ (CA1) need to read port A to find which |
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* - slot 2: /EXP IRQ (only on IIci) |
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* - slot 3: SCSI IRQ (CB2) |
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* - slot 4: ASC IRQ (CB1) |
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* - slot 5: timer 2 (not on IIci) |
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* - slot 6: timer 1 (not on IIci) |
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* - slot 7: status of IRQ; signals 'any enabled int.' |
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* |
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* Levels 3-6 vary by machine type. For VIA or RBV Macintoshes: |
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* |
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* 3 - unused (?) |
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* |
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* 4 - SCC |
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* |
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* 5 - unused (?) |
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* [serial errors or special conditions seem to raise level 6 |
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* interrupts on some models (LC4xx?)] |
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* |
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* 6 - off switch (?) |
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* |
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* Machines with Quadra-like VIA hardware, except PSC and PMU machines, support |
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* an alternate interrupt mapping, as used by A/UX. It spreads ethernet and |
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* sound out to their own autovector IRQs and gives VIA1 a higher priority: |
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* |
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* 1 - unused (?) |
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* |
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* 3 - on-board SONIC |
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* |
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* 5 - Apple Sound Chip (ASC) |
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* |
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* 6 - VIA1 |
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* |
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* For OSS Macintoshes (IIfx only), we apply an interrupt mapping similar to |
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* the Quadra (A/UX) mapping: |
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* |
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* 1 - ISM IOP (ADB) |
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* |
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* 2 - SCSI |
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* |
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* 3 - NuBus |
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* |
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* 4 - SCC IOP |
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* |
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* 6 - VIA1 |
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* |
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* For PSC Macintoshes (660AV, 840AV): |
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* |
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* 3 - PSC level 3 |
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* - slot 0: MACE |
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* |
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* 4 - PSC level 4 |
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* - slot 1: SCC channel A interrupt |
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* - slot 2: SCC channel B interrupt |
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* - slot 3: MACE DMA |
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* |
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* 5 - PSC level 5 |
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* |
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* 6 - PSC level 6 |
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* |
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* Finally we have good 'ole level 7, the non-maskable interrupt: |
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* |
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* 7 - NMI (programmer's switch on the back of some Macs) |
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* Also RAM parity error on models which support it (IIc, IIfx?) |
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* |
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* The current interrupt logic looks something like this: |
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* |
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* - We install dispatchers for the autovector interrupts (1-7). These |
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* dispatchers are responsible for querying the hardware (the |
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* VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using |
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* this information a machspec interrupt number is generated by placing the |
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* index of the interrupt hardware into the low three bits and the original |
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* autovector interrupt number in the upper 5 bits. The handlers for the |
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* resulting machspec interrupt are then called. |
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* |
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* - Nubus is a special case because its interrupts are hidden behind two |
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* layers of hardware. Nubus interrupts come in as index 1 on VIA #2, |
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* which translates to IRQ number 17. In this spot we install _another_ |
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* dispatcher. This dispatcher finds the interrupting slot number (9-F) and |
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* then forms a new machspec interrupt number as above with the slot number |
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* minus 9 in the low three bits and the pseudo-level 7 in the upper five |
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* bits. The handlers for this new machspec interrupt number are then |
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* called. This puts Nubus interrupts into the range 56-62. |
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* |
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* - The Baboon interrupts (used on some PowerBooks) are an even more special |
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* case. They're hidden behind the Nubus slot $C interrupt thus adding a |
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* third layer of indirection. Why oh why did the Apple engineers do that? |
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* |
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*/ |
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#include <linux/types.h> |
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#include <linux/kernel.h> |
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#include <linux/sched.h> |
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#include <linux/sched/debug.h> |
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#include <linux/interrupt.h> |
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#include <linux/irq.h> |
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#include <linux/delay.h> |
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#include <asm/irq.h> |
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#include <asm/macintosh.h> |
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#include <asm/macints.h> |
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#include <asm/mac_via.h> |
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#include <asm/mac_psc.h> |
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#include <asm/mac_oss.h> |
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#include <asm/mac_iop.h> |
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#include <asm/mac_baboon.h> |
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#include <asm/hwtest.h> |
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#include <asm/irq_regs.h> |
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extern void show_registers(struct pt_regs *); |
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irqreturn_t mac_nmi_handler(int, void *); |
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static unsigned int mac_irq_startup(struct irq_data *); |
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static void mac_irq_shutdown(struct irq_data *); |
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static struct irq_chip mac_irq_chip = { |
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.name = "mac", |
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.irq_enable = mac_irq_enable, |
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.irq_disable = mac_irq_disable, |
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.irq_startup = mac_irq_startup, |
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.irq_shutdown = mac_irq_shutdown, |
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}; |
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void __init mac_init_IRQ(void) |
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{ |
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m68k_setup_irq_controller(&mac_irq_chip, handle_simple_irq, IRQ_USER, |
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NUM_MAC_SOURCES - IRQ_USER); |
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/* |
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* Now register the handlers for the master IRQ handlers |
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* at levels 1-7. Most of the work is done elsewhere. |
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*/ |
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if (oss_present) |
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oss_register_interrupts(); |
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else |
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via_register_interrupts(); |
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if (psc) |
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psc_register_interrupts(); |
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if (baboon_present) |
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baboon_register_interrupts(); |
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iop_register_interrupts(); |
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if (request_irq(IRQ_AUTO_7, mac_nmi_handler, 0, "NMI", |
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mac_nmi_handler)) |
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pr_err("Couldn't register NMI\n"); |
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} |
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/* |
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* mac_irq_enable - enable an interrupt source |
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* mac_irq_disable - disable an interrupt source |
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* |
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* These routines are just dispatchers to the VIA/OSS/PSC routines. |
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*/ |
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void mac_irq_enable(struct irq_data *data) |
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{ |
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int irq = data->irq; |
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int irq_src = IRQ_SRC(irq); |
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switch(irq_src) { |
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case 1: |
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case 2: |
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case 7: |
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if (oss_present) |
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oss_irq_enable(irq); |
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else |
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via_irq_enable(irq); |
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break; |
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case 3: |
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case 4: |
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case 5: |
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case 6: |
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if (psc) |
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psc_irq_enable(irq); |
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else if (oss_present) |
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oss_irq_enable(irq); |
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break; |
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case 8: |
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if (baboon_present) |
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baboon_irq_enable(irq); |
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break; |
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} |
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} |
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void mac_irq_disable(struct irq_data *data) |
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{ |
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int irq = data->irq; |
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int irq_src = IRQ_SRC(irq); |
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switch(irq_src) { |
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case 1: |
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case 2: |
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case 7: |
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if (oss_present) |
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oss_irq_disable(irq); |
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else |
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via_irq_disable(irq); |
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break; |
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case 3: |
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case 4: |
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case 5: |
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case 6: |
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if (psc) |
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psc_irq_disable(irq); |
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else if (oss_present) |
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oss_irq_disable(irq); |
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break; |
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case 8: |
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if (baboon_present) |
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baboon_irq_disable(irq); |
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break; |
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} |
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} |
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static unsigned int mac_irq_startup(struct irq_data *data) |
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{ |
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int irq = data->irq; |
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if (IRQ_SRC(irq) == 7 && !oss_present) |
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via_nubus_irq_startup(irq); |
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else |
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mac_irq_enable(data); |
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return 0; |
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} |
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static void mac_irq_shutdown(struct irq_data *data) |
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{ |
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int irq = data->irq; |
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if (IRQ_SRC(irq) == 7 && !oss_present) |
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via_nubus_irq_shutdown(irq); |
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else |
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mac_irq_disable(data); |
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} |
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static volatile int in_nmi; |
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irqreturn_t mac_nmi_handler(int irq, void *dev_id) |
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{ |
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if (in_nmi) |
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return IRQ_HANDLED; |
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in_nmi = 1; |
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pr_info("Non-Maskable Interrupt\n"); |
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show_registers(get_irq_regs()); |
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in_nmi = 0; |
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return IRQ_HANDLED; |
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}
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