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942 lines
24 KiB
942 lines
24 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* palinfo.c |
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* |
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* Prints processor specific information reported by PAL. |
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* This code is based on specification of PAL as of the |
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* Intel IA-64 Architecture Software Developer's Manual v1.0. |
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* |
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* |
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* Copyright (C) 2000-2001, 2003 Hewlett-Packard Co |
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* Stephane Eranian <[email protected]> |
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* Copyright (C) 2004 Intel Corporation |
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* Ashok Raj <[email protected]> |
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* |
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* 05/26/2000 S.Eranian initial release |
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* 08/21/2000 S.Eranian updated to July 2000 PAL specs |
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* 02/05/2001 S.Eranian fixed module support |
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* 10/23/2001 S.Eranian updated pal_perf_mon_info bug fixes |
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* 03/24/2004 Ashok Raj updated to work with CPU Hotplug |
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* 10/26/2006 Russ Anderson updated processor features to rev 2.2 spec |
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*/ |
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#include <linux/types.h> |
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#include <linux/errno.h> |
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#include <linux/init.h> |
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#include <linux/proc_fs.h> |
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#include <linux/seq_file.h> |
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#include <linux/mm.h> |
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#include <linux/module.h> |
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#include <linux/efi.h> |
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#include <linux/notifier.h> |
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#include <linux/cpu.h> |
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#include <linux/cpumask.h> |
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|
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#include <asm/pal.h> |
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#include <asm/sal.h> |
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#include <asm/page.h> |
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#include <asm/processor.h> |
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#include <linux/smp.h> |
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|
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MODULE_AUTHOR("Stephane Eranian <[email protected]>"); |
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MODULE_DESCRIPTION("/proc interface to IA-64 PAL"); |
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MODULE_LICENSE("GPL"); |
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|
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#define PALINFO_VERSION "0.5" |
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|
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typedef int (*palinfo_func_t)(struct seq_file *); |
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|
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typedef struct { |
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const char *name; /* name of the proc entry */ |
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palinfo_func_t proc_read; /* function to call for reading */ |
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struct proc_dir_entry *entry; /* registered entry (removal) */ |
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} palinfo_entry_t; |
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|
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/* |
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* A bunch of string array to get pretty printing |
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*/ |
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|
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static const char *cache_types[] = { |
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"", /* not used */ |
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"Instruction", |
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"Data", |
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"Data/Instruction" /* unified */ |
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}; |
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|
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static const char *cache_mattrib[]={ |
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"WriteThrough", |
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"WriteBack", |
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"", /* reserved */ |
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"" /* reserved */ |
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}; |
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|
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static const char *cache_st_hints[]={ |
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"Temporal, level 1", |
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"Reserved", |
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"Reserved", |
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"Non-temporal, all levels", |
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"Reserved", |
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"Reserved", |
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"Reserved", |
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"Reserved" |
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}; |
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|
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static const char *cache_ld_hints[]={ |
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"Temporal, level 1", |
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"Non-temporal, level 1", |
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"Reserved", |
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"Non-temporal, all levels", |
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"Reserved", |
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"Reserved", |
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"Reserved", |
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"Reserved" |
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}; |
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|
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static const char *rse_hints[]={ |
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"enforced lazy", |
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"eager stores", |
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"eager loads", |
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"eager loads and stores" |
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}; |
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|
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#define RSE_HINTS_COUNT ARRAY_SIZE(rse_hints) |
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|
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static const char *mem_attrib[]={ |
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"WB", /* 000 */ |
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"SW", /* 001 */ |
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"010", /* 010 */ |
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"011", /* 011 */ |
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"UC", /* 100 */ |
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"UCE", /* 101 */ |
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"WC", /* 110 */ |
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"NaTPage" /* 111 */ |
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}; |
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|
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/* |
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* Take a 64bit vector and produces a string such that |
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* if bit n is set then 2^n in clear text is generated. The adjustment |
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* to the right unit is also done. |
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* |
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* Input: |
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* - a pointer to a buffer to hold the string |
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* - a 64-bit vector |
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* Ouput: |
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* - a pointer to the end of the buffer |
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* |
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*/ |
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static void bitvector_process(struct seq_file *m, u64 vector) |
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{ |
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int i,j; |
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static const char *units[]={ "", "K", "M", "G", "T" }; |
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|
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for (i=0, j=0; i < 64; i++ , j=i/10) { |
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if (vector & 0x1) |
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seq_printf(m, "%d%s ", 1 << (i-j*10), units[j]); |
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vector >>= 1; |
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} |
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} |
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|
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/* |
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* Take a 64bit vector and produces a string such that |
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* if bit n is set then register n is present. The function |
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* takes into account consecutive registers and prints out ranges. |
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* |
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* Input: |
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* - a pointer to a buffer to hold the string |
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* - a 64-bit vector |
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* Ouput: |
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* - a pointer to the end of the buffer |
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* |
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*/ |
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static void bitregister_process(struct seq_file *m, u64 *reg_info, int max) |
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{ |
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int i, begin, skip = 0; |
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u64 value = reg_info[0]; |
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|
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value >>= i = begin = ffs(value) - 1; |
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|
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for(; i < max; i++ ) { |
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|
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if (i != 0 && (i%64) == 0) value = *++reg_info; |
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|
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if ((value & 0x1) == 0 && skip == 0) { |
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if (begin <= i - 2) |
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seq_printf(m, "%d-%d ", begin, i-1); |
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else |
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seq_printf(m, "%d ", i-1); |
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skip = 1; |
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begin = -1; |
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} else if ((value & 0x1) && skip == 1) { |
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skip = 0; |
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begin = i; |
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} |
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value >>=1; |
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} |
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if (begin > -1) { |
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if (begin < 127) |
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seq_printf(m, "%d-127", begin); |
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else |
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seq_puts(m, "127"); |
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} |
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} |
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|
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static int power_info(struct seq_file *m) |
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{ |
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s64 status; |
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u64 halt_info_buffer[8]; |
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pal_power_mgmt_info_u_t *halt_info =(pal_power_mgmt_info_u_t *)halt_info_buffer; |
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int i; |
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status = ia64_pal_halt_info(halt_info); |
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if (status != 0) return 0; |
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for (i=0; i < 8 ; i++ ) { |
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if (halt_info[i].pal_power_mgmt_info_s.im == 1) { |
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seq_printf(m, |
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"Power level %d:\n" |
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"\tentry_latency : %d cycles\n" |
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"\texit_latency : %d cycles\n" |
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"\tpower consumption : %d mW\n" |
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"\tCache+TLB coherency : %s\n", i, |
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halt_info[i].pal_power_mgmt_info_s.entry_latency, |
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halt_info[i].pal_power_mgmt_info_s.exit_latency, |
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halt_info[i].pal_power_mgmt_info_s.power_consumption, |
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halt_info[i].pal_power_mgmt_info_s.co ? "Yes" : "No"); |
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} else { |
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seq_printf(m,"Power level %d: not implemented\n", i); |
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} |
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} |
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return 0; |
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} |
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|
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static int cache_info(struct seq_file *m) |
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{ |
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unsigned long i, levels, unique_caches; |
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pal_cache_config_info_t cci; |
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int j, k; |
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long status; |
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|
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if ((status = ia64_pal_cache_summary(&levels, &unique_caches)) != 0) { |
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printk(KERN_ERR "ia64_pal_cache_summary=%ld\n", status); |
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return 0; |
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} |
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|
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seq_printf(m, "Cache levels : %ld\nUnique caches : %ld\n\n", |
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levels, unique_caches); |
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for (i=0; i < levels; i++) { |
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for (j=2; j >0 ; j--) { |
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/* even without unification some level may not be present */ |
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if ((status=ia64_pal_cache_config_info(i,j, &cci)) != 0) |
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continue; |
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seq_printf(m, |
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"%s Cache level %lu:\n" |
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"\tSize : %u bytes\n" |
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"\tAttributes : ", |
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cache_types[j+cci.pcci_unified], i+1, |
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cci.pcci_cache_size); |
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|
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if (cci.pcci_unified) |
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seq_puts(m, "Unified "); |
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|
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seq_printf(m, "%s\n", cache_mattrib[cci.pcci_cache_attr]); |
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|
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seq_printf(m, |
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"\tAssociativity : %d\n" |
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"\tLine size : %d bytes\n" |
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"\tStride : %d bytes\n", |
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cci.pcci_assoc, |
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1<<cci.pcci_line_size, |
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1<<cci.pcci_stride); |
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if (j == 1) |
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seq_puts(m, "\tStore latency : N/A\n"); |
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else |
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seq_printf(m, "\tStore latency : %d cycle(s)\n", |
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cci.pcci_st_latency); |
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|
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seq_printf(m, |
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"\tLoad latency : %d cycle(s)\n" |
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"\tStore hints : ", cci.pcci_ld_latency); |
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|
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for(k=0; k < 8; k++ ) { |
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if ( cci.pcci_st_hints & 0x1) |
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seq_printf(m, "[%s]", cache_st_hints[k]); |
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cci.pcci_st_hints >>=1; |
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} |
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seq_puts(m, "\n\tLoad hints : "); |
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for(k=0; k < 8; k++ ) { |
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if (cci.pcci_ld_hints & 0x1) |
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seq_printf(m, "[%s]", cache_ld_hints[k]); |
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cci.pcci_ld_hints >>=1; |
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} |
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seq_printf(m, |
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"\n\tAlias boundary : %d byte(s)\n" |
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"\tTag LSB : %d\n" |
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"\tTag MSB : %d\n", |
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1<<cci.pcci_alias_boundary, cci.pcci_tag_lsb, |
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cci.pcci_tag_msb); |
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|
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/* when unified, data(j=2) is enough */ |
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if (cci.pcci_unified) |
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break; |
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} |
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} |
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return 0; |
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} |
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|
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static int vm_info(struct seq_file *m) |
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{ |
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u64 tr_pages =0, vw_pages=0, tc_pages; |
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u64 attrib; |
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pal_vm_info_1_u_t vm_info_1; |
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pal_vm_info_2_u_t vm_info_2; |
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pal_tc_info_u_t tc_info; |
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ia64_ptce_info_t ptce; |
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const char *sep; |
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int i, j; |
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long status; |
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|
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if ((status = ia64_pal_vm_summary(&vm_info_1, &vm_info_2)) !=0) { |
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printk(KERN_ERR "ia64_pal_vm_summary=%ld\n", status); |
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} else { |
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|
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seq_printf(m, |
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"Physical Address Space : %d bits\n" |
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"Virtual Address Space : %d bits\n" |
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"Protection Key Registers(PKR) : %d\n" |
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"Implemented bits in PKR.key : %d\n" |
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"Hash Tag ID : 0x%x\n" |
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"Size of RR.rid : %d\n" |
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"Max Purges : ", |
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vm_info_1.pal_vm_info_1_s.phys_add_size, |
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vm_info_2.pal_vm_info_2_s.impl_va_msb+1, |
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vm_info_1.pal_vm_info_1_s.max_pkr+1, |
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vm_info_1.pal_vm_info_1_s.key_size, |
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vm_info_1.pal_vm_info_1_s.hash_tag_id, |
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vm_info_2.pal_vm_info_2_s.rid_size); |
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if (vm_info_2.pal_vm_info_2_s.max_purges == PAL_MAX_PURGES) |
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seq_puts(m, "unlimited\n"); |
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else |
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seq_printf(m, "%d\n", |
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vm_info_2.pal_vm_info_2_s.max_purges ? |
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vm_info_2.pal_vm_info_2_s.max_purges : 1); |
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} |
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|
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if (ia64_pal_mem_attrib(&attrib) == 0) { |
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seq_puts(m, "Supported memory attributes : "); |
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sep = ""; |
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for (i = 0; i < 8; i++) { |
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if (attrib & (1 << i)) { |
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seq_printf(m, "%s%s", sep, mem_attrib[i]); |
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sep = ", "; |
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} |
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} |
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seq_putc(m, '\n'); |
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} |
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|
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if ((status = ia64_pal_vm_page_size(&tr_pages, &vw_pages)) !=0) { |
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printk(KERN_ERR "ia64_pal_vm_page_size=%ld\n", status); |
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} else { |
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|
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seq_printf(m, |
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"\nTLB walker : %simplemented\n" |
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"Number of DTR : %d\n" |
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"Number of ITR : %d\n" |
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"TLB insertable page sizes : ", |
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vm_info_1.pal_vm_info_1_s.vw ? "" : "not ", |
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vm_info_1.pal_vm_info_1_s.max_dtr_entry+1, |
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vm_info_1.pal_vm_info_1_s.max_itr_entry+1); |
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|
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bitvector_process(m, tr_pages); |
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|
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seq_puts(m, "\nTLB purgeable page sizes : "); |
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|
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bitvector_process(m, vw_pages); |
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} |
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|
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if ((status = ia64_get_ptce(&ptce)) != 0) { |
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printk(KERN_ERR "ia64_get_ptce=%ld\n", status); |
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} else { |
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seq_printf(m, |
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"\nPurge base address : 0x%016lx\n" |
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"Purge outer loop count : %d\n" |
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"Purge inner loop count : %d\n" |
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"Purge outer loop stride : %d\n" |
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"Purge inner loop stride : %d\n", |
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ptce.base, ptce.count[0], ptce.count[1], |
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ptce.stride[0], ptce.stride[1]); |
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|
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seq_printf(m, |
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"TC Levels : %d\n" |
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"Unique TC(s) : %d\n", |
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vm_info_1.pal_vm_info_1_s.num_tc_levels, |
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vm_info_1.pal_vm_info_1_s.max_unique_tcs); |
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|
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for(i=0; i < vm_info_1.pal_vm_info_1_s.num_tc_levels; i++) { |
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for (j=2; j>0 ; j--) { |
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tc_pages = 0; /* just in case */ |
|
|
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/* even without unification, some levels may not be present */ |
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if ((status=ia64_pal_vm_info(i,j, &tc_info, &tc_pages)) != 0) |
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continue; |
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|
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seq_printf(m, |
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"\n%s Translation Cache Level %d:\n" |
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"\tHash sets : %d\n" |
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"\tAssociativity : %d\n" |
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"\tNumber of entries : %d\n" |
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"\tFlags : ", |
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cache_types[j+tc_info.tc_unified], i+1, |
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tc_info.tc_num_sets, |
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tc_info.tc_associativity, |
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tc_info.tc_num_entries); |
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|
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if (tc_info.tc_pf) |
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seq_puts(m, "PreferredPageSizeOptimized "); |
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if (tc_info.tc_unified) |
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seq_puts(m, "Unified "); |
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if (tc_info.tc_reduce_tr) |
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seq_puts(m, "TCReduction"); |
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|
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seq_puts(m, "\n\tSupported page sizes: "); |
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|
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bitvector_process(m, tc_pages); |
|
|
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/* when unified date (j=2) is enough */ |
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if (tc_info.tc_unified) |
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break; |
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} |
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} |
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} |
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|
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seq_putc(m, '\n'); |
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return 0; |
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} |
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|
|
|
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static int register_info(struct seq_file *m) |
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{ |
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u64 reg_info[2]; |
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u64 info; |
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unsigned long phys_stacked; |
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pal_hints_u_t hints; |
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unsigned long iregs, dregs; |
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static const char * const info_type[] = { |
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"Implemented AR(s)", |
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"AR(s) with read side-effects", |
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"Implemented CR(s)", |
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"CR(s) with read side-effects", |
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}; |
|
|
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for(info=0; info < 4; info++) { |
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if (ia64_pal_register_info(info, ®_info[0], ®_info[1]) != 0) |
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return 0; |
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seq_printf(m, "%-32s : ", info_type[info]); |
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bitregister_process(m, reg_info, 128); |
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seq_putc(m, '\n'); |
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} |
|
|
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if (ia64_pal_rse_info(&phys_stacked, &hints) == 0) |
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seq_printf(m, |
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"RSE stacked physical registers : %ld\n" |
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"RSE load/store hints : %ld (%s)\n", |
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phys_stacked, hints.ph_data, |
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hints.ph_data < RSE_HINTS_COUNT ? rse_hints[hints.ph_data]: "(??)"); |
|
|
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if (ia64_pal_debug_info(&iregs, &dregs)) |
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return 0; |
|
|
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seq_printf(m, |
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"Instruction debug register pairs : %ld\n" |
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"Data debug register pairs : %ld\n", iregs, dregs); |
|
|
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return 0; |
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} |
|
|
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static const char *const proc_features_0[]={ /* Feature set 0 */ |
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NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL, |
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NULL,NULL,NULL,NULL,NULL,NULL,NULL, NULL,NULL, |
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NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL, |
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NULL,NULL,NULL,NULL,NULL, NULL,NULL,NULL,NULL, |
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"Unimplemented instruction address fault", |
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"INIT, PMI, and LINT pins", |
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"Simple unimplemented instr addresses", |
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"Variable P-state performance", |
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"Virtual machine features implemented", |
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"XIP,XPSR,XFS implemented", |
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"XR1-XR3 implemented", |
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"Disable dynamic predicate prediction", |
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"Disable processor physical number", |
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"Disable dynamic data cache prefetch", |
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"Disable dynamic inst cache prefetch", |
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"Disable dynamic branch prediction", |
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NULL, NULL, NULL, NULL, |
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"Disable P-states", |
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"Enable MCA on Data Poisoning", |
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"Enable vmsw instruction", |
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"Enable extern environmental notification", |
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"Disable BINIT on processor time-out", |
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"Disable dynamic power management (DPM)", |
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"Disable coherency", |
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"Disable cache", |
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"Enable CMCI promotion", |
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"Enable MCA to BINIT promotion", |
|
"Enable MCA promotion", |
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"Enable BERR promotion" |
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}; |
|
|
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static const char *const proc_features_16[]={ /* Feature set 16 */ |
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"Disable ETM", |
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"Enable ETM", |
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"Enable MCA on half-way timer", |
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"Enable snoop WC", |
|
NULL, |
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"Enable Fast Deferral", |
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"Disable MCA on memory aliasing", |
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"Enable RSB", |
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
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"DP system processor", |
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"Low Voltage", |
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"HT supported", |
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
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NULL, NULL, NULL, NULL, NULL |
|
}; |
|
|
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static const char *const *const proc_features[]={ |
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proc_features_0, |
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
|
NULL, NULL, NULL, NULL, |
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proc_features_16, |
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NULL, NULL, NULL, NULL, |
|
}; |
|
|
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static void feature_set_info(struct seq_file *m, u64 avail, u64 status, u64 control, |
|
unsigned long set) |
|
{ |
|
const char *const *vf, *const *v; |
|
int i; |
|
|
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vf = v = proc_features[set]; |
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for(i=0; i < 64; i++, avail >>=1, status >>=1, control >>=1) { |
|
|
|
if (!(control)) /* No remaining bits set */ |
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break; |
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if (!(avail & 0x1)) /* Print only bits that are available */ |
|
continue; |
|
if (vf) |
|
v = vf + i; |
|
if ( v && *v ) { |
|
seq_printf(m, "%-40s : %s %s\n", *v, |
|
avail & 0x1 ? (status & 0x1 ? |
|
"On " : "Off"): "", |
|
avail & 0x1 ? (control & 0x1 ? |
|
"Ctrl" : "NoCtrl"): ""); |
|
} else { |
|
seq_printf(m, "Feature set %2ld bit %2d\t\t\t" |
|
" : %s %s\n", |
|
set, i, |
|
avail & 0x1 ? (status & 0x1 ? |
|
"On " : "Off"): "", |
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avail & 0x1 ? (control & 0x1 ? |
|
"Ctrl" : "NoCtrl"): ""); |
|
} |
|
} |
|
} |
|
|
|
static int processor_info(struct seq_file *m) |
|
{ |
|
u64 avail=1, status=1, control=1, feature_set=0; |
|
s64 ret; |
|
|
|
do { |
|
ret = ia64_pal_proc_get_features(&avail, &status, &control, |
|
feature_set); |
|
if (ret < 0) |
|
return 0; |
|
|
|
if (ret == 1) { |
|
feature_set++; |
|
continue; |
|
} |
|
|
|
feature_set_info(m, avail, status, control, feature_set); |
|
feature_set++; |
|
} while(1); |
|
|
|
return 0; |
|
} |
|
|
|
static const char *const bus_features[]={ |
|
NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL, |
|
NULL,NULL,NULL,NULL,NULL,NULL,NULL, NULL,NULL, |
|
NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL, |
|
NULL,NULL, |
|
"Request Bus Parking", |
|
"Bus Lock Mask", |
|
"Enable Half Transfer", |
|
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
|
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
|
NULL, NULL, NULL, NULL, |
|
"Enable Cache Line Repl. Shared", |
|
"Enable Cache Line Repl. Exclusive", |
|
"Disable Transaction Queuing", |
|
"Disable Response Error Checking", |
|
"Disable Bus Error Checking", |
|
"Disable Bus Requester Internal Error Signalling", |
|
"Disable Bus Requester Error Signalling", |
|
"Disable Bus Initialization Event Checking", |
|
"Disable Bus Initialization Event Signalling", |
|
"Disable Bus Address Error Checking", |
|
"Disable Bus Address Error Signalling", |
|
"Disable Bus Data Error Checking" |
|
}; |
|
|
|
|
|
static int bus_info(struct seq_file *m) |
|
{ |
|
const char *const *v = bus_features; |
|
pal_bus_features_u_t av, st, ct; |
|
u64 avail, status, control; |
|
int i; |
|
s64 ret; |
|
|
|
if ((ret=ia64_pal_bus_get_features(&av, &st, &ct)) != 0) |
|
return 0; |
|
|
|
avail = av.pal_bus_features_val; |
|
status = st.pal_bus_features_val; |
|
control = ct.pal_bus_features_val; |
|
|
|
for(i=0; i < 64; i++, v++, avail >>=1, status >>=1, control >>=1) { |
|
if ( ! *v ) |
|
continue; |
|
seq_printf(m, "%-48s : %s%s %s\n", *v, |
|
avail & 0x1 ? "" : "NotImpl", |
|
avail & 0x1 ? (status & 0x1 ? "On" : "Off"): "", |
|
avail & 0x1 ? (control & 0x1 ? "Ctrl" : "NoCtrl"): ""); |
|
} |
|
return 0; |
|
} |
|
|
|
static int version_info(struct seq_file *m) |
|
{ |
|
pal_version_u_t min_ver, cur_ver; |
|
|
|
if (ia64_pal_version(&min_ver, &cur_ver) != 0) |
|
return 0; |
|
|
|
seq_printf(m, |
|
"PAL_vendor : 0x%02x (min=0x%02x)\n" |
|
"PAL_A : %02x.%02x (min=%02x.%02x)\n" |
|
"PAL_B : %02x.%02x (min=%02x.%02x)\n", |
|
cur_ver.pal_version_s.pv_pal_vendor, |
|
min_ver.pal_version_s.pv_pal_vendor, |
|
cur_ver.pal_version_s.pv_pal_a_model, |
|
cur_ver.pal_version_s.pv_pal_a_rev, |
|
min_ver.pal_version_s.pv_pal_a_model, |
|
min_ver.pal_version_s.pv_pal_a_rev, |
|
cur_ver.pal_version_s.pv_pal_b_model, |
|
cur_ver.pal_version_s.pv_pal_b_rev, |
|
min_ver.pal_version_s.pv_pal_b_model, |
|
min_ver.pal_version_s.pv_pal_b_rev); |
|
return 0; |
|
} |
|
|
|
static int frequency_info(struct seq_file *m) |
|
{ |
|
struct pal_freq_ratio proc, itc, bus; |
|
unsigned long base; |
|
|
|
if (ia64_pal_freq_base(&base) == -1) |
|
seq_puts(m, "Output clock : not implemented\n"); |
|
else |
|
seq_printf(m, "Output clock : %ld ticks/s\n", base); |
|
|
|
if (ia64_pal_freq_ratios(&proc, &bus, &itc) != 0) return 0; |
|
|
|
seq_printf(m, |
|
"Processor/Clock ratio : %d/%d\n" |
|
"Bus/Clock ratio : %d/%d\n" |
|
"ITC/Clock ratio : %d/%d\n", |
|
proc.num, proc.den, bus.num, bus.den, itc.num, itc.den); |
|
return 0; |
|
} |
|
|
|
static int tr_info(struct seq_file *m) |
|
{ |
|
long status; |
|
pal_tr_valid_u_t tr_valid; |
|
u64 tr_buffer[4]; |
|
pal_vm_info_1_u_t vm_info_1; |
|
pal_vm_info_2_u_t vm_info_2; |
|
unsigned long i, j; |
|
unsigned long max[3], pgm; |
|
struct ifa_reg { |
|
unsigned long valid:1; |
|
unsigned long ig:11; |
|
unsigned long vpn:52; |
|
} *ifa_reg; |
|
struct itir_reg { |
|
unsigned long rv1:2; |
|
unsigned long ps:6; |
|
unsigned long key:24; |
|
unsigned long rv2:32; |
|
} *itir_reg; |
|
struct gr_reg { |
|
unsigned long p:1; |
|
unsigned long rv1:1; |
|
unsigned long ma:3; |
|
unsigned long a:1; |
|
unsigned long d:1; |
|
unsigned long pl:2; |
|
unsigned long ar:3; |
|
unsigned long ppn:38; |
|
unsigned long rv2:2; |
|
unsigned long ed:1; |
|
unsigned long ig:11; |
|
} *gr_reg; |
|
struct rid_reg { |
|
unsigned long ig1:1; |
|
unsigned long rv1:1; |
|
unsigned long ig2:6; |
|
unsigned long rid:24; |
|
unsigned long rv2:32; |
|
} *rid_reg; |
|
|
|
if ((status = ia64_pal_vm_summary(&vm_info_1, &vm_info_2)) !=0) { |
|
printk(KERN_ERR "ia64_pal_vm_summary=%ld\n", status); |
|
return 0; |
|
} |
|
max[0] = vm_info_1.pal_vm_info_1_s.max_itr_entry+1; |
|
max[1] = vm_info_1.pal_vm_info_1_s.max_dtr_entry+1; |
|
|
|
for (i=0; i < 2; i++ ) { |
|
for (j=0; j < max[i]; j++) { |
|
|
|
status = ia64_pal_tr_read(j, i, tr_buffer, &tr_valid); |
|
if (status != 0) { |
|
printk(KERN_ERR "palinfo: pal call failed on tr[%lu:%lu]=%ld\n", |
|
i, j, status); |
|
continue; |
|
} |
|
|
|
ifa_reg = (struct ifa_reg *)&tr_buffer[2]; |
|
|
|
if (ifa_reg->valid == 0) |
|
continue; |
|
|
|
gr_reg = (struct gr_reg *)tr_buffer; |
|
itir_reg = (struct itir_reg *)&tr_buffer[1]; |
|
rid_reg = (struct rid_reg *)&tr_buffer[3]; |
|
|
|
pgm = -1 << (itir_reg->ps - 12); |
|
seq_printf(m, |
|
"%cTR%lu: av=%d pv=%d dv=%d mv=%d\n" |
|
"\tppn : 0x%lx\n" |
|
"\tvpn : 0x%lx\n" |
|
"\tps : ", |
|
"ID"[i], j, |
|
tr_valid.pal_tr_valid_s.access_rights_valid, |
|
tr_valid.pal_tr_valid_s.priv_level_valid, |
|
tr_valid.pal_tr_valid_s.dirty_bit_valid, |
|
tr_valid.pal_tr_valid_s.mem_attr_valid, |
|
(gr_reg->ppn & pgm)<< 12, (ifa_reg->vpn & pgm)<< 12); |
|
|
|
bitvector_process(m, 1<< itir_reg->ps); |
|
|
|
seq_printf(m, |
|
"\n\tpl : %d\n" |
|
"\tar : %d\n" |
|
"\trid : %x\n" |
|
"\tp : %d\n" |
|
"\tma : %d\n" |
|
"\td : %d\n", |
|
gr_reg->pl, gr_reg->ar, rid_reg->rid, gr_reg->p, gr_reg->ma, |
|
gr_reg->d); |
|
} |
|
} |
|
return 0; |
|
} |
|
|
|
|
|
|
|
/* |
|
* List {name,function} pairs for every entry in /proc/palinfo/cpu* |
|
*/ |
|
static const palinfo_entry_t palinfo_entries[]={ |
|
{ "version_info", version_info, }, |
|
{ "vm_info", vm_info, }, |
|
{ "cache_info", cache_info, }, |
|
{ "power_info", power_info, }, |
|
{ "register_info", register_info, }, |
|
{ "processor_info", processor_info, }, |
|
{ "frequency_info", frequency_info, }, |
|
{ "bus_info", bus_info }, |
|
{ "tr_info", tr_info, } |
|
}; |
|
|
|
#define NR_PALINFO_ENTRIES (int) ARRAY_SIZE(palinfo_entries) |
|
|
|
static struct proc_dir_entry *palinfo_dir; |
|
|
|
/* |
|
* This data structure is used to pass which cpu,function is being requested |
|
* It must fit in a 64bit quantity to be passed to the proc callback routine |
|
* |
|
* In SMP mode, when we get a request for another CPU, we must call that |
|
* other CPU using IPI and wait for the result before returning. |
|
*/ |
|
typedef union { |
|
u64 value; |
|
struct { |
|
unsigned req_cpu: 32; /* for which CPU this info is */ |
|
unsigned func_id: 32; /* which function is requested */ |
|
} pal_func_cpu; |
|
} pal_func_cpu_u_t; |
|
|
|
#define req_cpu pal_func_cpu.req_cpu |
|
#define func_id pal_func_cpu.func_id |
|
|
|
#ifdef CONFIG_SMP |
|
|
|
/* |
|
* used to hold information about final function to call |
|
*/ |
|
typedef struct { |
|
palinfo_func_t func; /* pointer to function to call */ |
|
struct seq_file *m; /* buffer to store results */ |
|
int ret; /* return value from call */ |
|
} palinfo_smp_data_t; |
|
|
|
|
|
/* |
|
* this function does the actual final call and he called |
|
* from the smp code, i.e., this is the palinfo callback routine |
|
*/ |
|
static void |
|
palinfo_smp_call(void *info) |
|
{ |
|
palinfo_smp_data_t *data = (palinfo_smp_data_t *)info; |
|
data->ret = (*data->func)(data->m); |
|
} |
|
|
|
/* |
|
* function called to trigger the IPI, we need to access a remote CPU |
|
* Return: |
|
* 0 : error or nothing to output |
|
* otherwise how many bytes in the "page" buffer were written |
|
*/ |
|
static |
|
int palinfo_handle_smp(struct seq_file *m, pal_func_cpu_u_t *f) |
|
{ |
|
palinfo_smp_data_t ptr; |
|
int ret; |
|
|
|
ptr.func = palinfo_entries[f->func_id].proc_read; |
|
ptr.m = m; |
|
ptr.ret = 0; /* just in case */ |
|
|
|
|
|
/* will send IPI to other CPU and wait for completion of remote call */ |
|
if ((ret=smp_call_function_single(f->req_cpu, palinfo_smp_call, &ptr, 1))) { |
|
printk(KERN_ERR "palinfo: remote CPU call from %d to %d on function %d: " |
|
"error %d\n", smp_processor_id(), f->req_cpu, f->func_id, ret); |
|
return 0; |
|
} |
|
return ptr.ret; |
|
} |
|
#else /* ! CONFIG_SMP */ |
|
static |
|
int palinfo_handle_smp(struct seq_file *m, pal_func_cpu_u_t *f) |
|
{ |
|
printk(KERN_ERR "palinfo: should not be called with non SMP kernel\n"); |
|
return 0; |
|
} |
|
#endif /* CONFIG_SMP */ |
|
|
|
/* |
|
* Entry point routine: all calls go through this function |
|
*/ |
|
static int proc_palinfo_show(struct seq_file *m, void *v) |
|
{ |
|
pal_func_cpu_u_t *f = (pal_func_cpu_u_t *)&m->private; |
|
|
|
/* |
|
* in SMP mode, we may need to call another CPU to get correct |
|
* information. PAL, by definition, is processor specific |
|
*/ |
|
if (f->req_cpu == get_cpu()) |
|
(*palinfo_entries[f->func_id].proc_read)(m); |
|
else |
|
palinfo_handle_smp(m, f); |
|
|
|
put_cpu(); |
|
return 0; |
|
} |
|
|
|
static int palinfo_add_proc(unsigned int cpu) |
|
{ |
|
pal_func_cpu_u_t f; |
|
struct proc_dir_entry *cpu_dir; |
|
int j; |
|
char cpustr[3+4+1]; /* cpu numbers are up to 4095 on itanic */ |
|
sprintf(cpustr, "cpu%d", cpu); |
|
|
|
cpu_dir = proc_mkdir(cpustr, palinfo_dir); |
|
if (!cpu_dir) |
|
return -EINVAL; |
|
|
|
f.req_cpu = cpu; |
|
|
|
for (j=0; j < NR_PALINFO_ENTRIES; j++) { |
|
f.func_id = j; |
|
proc_create_single_data(palinfo_entries[j].name, 0, cpu_dir, |
|
proc_palinfo_show, (void *)f.value); |
|
} |
|
return 0; |
|
} |
|
|
|
static int palinfo_del_proc(unsigned int hcpu) |
|
{ |
|
char cpustr[3+4+1]; /* cpu numbers are up to 4095 on itanic */ |
|
|
|
sprintf(cpustr, "cpu%d", hcpu); |
|
remove_proc_subtree(cpustr, palinfo_dir); |
|
return 0; |
|
} |
|
|
|
static enum cpuhp_state hp_online; |
|
|
|
static int __init palinfo_init(void) |
|
{ |
|
int i = 0; |
|
|
|
printk(KERN_INFO "PAL Information Facility v%s\n", PALINFO_VERSION); |
|
palinfo_dir = proc_mkdir("pal", NULL); |
|
if (!palinfo_dir) |
|
return -ENOMEM; |
|
|
|
i = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "ia64/palinfo:online", |
|
palinfo_add_proc, palinfo_del_proc); |
|
if (i < 0) { |
|
remove_proc_subtree("pal", NULL); |
|
return i; |
|
} |
|
hp_online = i; |
|
return 0; |
|
} |
|
|
|
static void __exit palinfo_exit(void) |
|
{ |
|
cpuhp_remove_state(hp_online); |
|
remove_proc_subtree("pal", NULL); |
|
} |
|
|
|
module_init(palinfo_init); |
|
module_exit(palinfo_exit);
|
|
|