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1179 lines
29 KiB
1179 lines
29 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Stand-alone page-table allocator for hyp stage-1 and guest stage-2. |
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* No bombay mix was harmed in the writing of this file. |
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* |
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* Copyright (C) 2020 Google LLC |
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* Author: Will Deacon <[email protected]> |
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*/ |
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#include <linux/bitfield.h> |
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#include <asm/kvm_pgtable.h> |
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#include <asm/stage2_pgtable.h> |
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#define KVM_PTE_TYPE BIT(1) |
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#define KVM_PTE_TYPE_BLOCK 0 |
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#define KVM_PTE_TYPE_PAGE 1 |
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#define KVM_PTE_TYPE_TABLE 1 |
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#define KVM_PTE_LEAF_ATTR_LO GENMASK(11, 2) |
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#define KVM_PTE_LEAF_ATTR_LO_S1_ATTRIDX GENMASK(4, 2) |
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#define KVM_PTE_LEAF_ATTR_LO_S1_AP GENMASK(7, 6) |
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#define KVM_PTE_LEAF_ATTR_LO_S1_AP_RO 3 |
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#define KVM_PTE_LEAF_ATTR_LO_S1_AP_RW 1 |
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#define KVM_PTE_LEAF_ATTR_LO_S1_SH GENMASK(9, 8) |
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#define KVM_PTE_LEAF_ATTR_LO_S1_SH_IS 3 |
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#define KVM_PTE_LEAF_ATTR_LO_S1_AF BIT(10) |
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#define KVM_PTE_LEAF_ATTR_LO_S2_MEMATTR GENMASK(5, 2) |
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#define KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R BIT(6) |
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#define KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W BIT(7) |
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#define KVM_PTE_LEAF_ATTR_LO_S2_SH GENMASK(9, 8) |
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#define KVM_PTE_LEAF_ATTR_LO_S2_SH_IS 3 |
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#define KVM_PTE_LEAF_ATTR_LO_S2_AF BIT(10) |
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#define KVM_PTE_LEAF_ATTR_HI GENMASK(63, 51) |
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#define KVM_PTE_LEAF_ATTR_HI_SW GENMASK(58, 55) |
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#define KVM_PTE_LEAF_ATTR_HI_S1_XN BIT(54) |
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#define KVM_PTE_LEAF_ATTR_HI_S2_XN BIT(54) |
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#define KVM_PTE_LEAF_ATTR_S2_PERMS (KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R | \ |
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KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W | \ |
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KVM_PTE_LEAF_ATTR_HI_S2_XN) |
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#define KVM_INVALID_PTE_OWNER_MASK GENMASK(9, 2) |
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#define KVM_MAX_OWNER_ID 1 |
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struct kvm_pgtable_walk_data { |
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struct kvm_pgtable *pgt; |
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struct kvm_pgtable_walker *walker; |
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u64 addr; |
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u64 end; |
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}; |
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#define KVM_PHYS_INVALID (-1ULL) |
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static bool kvm_phys_is_valid(u64 phys) |
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{ |
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return phys < BIT(id_aa64mmfr0_parange_to_phys_shift(ID_AA64MMFR0_PARANGE_MAX)); |
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} |
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static bool kvm_block_mapping_supported(u64 addr, u64 end, u64 phys, u32 level) |
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{ |
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u64 granule = kvm_granule_size(level); |
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if (!kvm_level_supports_block_mapping(level)) |
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return false; |
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if (granule > (end - addr)) |
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return false; |
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if (kvm_phys_is_valid(phys) && !IS_ALIGNED(phys, granule)) |
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return false; |
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return IS_ALIGNED(addr, granule); |
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} |
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static u32 kvm_pgtable_idx(struct kvm_pgtable_walk_data *data, u32 level) |
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{ |
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u64 shift = kvm_granule_shift(level); |
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u64 mask = BIT(PAGE_SHIFT - 3) - 1; |
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return (data->addr >> shift) & mask; |
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} |
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static u32 __kvm_pgd_page_idx(struct kvm_pgtable *pgt, u64 addr) |
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{ |
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u64 shift = kvm_granule_shift(pgt->start_level - 1); /* May underflow */ |
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u64 mask = BIT(pgt->ia_bits) - 1; |
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return (addr & mask) >> shift; |
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} |
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static u32 kvm_pgd_page_idx(struct kvm_pgtable_walk_data *data) |
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{ |
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return __kvm_pgd_page_idx(data->pgt, data->addr); |
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} |
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static u32 kvm_pgd_pages(u32 ia_bits, u32 start_level) |
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{ |
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struct kvm_pgtable pgt = { |
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.ia_bits = ia_bits, |
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.start_level = start_level, |
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}; |
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return __kvm_pgd_page_idx(&pgt, -1ULL) + 1; |
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} |
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static bool kvm_pte_table(kvm_pte_t pte, u32 level) |
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{ |
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if (level == KVM_PGTABLE_MAX_LEVELS - 1) |
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return false; |
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if (!kvm_pte_valid(pte)) |
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return false; |
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return FIELD_GET(KVM_PTE_TYPE, pte) == KVM_PTE_TYPE_TABLE; |
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} |
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static kvm_pte_t kvm_phys_to_pte(u64 pa) |
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{ |
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kvm_pte_t pte = pa & KVM_PTE_ADDR_MASK; |
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if (PAGE_SHIFT == 16) |
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pte |= FIELD_PREP(KVM_PTE_ADDR_51_48, pa >> 48); |
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return pte; |
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} |
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static kvm_pte_t *kvm_pte_follow(kvm_pte_t pte, struct kvm_pgtable_mm_ops *mm_ops) |
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{ |
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return mm_ops->phys_to_virt(kvm_pte_to_phys(pte)); |
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} |
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static void kvm_clear_pte(kvm_pte_t *ptep) |
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{ |
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WRITE_ONCE(*ptep, 0); |
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} |
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static void kvm_set_table_pte(kvm_pte_t *ptep, kvm_pte_t *childp, |
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struct kvm_pgtable_mm_ops *mm_ops) |
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{ |
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kvm_pte_t old = *ptep, pte = kvm_phys_to_pte(mm_ops->virt_to_phys(childp)); |
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pte |= FIELD_PREP(KVM_PTE_TYPE, KVM_PTE_TYPE_TABLE); |
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pte |= KVM_PTE_VALID; |
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WARN_ON(kvm_pte_valid(old)); |
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smp_store_release(ptep, pte); |
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} |
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static kvm_pte_t kvm_init_valid_leaf_pte(u64 pa, kvm_pte_t attr, u32 level) |
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{ |
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kvm_pte_t pte = kvm_phys_to_pte(pa); |
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u64 type = (level == KVM_PGTABLE_MAX_LEVELS - 1) ? KVM_PTE_TYPE_PAGE : |
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KVM_PTE_TYPE_BLOCK; |
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pte |= attr & (KVM_PTE_LEAF_ATTR_LO | KVM_PTE_LEAF_ATTR_HI); |
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pte |= FIELD_PREP(KVM_PTE_TYPE, type); |
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pte |= KVM_PTE_VALID; |
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return pte; |
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} |
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static kvm_pte_t kvm_init_invalid_leaf_owner(u8 owner_id) |
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{ |
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return FIELD_PREP(KVM_INVALID_PTE_OWNER_MASK, owner_id); |
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} |
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static int kvm_pgtable_visitor_cb(struct kvm_pgtable_walk_data *data, u64 addr, |
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u32 level, kvm_pte_t *ptep, |
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enum kvm_pgtable_walk_flags flag) |
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{ |
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struct kvm_pgtable_walker *walker = data->walker; |
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return walker->cb(addr, data->end, level, ptep, flag, walker->arg); |
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} |
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static int __kvm_pgtable_walk(struct kvm_pgtable_walk_data *data, |
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kvm_pte_t *pgtable, u32 level); |
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static inline int __kvm_pgtable_visit(struct kvm_pgtable_walk_data *data, |
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kvm_pte_t *ptep, u32 level) |
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{ |
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int ret = 0; |
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u64 addr = data->addr; |
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kvm_pte_t *childp, pte = *ptep; |
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bool table = kvm_pte_table(pte, level); |
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enum kvm_pgtable_walk_flags flags = data->walker->flags; |
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if (table && (flags & KVM_PGTABLE_WALK_TABLE_PRE)) { |
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ret = kvm_pgtable_visitor_cb(data, addr, level, ptep, |
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KVM_PGTABLE_WALK_TABLE_PRE); |
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} |
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if (!table && (flags & KVM_PGTABLE_WALK_LEAF)) { |
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ret = kvm_pgtable_visitor_cb(data, addr, level, ptep, |
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KVM_PGTABLE_WALK_LEAF); |
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pte = *ptep; |
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table = kvm_pte_table(pte, level); |
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} |
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if (ret) |
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goto out; |
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if (!table) { |
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data->addr = ALIGN_DOWN(data->addr, kvm_granule_size(level)); |
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data->addr += kvm_granule_size(level); |
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goto out; |
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} |
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childp = kvm_pte_follow(pte, data->pgt->mm_ops); |
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ret = __kvm_pgtable_walk(data, childp, level + 1); |
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if (ret) |
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goto out; |
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if (flags & KVM_PGTABLE_WALK_TABLE_POST) { |
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ret = kvm_pgtable_visitor_cb(data, addr, level, ptep, |
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KVM_PGTABLE_WALK_TABLE_POST); |
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} |
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out: |
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return ret; |
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} |
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static int __kvm_pgtable_walk(struct kvm_pgtable_walk_data *data, |
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kvm_pte_t *pgtable, u32 level) |
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{ |
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u32 idx; |
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int ret = 0; |
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if (WARN_ON_ONCE(level >= KVM_PGTABLE_MAX_LEVELS)) |
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return -EINVAL; |
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for (idx = kvm_pgtable_idx(data, level); idx < PTRS_PER_PTE; ++idx) { |
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kvm_pte_t *ptep = &pgtable[idx]; |
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if (data->addr >= data->end) |
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break; |
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ret = __kvm_pgtable_visit(data, ptep, level); |
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if (ret) |
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break; |
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} |
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return ret; |
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} |
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static int _kvm_pgtable_walk(struct kvm_pgtable_walk_data *data) |
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{ |
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u32 idx; |
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int ret = 0; |
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struct kvm_pgtable *pgt = data->pgt; |
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u64 limit = BIT(pgt->ia_bits); |
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if (data->addr > limit || data->end > limit) |
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return -ERANGE; |
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if (!pgt->pgd) |
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return -EINVAL; |
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for (idx = kvm_pgd_page_idx(data); data->addr < data->end; ++idx) { |
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kvm_pte_t *ptep = &pgt->pgd[idx * PTRS_PER_PTE]; |
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ret = __kvm_pgtable_walk(data, ptep, pgt->start_level); |
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if (ret) |
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break; |
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} |
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return ret; |
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} |
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int kvm_pgtable_walk(struct kvm_pgtable *pgt, u64 addr, u64 size, |
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struct kvm_pgtable_walker *walker) |
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{ |
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struct kvm_pgtable_walk_data walk_data = { |
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.pgt = pgt, |
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.addr = ALIGN_DOWN(addr, PAGE_SIZE), |
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.end = PAGE_ALIGN(walk_data.addr + size), |
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.walker = walker, |
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}; |
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return _kvm_pgtable_walk(&walk_data); |
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} |
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struct leaf_walk_data { |
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kvm_pte_t pte; |
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u32 level; |
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}; |
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static int leaf_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep, |
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enum kvm_pgtable_walk_flags flag, void * const arg) |
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{ |
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struct leaf_walk_data *data = arg; |
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data->pte = *ptep; |
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data->level = level; |
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return 0; |
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} |
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int kvm_pgtable_get_leaf(struct kvm_pgtable *pgt, u64 addr, |
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kvm_pte_t *ptep, u32 *level) |
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{ |
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struct leaf_walk_data data; |
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struct kvm_pgtable_walker walker = { |
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.cb = leaf_walker, |
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.flags = KVM_PGTABLE_WALK_LEAF, |
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.arg = &data, |
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}; |
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int ret; |
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ret = kvm_pgtable_walk(pgt, ALIGN_DOWN(addr, PAGE_SIZE), |
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PAGE_SIZE, &walker); |
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if (!ret) { |
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if (ptep) |
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*ptep = data.pte; |
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if (level) |
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*level = data.level; |
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} |
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return ret; |
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} |
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struct hyp_map_data { |
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u64 phys; |
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kvm_pte_t attr; |
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struct kvm_pgtable_mm_ops *mm_ops; |
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}; |
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static int hyp_set_prot_attr(enum kvm_pgtable_prot prot, kvm_pte_t *ptep) |
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{ |
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bool device = prot & KVM_PGTABLE_PROT_DEVICE; |
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u32 mtype = device ? MT_DEVICE_nGnRE : MT_NORMAL; |
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kvm_pte_t attr = FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_ATTRIDX, mtype); |
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u32 sh = KVM_PTE_LEAF_ATTR_LO_S1_SH_IS; |
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u32 ap = (prot & KVM_PGTABLE_PROT_W) ? KVM_PTE_LEAF_ATTR_LO_S1_AP_RW : |
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KVM_PTE_LEAF_ATTR_LO_S1_AP_RO; |
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if (!(prot & KVM_PGTABLE_PROT_R)) |
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return -EINVAL; |
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if (prot & KVM_PGTABLE_PROT_X) { |
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if (prot & KVM_PGTABLE_PROT_W) |
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return -EINVAL; |
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if (device) |
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return -EINVAL; |
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} else { |
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attr |= KVM_PTE_LEAF_ATTR_HI_S1_XN; |
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} |
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attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_AP, ap); |
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attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_SH, sh); |
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attr |= KVM_PTE_LEAF_ATTR_LO_S1_AF; |
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attr |= prot & KVM_PTE_LEAF_ATTR_HI_SW; |
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*ptep = attr; |
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return 0; |
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} |
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enum kvm_pgtable_prot kvm_pgtable_hyp_pte_prot(kvm_pte_t pte) |
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{ |
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enum kvm_pgtable_prot prot = pte & KVM_PTE_LEAF_ATTR_HI_SW; |
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u32 ap; |
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if (!kvm_pte_valid(pte)) |
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return prot; |
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if (!(pte & KVM_PTE_LEAF_ATTR_HI_S1_XN)) |
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prot |= KVM_PGTABLE_PROT_X; |
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ap = FIELD_GET(KVM_PTE_LEAF_ATTR_LO_S1_AP, pte); |
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if (ap == KVM_PTE_LEAF_ATTR_LO_S1_AP_RO) |
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prot |= KVM_PGTABLE_PROT_R; |
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else if (ap == KVM_PTE_LEAF_ATTR_LO_S1_AP_RW) |
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prot |= KVM_PGTABLE_PROT_RW; |
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return prot; |
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} |
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static bool hyp_pte_needs_update(kvm_pte_t old, kvm_pte_t new) |
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{ |
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/* |
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* Tolerate KVM recreating the exact same mapping, or changing software |
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* bits if the existing mapping was valid. |
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*/ |
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if (old == new) |
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return false; |
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if (!kvm_pte_valid(old)) |
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return true; |
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return !WARN_ON((old ^ new) & ~KVM_PTE_LEAF_ATTR_HI_SW); |
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} |
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static bool hyp_map_walker_try_leaf(u64 addr, u64 end, u32 level, |
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kvm_pte_t *ptep, struct hyp_map_data *data) |
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{ |
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kvm_pte_t new, old = *ptep; |
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u64 granule = kvm_granule_size(level), phys = data->phys; |
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if (!kvm_block_mapping_supported(addr, end, phys, level)) |
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return false; |
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new = kvm_init_valid_leaf_pte(phys, data->attr, level); |
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if (hyp_pte_needs_update(old, new)) |
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smp_store_release(ptep, new); |
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data->phys += granule; |
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return true; |
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} |
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static int hyp_map_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep, |
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enum kvm_pgtable_walk_flags flag, void * const arg) |
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{ |
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kvm_pte_t *childp; |
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struct hyp_map_data *data = arg; |
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struct kvm_pgtable_mm_ops *mm_ops = data->mm_ops; |
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if (hyp_map_walker_try_leaf(addr, end, level, ptep, arg)) |
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return 0; |
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if (WARN_ON(level == KVM_PGTABLE_MAX_LEVELS - 1)) |
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return -EINVAL; |
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childp = (kvm_pte_t *)mm_ops->zalloc_page(NULL); |
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if (!childp) |
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return -ENOMEM; |
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kvm_set_table_pte(ptep, childp, mm_ops); |
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return 0; |
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} |
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int kvm_pgtable_hyp_map(struct kvm_pgtable *pgt, u64 addr, u64 size, u64 phys, |
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enum kvm_pgtable_prot prot) |
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{ |
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int ret; |
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struct hyp_map_data map_data = { |
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.phys = ALIGN_DOWN(phys, PAGE_SIZE), |
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.mm_ops = pgt->mm_ops, |
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}; |
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struct kvm_pgtable_walker walker = { |
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.cb = hyp_map_walker, |
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.flags = KVM_PGTABLE_WALK_LEAF, |
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.arg = &map_data, |
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}; |
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ret = hyp_set_prot_attr(prot, &map_data.attr); |
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if (ret) |
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return ret; |
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ret = kvm_pgtable_walk(pgt, addr, size, &walker); |
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dsb(ishst); |
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isb(); |
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return ret; |
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} |
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int kvm_pgtable_hyp_init(struct kvm_pgtable *pgt, u32 va_bits, |
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struct kvm_pgtable_mm_ops *mm_ops) |
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{ |
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u64 levels = ARM64_HW_PGTABLE_LEVELS(va_bits); |
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pgt->pgd = (kvm_pte_t *)mm_ops->zalloc_page(NULL); |
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if (!pgt->pgd) |
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return -ENOMEM; |
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pgt->ia_bits = va_bits; |
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pgt->start_level = KVM_PGTABLE_MAX_LEVELS - levels; |
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pgt->mm_ops = mm_ops; |
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pgt->mmu = NULL; |
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pgt->force_pte_cb = NULL; |
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return 0; |
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} |
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static int hyp_free_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep, |
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enum kvm_pgtable_walk_flags flag, void * const arg) |
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{ |
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struct kvm_pgtable_mm_ops *mm_ops = arg; |
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|
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mm_ops->put_page((void *)kvm_pte_follow(*ptep, mm_ops)); |
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return 0; |
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} |
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void kvm_pgtable_hyp_destroy(struct kvm_pgtable *pgt) |
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{ |
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struct kvm_pgtable_walker walker = { |
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.cb = hyp_free_walker, |
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.flags = KVM_PGTABLE_WALK_TABLE_POST, |
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.arg = pgt->mm_ops, |
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}; |
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WARN_ON(kvm_pgtable_walk(pgt, 0, BIT(pgt->ia_bits), &walker)); |
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pgt->mm_ops->put_page(pgt->pgd); |
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pgt->pgd = NULL; |
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} |
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struct stage2_map_data { |
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u64 phys; |
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kvm_pte_t attr; |
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u8 owner_id; |
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|
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kvm_pte_t *anchor; |
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kvm_pte_t *childp; |
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|
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struct kvm_s2_mmu *mmu; |
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void *memcache; |
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|
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struct kvm_pgtable_mm_ops *mm_ops; |
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|
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/* Force mappings to page granularity */ |
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bool force_pte; |
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}; |
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|
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u64 kvm_get_vtcr(u64 mmfr0, u64 mmfr1, u32 phys_shift) |
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{ |
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u64 vtcr = VTCR_EL2_FLAGS; |
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u8 lvls; |
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|
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vtcr |= kvm_get_parange(mmfr0) << VTCR_EL2_PS_SHIFT; |
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vtcr |= VTCR_EL2_T0SZ(phys_shift); |
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/* |
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* Use a minimum 2 level page table to prevent splitting |
|
* host PMD huge pages at stage2. |
|
*/ |
|
lvls = stage2_pgtable_levels(phys_shift); |
|
if (lvls < 2) |
|
lvls = 2; |
|
vtcr |= VTCR_EL2_LVLS_TO_SL0(lvls); |
|
|
|
/* |
|
* Enable the Hardware Access Flag management, unconditionally |
|
* on all CPUs. The features is RES0 on CPUs without the support |
|
* and must be ignored by the CPUs. |
|
*/ |
|
vtcr |= VTCR_EL2_HA; |
|
|
|
/* Set the vmid bits */ |
|
vtcr |= (get_vmid_bits(mmfr1) == 16) ? |
|
VTCR_EL2_VS_16BIT : |
|
VTCR_EL2_VS_8BIT; |
|
|
|
return vtcr; |
|
} |
|
|
|
static bool stage2_has_fwb(struct kvm_pgtable *pgt) |
|
{ |
|
if (!cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) |
|
return false; |
|
|
|
return !(pgt->flags & KVM_PGTABLE_S2_NOFWB); |
|
} |
|
|
|
#define KVM_S2_MEMATTR(pgt, attr) PAGE_S2_MEMATTR(attr, stage2_has_fwb(pgt)) |
|
|
|
static int stage2_set_prot_attr(struct kvm_pgtable *pgt, enum kvm_pgtable_prot prot, |
|
kvm_pte_t *ptep) |
|
{ |
|
bool device = prot & KVM_PGTABLE_PROT_DEVICE; |
|
kvm_pte_t attr = device ? KVM_S2_MEMATTR(pgt, DEVICE_nGnRE) : |
|
KVM_S2_MEMATTR(pgt, NORMAL); |
|
u32 sh = KVM_PTE_LEAF_ATTR_LO_S2_SH_IS; |
|
|
|
if (!(prot & KVM_PGTABLE_PROT_X)) |
|
attr |= KVM_PTE_LEAF_ATTR_HI_S2_XN; |
|
else if (device) |
|
return -EINVAL; |
|
|
|
if (prot & KVM_PGTABLE_PROT_R) |
|
attr |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R; |
|
|
|
if (prot & KVM_PGTABLE_PROT_W) |
|
attr |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W; |
|
|
|
attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S2_SH, sh); |
|
attr |= KVM_PTE_LEAF_ATTR_LO_S2_AF; |
|
attr |= prot & KVM_PTE_LEAF_ATTR_HI_SW; |
|
*ptep = attr; |
|
|
|
return 0; |
|
} |
|
|
|
enum kvm_pgtable_prot kvm_pgtable_stage2_pte_prot(kvm_pte_t pte) |
|
{ |
|
enum kvm_pgtable_prot prot = pte & KVM_PTE_LEAF_ATTR_HI_SW; |
|
|
|
if (!kvm_pte_valid(pte)) |
|
return prot; |
|
|
|
if (pte & KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R) |
|
prot |= KVM_PGTABLE_PROT_R; |
|
if (pte & KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W) |
|
prot |= KVM_PGTABLE_PROT_W; |
|
if (!(pte & KVM_PTE_LEAF_ATTR_HI_S2_XN)) |
|
prot |= KVM_PGTABLE_PROT_X; |
|
|
|
return prot; |
|
} |
|
|
|
static bool stage2_pte_needs_update(kvm_pte_t old, kvm_pte_t new) |
|
{ |
|
if (!kvm_pte_valid(old) || !kvm_pte_valid(new)) |
|
return true; |
|
|
|
return ((old ^ new) & (~KVM_PTE_LEAF_ATTR_S2_PERMS)); |
|
} |
|
|
|
static bool stage2_pte_is_counted(kvm_pte_t pte) |
|
{ |
|
/* |
|
* The refcount tracks valid entries as well as invalid entries if they |
|
* encode ownership of a page to another entity than the page-table |
|
* owner, whose id is 0. |
|
*/ |
|
return !!pte; |
|
} |
|
|
|
static void stage2_put_pte(kvm_pte_t *ptep, struct kvm_s2_mmu *mmu, u64 addr, |
|
u32 level, struct kvm_pgtable_mm_ops *mm_ops) |
|
{ |
|
/* |
|
* Clear the existing PTE, and perform break-before-make with |
|
* TLB maintenance if it was valid. |
|
*/ |
|
if (kvm_pte_valid(*ptep)) { |
|
kvm_clear_pte(ptep); |
|
kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, addr, level); |
|
} |
|
|
|
mm_ops->put_page(ptep); |
|
} |
|
|
|
static bool stage2_pte_cacheable(struct kvm_pgtable *pgt, kvm_pte_t pte) |
|
{ |
|
u64 memattr = pte & KVM_PTE_LEAF_ATTR_LO_S2_MEMATTR; |
|
return memattr == KVM_S2_MEMATTR(pgt, NORMAL); |
|
} |
|
|
|
static bool stage2_pte_executable(kvm_pte_t pte) |
|
{ |
|
return !(pte & KVM_PTE_LEAF_ATTR_HI_S2_XN); |
|
} |
|
|
|
static bool stage2_leaf_mapping_allowed(u64 addr, u64 end, u32 level, |
|
struct stage2_map_data *data) |
|
{ |
|
if (data->force_pte && (level < (KVM_PGTABLE_MAX_LEVELS - 1))) |
|
return false; |
|
|
|
return kvm_block_mapping_supported(addr, end, data->phys, level); |
|
} |
|
|
|
static int stage2_map_walker_try_leaf(u64 addr, u64 end, u32 level, |
|
kvm_pte_t *ptep, |
|
struct stage2_map_data *data) |
|
{ |
|
kvm_pte_t new, old = *ptep; |
|
u64 granule = kvm_granule_size(level), phys = data->phys; |
|
struct kvm_pgtable *pgt = data->mmu->pgt; |
|
struct kvm_pgtable_mm_ops *mm_ops = data->mm_ops; |
|
|
|
if (!stage2_leaf_mapping_allowed(addr, end, level, data)) |
|
return -E2BIG; |
|
|
|
if (kvm_phys_is_valid(phys)) |
|
new = kvm_init_valid_leaf_pte(phys, data->attr, level); |
|
else |
|
new = kvm_init_invalid_leaf_owner(data->owner_id); |
|
|
|
if (stage2_pte_is_counted(old)) { |
|
/* |
|
* Skip updating the PTE if we are trying to recreate the exact |
|
* same mapping or only change the access permissions. Instead, |
|
* the vCPU will exit one more time from guest if still needed |
|
* and then go through the path of relaxing permissions. |
|
*/ |
|
if (!stage2_pte_needs_update(old, new)) |
|
return -EAGAIN; |
|
|
|
stage2_put_pte(ptep, data->mmu, addr, level, mm_ops); |
|
} |
|
|
|
/* Perform CMOs before installation of the guest stage-2 PTE */ |
|
if (mm_ops->dcache_clean_inval_poc && stage2_pte_cacheable(pgt, new)) |
|
mm_ops->dcache_clean_inval_poc(kvm_pte_follow(new, mm_ops), |
|
granule); |
|
|
|
if (mm_ops->icache_inval_pou && stage2_pte_executable(new)) |
|
mm_ops->icache_inval_pou(kvm_pte_follow(new, mm_ops), granule); |
|
|
|
smp_store_release(ptep, new); |
|
if (stage2_pte_is_counted(new)) |
|
mm_ops->get_page(ptep); |
|
if (kvm_phys_is_valid(phys)) |
|
data->phys += granule; |
|
return 0; |
|
} |
|
|
|
static int stage2_map_walk_table_pre(u64 addr, u64 end, u32 level, |
|
kvm_pte_t *ptep, |
|
struct stage2_map_data *data) |
|
{ |
|
if (data->anchor) |
|
return 0; |
|
|
|
if (!stage2_leaf_mapping_allowed(addr, end, level, data)) |
|
return 0; |
|
|
|
data->childp = kvm_pte_follow(*ptep, data->mm_ops); |
|
kvm_clear_pte(ptep); |
|
|
|
/* |
|
* Invalidate the whole stage-2, as we may have numerous leaf |
|
* entries below us which would otherwise need invalidating |
|
* individually. |
|
*/ |
|
kvm_call_hyp(__kvm_tlb_flush_vmid, data->mmu); |
|
data->anchor = ptep; |
|
return 0; |
|
} |
|
|
|
static int stage2_map_walk_leaf(u64 addr, u64 end, u32 level, kvm_pte_t *ptep, |
|
struct stage2_map_data *data) |
|
{ |
|
struct kvm_pgtable_mm_ops *mm_ops = data->mm_ops; |
|
kvm_pte_t *childp, pte = *ptep; |
|
int ret; |
|
|
|
if (data->anchor) { |
|
if (stage2_pte_is_counted(pte)) |
|
mm_ops->put_page(ptep); |
|
|
|
return 0; |
|
} |
|
|
|
ret = stage2_map_walker_try_leaf(addr, end, level, ptep, data); |
|
if (ret != -E2BIG) |
|
return ret; |
|
|
|
if (WARN_ON(level == KVM_PGTABLE_MAX_LEVELS - 1)) |
|
return -EINVAL; |
|
|
|
if (!data->memcache) |
|
return -ENOMEM; |
|
|
|
childp = mm_ops->zalloc_page(data->memcache); |
|
if (!childp) |
|
return -ENOMEM; |
|
|
|
/* |
|
* If we've run into an existing block mapping then replace it with |
|
* a table. Accesses beyond 'end' that fall within the new table |
|
* will be mapped lazily. |
|
*/ |
|
if (stage2_pte_is_counted(pte)) |
|
stage2_put_pte(ptep, data->mmu, addr, level, mm_ops); |
|
|
|
kvm_set_table_pte(ptep, childp, mm_ops); |
|
mm_ops->get_page(ptep); |
|
|
|
return 0; |
|
} |
|
|
|
static int stage2_map_walk_table_post(u64 addr, u64 end, u32 level, |
|
kvm_pte_t *ptep, |
|
struct stage2_map_data *data) |
|
{ |
|
struct kvm_pgtable_mm_ops *mm_ops = data->mm_ops; |
|
kvm_pte_t *childp; |
|
int ret = 0; |
|
|
|
if (!data->anchor) |
|
return 0; |
|
|
|
if (data->anchor == ptep) { |
|
childp = data->childp; |
|
data->anchor = NULL; |
|
data->childp = NULL; |
|
ret = stage2_map_walk_leaf(addr, end, level, ptep, data); |
|
} else { |
|
childp = kvm_pte_follow(*ptep, mm_ops); |
|
} |
|
|
|
mm_ops->put_page(childp); |
|
mm_ops->put_page(ptep); |
|
|
|
return ret; |
|
} |
|
|
|
/* |
|
* This is a little fiddly, as we use all three of the walk flags. The idea |
|
* is that the TABLE_PRE callback runs for table entries on the way down, |
|
* looking for table entries which we could conceivably replace with a |
|
* block entry for this mapping. If it finds one, then it sets the 'anchor' |
|
* field in 'struct stage2_map_data' to point at the table entry, before |
|
* clearing the entry to zero and descending into the now detached table. |
|
* |
|
* The behaviour of the LEAF callback then depends on whether or not the |
|
* anchor has been set. If not, then we're not using a block mapping higher |
|
* up the table and we perform the mapping at the existing leaves instead. |
|
* If, on the other hand, the anchor _is_ set, then we drop references to |
|
* all valid leaves so that the pages beneath the anchor can be freed. |
|
* |
|
* Finally, the TABLE_POST callback does nothing if the anchor has not |
|
* been set, but otherwise frees the page-table pages while walking back up |
|
* the page-table, installing the block entry when it revisits the anchor |
|
* pointer and clearing the anchor to NULL. |
|
*/ |
|
static int stage2_map_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep, |
|
enum kvm_pgtable_walk_flags flag, void * const arg) |
|
{ |
|
struct stage2_map_data *data = arg; |
|
|
|
switch (flag) { |
|
case KVM_PGTABLE_WALK_TABLE_PRE: |
|
return stage2_map_walk_table_pre(addr, end, level, ptep, data); |
|
case KVM_PGTABLE_WALK_LEAF: |
|
return stage2_map_walk_leaf(addr, end, level, ptep, data); |
|
case KVM_PGTABLE_WALK_TABLE_POST: |
|
return stage2_map_walk_table_post(addr, end, level, ptep, data); |
|
} |
|
|
|
return -EINVAL; |
|
} |
|
|
|
int kvm_pgtable_stage2_map(struct kvm_pgtable *pgt, u64 addr, u64 size, |
|
u64 phys, enum kvm_pgtable_prot prot, |
|
void *mc) |
|
{ |
|
int ret; |
|
struct stage2_map_data map_data = { |
|
.phys = ALIGN_DOWN(phys, PAGE_SIZE), |
|
.mmu = pgt->mmu, |
|
.memcache = mc, |
|
.mm_ops = pgt->mm_ops, |
|
.force_pte = pgt->force_pte_cb && pgt->force_pte_cb(addr, addr + size, prot), |
|
}; |
|
struct kvm_pgtable_walker walker = { |
|
.cb = stage2_map_walker, |
|
.flags = KVM_PGTABLE_WALK_TABLE_PRE | |
|
KVM_PGTABLE_WALK_LEAF | |
|
KVM_PGTABLE_WALK_TABLE_POST, |
|
.arg = &map_data, |
|
}; |
|
|
|
if (WARN_ON((pgt->flags & KVM_PGTABLE_S2_IDMAP) && (addr != phys))) |
|
return -EINVAL; |
|
|
|
ret = stage2_set_prot_attr(pgt, prot, &map_data.attr); |
|
if (ret) |
|
return ret; |
|
|
|
ret = kvm_pgtable_walk(pgt, addr, size, &walker); |
|
dsb(ishst); |
|
return ret; |
|
} |
|
|
|
int kvm_pgtable_stage2_set_owner(struct kvm_pgtable *pgt, u64 addr, u64 size, |
|
void *mc, u8 owner_id) |
|
{ |
|
int ret; |
|
struct stage2_map_data map_data = { |
|
.phys = KVM_PHYS_INVALID, |
|
.mmu = pgt->mmu, |
|
.memcache = mc, |
|
.mm_ops = pgt->mm_ops, |
|
.owner_id = owner_id, |
|
.force_pte = true, |
|
}; |
|
struct kvm_pgtable_walker walker = { |
|
.cb = stage2_map_walker, |
|
.flags = KVM_PGTABLE_WALK_TABLE_PRE | |
|
KVM_PGTABLE_WALK_LEAF | |
|
KVM_PGTABLE_WALK_TABLE_POST, |
|
.arg = &map_data, |
|
}; |
|
|
|
if (owner_id > KVM_MAX_OWNER_ID) |
|
return -EINVAL; |
|
|
|
ret = kvm_pgtable_walk(pgt, addr, size, &walker); |
|
return ret; |
|
} |
|
|
|
static int stage2_unmap_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep, |
|
enum kvm_pgtable_walk_flags flag, |
|
void * const arg) |
|
{ |
|
struct kvm_pgtable *pgt = arg; |
|
struct kvm_s2_mmu *mmu = pgt->mmu; |
|
struct kvm_pgtable_mm_ops *mm_ops = pgt->mm_ops; |
|
kvm_pte_t pte = *ptep, *childp = NULL; |
|
bool need_flush = false; |
|
|
|
if (!kvm_pte_valid(pte)) { |
|
if (stage2_pte_is_counted(pte)) { |
|
kvm_clear_pte(ptep); |
|
mm_ops->put_page(ptep); |
|
} |
|
return 0; |
|
} |
|
|
|
if (kvm_pte_table(pte, level)) { |
|
childp = kvm_pte_follow(pte, mm_ops); |
|
|
|
if (mm_ops->page_count(childp) != 1) |
|
return 0; |
|
} else if (stage2_pte_cacheable(pgt, pte)) { |
|
need_flush = !stage2_has_fwb(pgt); |
|
} |
|
|
|
/* |
|
* This is similar to the map() path in that we unmap the entire |
|
* block entry and rely on the remaining portions being faulted |
|
* back lazily. |
|
*/ |
|
stage2_put_pte(ptep, mmu, addr, level, mm_ops); |
|
|
|
if (need_flush) { |
|
kvm_pte_t *pte_follow = kvm_pte_follow(pte, mm_ops); |
|
|
|
dcache_clean_inval_poc((unsigned long)pte_follow, |
|
(unsigned long)pte_follow + |
|
kvm_granule_size(level)); |
|
} |
|
|
|
if (childp) |
|
mm_ops->put_page(childp); |
|
|
|
return 0; |
|
} |
|
|
|
int kvm_pgtable_stage2_unmap(struct kvm_pgtable *pgt, u64 addr, u64 size) |
|
{ |
|
struct kvm_pgtable_walker walker = { |
|
.cb = stage2_unmap_walker, |
|
.arg = pgt, |
|
.flags = KVM_PGTABLE_WALK_LEAF | KVM_PGTABLE_WALK_TABLE_POST, |
|
}; |
|
|
|
return kvm_pgtable_walk(pgt, addr, size, &walker); |
|
} |
|
|
|
struct stage2_attr_data { |
|
kvm_pte_t attr_set; |
|
kvm_pte_t attr_clr; |
|
kvm_pte_t pte; |
|
u32 level; |
|
struct kvm_pgtable_mm_ops *mm_ops; |
|
}; |
|
|
|
static int stage2_attr_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep, |
|
enum kvm_pgtable_walk_flags flag, |
|
void * const arg) |
|
{ |
|
kvm_pte_t pte = *ptep; |
|
struct stage2_attr_data *data = arg; |
|
struct kvm_pgtable_mm_ops *mm_ops = data->mm_ops; |
|
|
|
if (!kvm_pte_valid(pte)) |
|
return 0; |
|
|
|
data->level = level; |
|
data->pte = pte; |
|
pte &= ~data->attr_clr; |
|
pte |= data->attr_set; |
|
|
|
/* |
|
* We may race with the CPU trying to set the access flag here, |
|
* but worst-case the access flag update gets lost and will be |
|
* set on the next access instead. |
|
*/ |
|
if (data->pte != pte) { |
|
/* |
|
* Invalidate instruction cache before updating the guest |
|
* stage-2 PTE if we are going to add executable permission. |
|
*/ |
|
if (mm_ops->icache_inval_pou && |
|
stage2_pte_executable(pte) && !stage2_pte_executable(*ptep)) |
|
mm_ops->icache_inval_pou(kvm_pte_follow(pte, mm_ops), |
|
kvm_granule_size(level)); |
|
WRITE_ONCE(*ptep, pte); |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int stage2_update_leaf_attrs(struct kvm_pgtable *pgt, u64 addr, |
|
u64 size, kvm_pte_t attr_set, |
|
kvm_pte_t attr_clr, kvm_pte_t *orig_pte, |
|
u32 *level) |
|
{ |
|
int ret; |
|
kvm_pte_t attr_mask = KVM_PTE_LEAF_ATTR_LO | KVM_PTE_LEAF_ATTR_HI; |
|
struct stage2_attr_data data = { |
|
.attr_set = attr_set & attr_mask, |
|
.attr_clr = attr_clr & attr_mask, |
|
.mm_ops = pgt->mm_ops, |
|
}; |
|
struct kvm_pgtable_walker walker = { |
|
.cb = stage2_attr_walker, |
|
.arg = &data, |
|
.flags = KVM_PGTABLE_WALK_LEAF, |
|
}; |
|
|
|
ret = kvm_pgtable_walk(pgt, addr, size, &walker); |
|
if (ret) |
|
return ret; |
|
|
|
if (orig_pte) |
|
*orig_pte = data.pte; |
|
|
|
if (level) |
|
*level = data.level; |
|
return 0; |
|
} |
|
|
|
int kvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size) |
|
{ |
|
return stage2_update_leaf_attrs(pgt, addr, size, 0, |
|
KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W, |
|
NULL, NULL); |
|
} |
|
|
|
kvm_pte_t kvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr) |
|
{ |
|
kvm_pte_t pte = 0; |
|
stage2_update_leaf_attrs(pgt, addr, 1, KVM_PTE_LEAF_ATTR_LO_S2_AF, 0, |
|
&pte, NULL); |
|
dsb(ishst); |
|
return pte; |
|
} |
|
|
|
kvm_pte_t kvm_pgtable_stage2_mkold(struct kvm_pgtable *pgt, u64 addr) |
|
{ |
|
kvm_pte_t pte = 0; |
|
stage2_update_leaf_attrs(pgt, addr, 1, 0, KVM_PTE_LEAF_ATTR_LO_S2_AF, |
|
&pte, NULL); |
|
/* |
|
* "But where's the TLBI?!", you scream. |
|
* "Over in the core code", I sigh. |
|
* |
|
* See the '->clear_flush_young()' callback on the KVM mmu notifier. |
|
*/ |
|
return pte; |
|
} |
|
|
|
bool kvm_pgtable_stage2_is_young(struct kvm_pgtable *pgt, u64 addr) |
|
{ |
|
kvm_pte_t pte = 0; |
|
stage2_update_leaf_attrs(pgt, addr, 1, 0, 0, &pte, NULL); |
|
return pte & KVM_PTE_LEAF_ATTR_LO_S2_AF; |
|
} |
|
|
|
int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr, |
|
enum kvm_pgtable_prot prot) |
|
{ |
|
int ret; |
|
u32 level; |
|
kvm_pte_t set = 0, clr = 0; |
|
|
|
if (prot & KVM_PTE_LEAF_ATTR_HI_SW) |
|
return -EINVAL; |
|
|
|
if (prot & KVM_PGTABLE_PROT_R) |
|
set |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R; |
|
|
|
if (prot & KVM_PGTABLE_PROT_W) |
|
set |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W; |
|
|
|
if (prot & KVM_PGTABLE_PROT_X) |
|
clr |= KVM_PTE_LEAF_ATTR_HI_S2_XN; |
|
|
|
ret = stage2_update_leaf_attrs(pgt, addr, 1, set, clr, NULL, &level); |
|
if (!ret) |
|
kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, pgt->mmu, addr, level); |
|
return ret; |
|
} |
|
|
|
static int stage2_flush_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep, |
|
enum kvm_pgtable_walk_flags flag, |
|
void * const arg) |
|
{ |
|
struct kvm_pgtable *pgt = arg; |
|
struct kvm_pgtable_mm_ops *mm_ops = pgt->mm_ops; |
|
kvm_pte_t pte = *ptep; |
|
kvm_pte_t *pte_follow; |
|
|
|
if (!kvm_pte_valid(pte) || !stage2_pte_cacheable(pgt, pte)) |
|
return 0; |
|
|
|
pte_follow = kvm_pte_follow(pte, mm_ops); |
|
dcache_clean_inval_poc((unsigned long)pte_follow, |
|
(unsigned long)pte_follow + |
|
kvm_granule_size(level)); |
|
return 0; |
|
} |
|
|
|
int kvm_pgtable_stage2_flush(struct kvm_pgtable *pgt, u64 addr, u64 size) |
|
{ |
|
struct kvm_pgtable_walker walker = { |
|
.cb = stage2_flush_walker, |
|
.flags = KVM_PGTABLE_WALK_LEAF, |
|
.arg = pgt, |
|
}; |
|
|
|
if (stage2_has_fwb(pgt)) |
|
return 0; |
|
|
|
return kvm_pgtable_walk(pgt, addr, size, &walker); |
|
} |
|
|
|
|
|
int __kvm_pgtable_stage2_init(struct kvm_pgtable *pgt, struct kvm_arch *arch, |
|
struct kvm_pgtable_mm_ops *mm_ops, |
|
enum kvm_pgtable_stage2_flags flags, |
|
kvm_pgtable_force_pte_cb_t force_pte_cb) |
|
{ |
|
size_t pgd_sz; |
|
u64 vtcr = arch->vtcr; |
|
u32 ia_bits = VTCR_EL2_IPA(vtcr); |
|
u32 sl0 = FIELD_GET(VTCR_EL2_SL0_MASK, vtcr); |
|
u32 start_level = VTCR_EL2_TGRAN_SL0_BASE - sl0; |
|
|
|
pgd_sz = kvm_pgd_pages(ia_bits, start_level) * PAGE_SIZE; |
|
pgt->pgd = mm_ops->zalloc_pages_exact(pgd_sz); |
|
if (!pgt->pgd) |
|
return -ENOMEM; |
|
|
|
pgt->ia_bits = ia_bits; |
|
pgt->start_level = start_level; |
|
pgt->mm_ops = mm_ops; |
|
pgt->mmu = &arch->mmu; |
|
pgt->flags = flags; |
|
pgt->force_pte_cb = force_pte_cb; |
|
|
|
/* Ensure zeroed PGD pages are visible to the hardware walker */ |
|
dsb(ishst); |
|
return 0; |
|
} |
|
|
|
static int stage2_free_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep, |
|
enum kvm_pgtable_walk_flags flag, |
|
void * const arg) |
|
{ |
|
struct kvm_pgtable_mm_ops *mm_ops = arg; |
|
kvm_pte_t pte = *ptep; |
|
|
|
if (!stage2_pte_is_counted(pte)) |
|
return 0; |
|
|
|
mm_ops->put_page(ptep); |
|
|
|
if (kvm_pte_table(pte, level)) |
|
mm_ops->put_page(kvm_pte_follow(pte, mm_ops)); |
|
|
|
return 0; |
|
} |
|
|
|
void kvm_pgtable_stage2_destroy(struct kvm_pgtable *pgt) |
|
{ |
|
size_t pgd_sz; |
|
struct kvm_pgtable_walker walker = { |
|
.cb = stage2_free_walker, |
|
.flags = KVM_PGTABLE_WALK_LEAF | |
|
KVM_PGTABLE_WALK_TABLE_POST, |
|
.arg = pgt->mm_ops, |
|
}; |
|
|
|
WARN_ON(kvm_pgtable_walk(pgt, 0, BIT(pgt->ia_bits), &walker)); |
|
pgd_sz = kvm_pgd_pages(pgt->ia_bits, pgt->start_level) * PAGE_SIZE; |
|
pgt->mm_ops->free_pages_exact(pgt->pgd, pgd_sz); |
|
pgt->pgd = NULL; |
|
}
|
|
|