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99 lines
2.5 KiB
99 lines
2.5 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* ARM64 cacheinfo support |
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* |
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* Copyright (C) 2015 ARM Ltd. |
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* All Rights Reserved |
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*/ |
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#include <linux/acpi.h> |
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#include <linux/cacheinfo.h> |
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#include <linux/of.h> |
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#define MAX_CACHE_LEVEL 7 /* Max 7 level supported */ |
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/* Ctypen, bits[3(n - 1) + 2 : 3(n - 1)], for n = 1 to 7 */ |
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#define CLIDR_CTYPE_SHIFT(level) (3 * (level - 1)) |
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#define CLIDR_CTYPE_MASK(level) (7 << CLIDR_CTYPE_SHIFT(level)) |
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#define CLIDR_CTYPE(clidr, level) \ |
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(((clidr) & CLIDR_CTYPE_MASK(level)) >> CLIDR_CTYPE_SHIFT(level)) |
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int cache_line_size(void) |
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{ |
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if (coherency_max_size != 0) |
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return coherency_max_size; |
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return cache_line_size_of_cpu(); |
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} |
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EXPORT_SYMBOL_GPL(cache_line_size); |
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static inline enum cache_type get_cache_type(int level) |
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{ |
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u64 clidr; |
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if (level > MAX_CACHE_LEVEL) |
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return CACHE_TYPE_NOCACHE; |
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clidr = read_sysreg(clidr_el1); |
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return CLIDR_CTYPE(clidr, level); |
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} |
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static void ci_leaf_init(struct cacheinfo *this_leaf, |
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enum cache_type type, unsigned int level) |
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{ |
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this_leaf->level = level; |
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this_leaf->type = type; |
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} |
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int init_cache_level(unsigned int cpu) |
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{ |
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unsigned int ctype, level, leaves, fw_level; |
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); |
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for (level = 1, leaves = 0; level <= MAX_CACHE_LEVEL; level++) { |
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ctype = get_cache_type(level); |
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if (ctype == CACHE_TYPE_NOCACHE) { |
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level--; |
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break; |
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} |
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/* Separate instruction and data caches */ |
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leaves += (ctype == CACHE_TYPE_SEPARATE) ? 2 : 1; |
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} |
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if (acpi_disabled) |
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fw_level = of_find_last_cache_level(cpu); |
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else |
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fw_level = acpi_find_last_cache_level(cpu); |
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if (level < fw_level) { |
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/* |
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* some external caches not specified in CLIDR_EL1 |
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* the information may be available in the device tree |
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* only unified external caches are considered here |
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*/ |
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leaves += (fw_level - level); |
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level = fw_level; |
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} |
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this_cpu_ci->num_levels = level; |
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this_cpu_ci->num_leaves = leaves; |
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return 0; |
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} |
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int populate_cache_leaves(unsigned int cpu) |
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{ |
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unsigned int level, idx; |
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enum cache_type type; |
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); |
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struct cacheinfo *this_leaf = this_cpu_ci->info_list; |
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for (idx = 0, level = 1; level <= this_cpu_ci->num_levels && |
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idx < this_cpu_ci->num_leaves; idx++, level++) { |
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type = get_cache_type(level); |
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if (type == CACHE_TYPE_SEPARATE) { |
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ci_leaf_init(this_leaf++, CACHE_TYPE_DATA, level); |
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ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level); |
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} else { |
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ci_leaf_init(this_leaf++, type, level); |
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} |
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} |
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return 0; |
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}
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