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186 lines
4.2 KiB
186 lines
4.2 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright 2014 Linaro Ltd. |
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* Copyright (C) 2014 ZTE Corporation. |
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*/ |
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#include <linux/delay.h> |
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#include <linux/errno.h> |
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#include <linux/init.h> |
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#include <linux/io.h> |
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#include <linux/jiffies.h> |
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#include <linux/of.h> |
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#include <linux/of_address.h> |
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#include <linux/smp.h> |
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#include <asm/cacheflush.h> |
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#include <asm/cp15.h> |
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#include <asm/fncpy.h> |
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#include <asm/proc-fns.h> |
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#include <asm/smp_scu.h> |
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#include <asm/smp_plat.h> |
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#include "core.h" |
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#define AON_SYS_CTRL_RESERVED1 0xa8 |
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#define BUS_MATRIX_REMAP_CONFIG 0x00 |
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#define PCU_CPU0_CTRL 0x00 |
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#define PCU_CPU1_CTRL 0x04 |
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#define PCU_CPU1_ST 0x0c |
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#define PCU_GLOBAL_CTRL 0x14 |
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#define PCU_EXPEND_CONTROL 0x34 |
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#define ZX_IRAM_BASE 0x00200000 |
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static void __iomem *pcu_base; |
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static void __iomem *matrix_base; |
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static void __iomem *scu_base; |
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void __init zx_smp_prepare_cpus(unsigned int max_cpus) |
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{ |
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struct device_node *np; |
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unsigned long base = 0; |
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void __iomem *aonsysctrl_base; |
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void __iomem *sys_iram; |
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base = scu_a9_get_base(); |
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scu_base = ioremap(base, SZ_256); |
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if (!scu_base) { |
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pr_err("%s: failed to map scu\n", __func__); |
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return; |
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} |
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scu_enable(scu_base); |
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np = of_find_compatible_node(NULL, NULL, "zte,sysctrl"); |
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if (!np) { |
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pr_err("%s: failed to find sysctrl node\n", __func__); |
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return; |
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} |
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aonsysctrl_base = of_iomap(np, 0); |
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if (!aonsysctrl_base) { |
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pr_err("%s: failed to map aonsysctrl\n", __func__); |
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of_node_put(np); |
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return; |
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} |
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/* |
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* Write the address of secondary startup into the |
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* system-wide flags register. The BootMonitor waits |
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* until it receives a soft interrupt, and then the |
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* secondary CPU branches to this address. |
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*/ |
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__raw_writel(__pa_symbol(zx_secondary_startup), |
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aonsysctrl_base + AON_SYS_CTRL_RESERVED1); |
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iounmap(aonsysctrl_base); |
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of_node_put(np); |
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np = of_find_compatible_node(NULL, NULL, "zte,zx296702-pcu"); |
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pcu_base = of_iomap(np, 0); |
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of_node_put(np); |
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WARN_ON(!pcu_base); |
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np = of_find_compatible_node(NULL, NULL, "zte,zx-bus-matrix"); |
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matrix_base = of_iomap(np, 0); |
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of_node_put(np); |
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WARN_ON(!matrix_base); |
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/* Map the first 4 KB IRAM for suspend usage */ |
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sys_iram = __arm_ioremap_exec(ZX_IRAM_BASE, PAGE_SIZE, false); |
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zx_secondary_startup_pa = __pa_symbol(zx_secondary_startup); |
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fncpy(sys_iram, &zx_resume_jump, zx_suspend_iram_sz); |
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} |
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static int zx_boot_secondary(unsigned int cpu, struct task_struct *idle) |
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{ |
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static bool first_boot = true; |
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if (first_boot) { |
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arch_send_wakeup_ipi_mask(cpumask_of(cpu)); |
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first_boot = false; |
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return 0; |
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} |
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/* Swap the base address mapping between IRAM and IROM */ |
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writel_relaxed(0x1, matrix_base + BUS_MATRIX_REMAP_CONFIG); |
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/* Power on CPU1 */ |
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writel_relaxed(0x0, pcu_base + PCU_CPU1_CTRL); |
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/* Wait for power on ack */ |
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while (readl_relaxed(pcu_base + PCU_CPU1_ST) & 0x4) |
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cpu_relax(); |
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/* Swap back the mapping of IRAM and IROM */ |
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writel_relaxed(0x0, matrix_base + BUS_MATRIX_REMAP_CONFIG); |
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return 0; |
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} |
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#ifdef CONFIG_HOTPLUG_CPU |
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static inline void cpu_enter_lowpower(void) |
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{ |
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unsigned int v; |
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asm volatile( |
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"mcr p15, 0, %1, c7, c5, 0\n" |
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" mcr p15, 0, %1, c7, c10, 4\n" |
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/* |
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* Turn off coherency |
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*/ |
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" mrc p15, 0, %0, c1, c0, 1\n" |
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" bic %0, %0, %3\n" |
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" mcr p15, 0, %0, c1, c0, 1\n" |
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" mrc p15, 0, %0, c1, c0, 0\n" |
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" bic %0, %0, %2\n" |
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" mcr p15, 0, %0, c1, c0, 0\n" |
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: "=&r" (v) |
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: "r" (0), "Ir" (CR_C), "Ir" (0x40) |
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: "cc"); |
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} |
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static int zx_cpu_kill(unsigned int cpu) |
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{ |
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unsigned long timeout = jiffies + msecs_to_jiffies(2000); |
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writel_relaxed(0x2, pcu_base + PCU_CPU1_CTRL); |
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while ((readl_relaxed(pcu_base + PCU_CPU1_ST) & 0x3) != 0x0) { |
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if (time_after(jiffies, timeout)) { |
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pr_err("*** cpu1 poweroff timeout\n"); |
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break; |
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} |
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} |
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return 1; |
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} |
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static void zx_cpu_die(unsigned int cpu) |
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{ |
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scu_power_mode(scu_base, SCU_PM_POWEROFF); |
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cpu_enter_lowpower(); |
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while (1) |
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cpu_do_idle(); |
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} |
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#endif |
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static void zx_secondary_init(unsigned int cpu) |
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{ |
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scu_power_mode(scu_base, SCU_PM_NORMAL); |
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} |
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static const struct smp_operations zx_smp_ops __initconst = { |
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.smp_prepare_cpus = zx_smp_prepare_cpus, |
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.smp_secondary_init = zx_secondary_init, |
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.smp_boot_secondary = zx_boot_secondary, |
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#ifdef CONFIG_HOTPLUG_CPU |
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.cpu_kill = zx_cpu_kill, |
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.cpu_die = zx_cpu_die, |
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#endif |
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}; |
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CPU_METHOD_OF_DECLARE(zx_smp, "zte,zx296702-smp", &zx_smp_ops);
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