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684 lines
17 KiB
684 lines
17 KiB
// SPDX-License-Identifier: GPL-2.0 |
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// |
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// Copyright 2007 Simtec Electronics |
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// Ben Dooks <[email protected]> |
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// |
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// http://armlinux.simtec.co.uk/ |
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#include <linux/kernel.h> |
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#include <linux/types.h> |
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#include <linux/interrupt.h> |
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#include <linux/list.h> |
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#include <linux/timer.h> |
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#include <linux/init.h> |
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#include <linux/gpio.h> |
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#include <linux/gpio/machine.h> |
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#include <linux/syscore_ops.h> |
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#include <linux/serial_core.h> |
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#include <linux/serial_s3c.h> |
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#include <linux/platform_device.h> |
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#include <linux/i2c.h> |
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#include <video/ili9320.h> |
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#include <linux/spi/spi.h> |
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#include <linux/spi/spi_gpio.h> |
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#include <asm/mach/arch.h> |
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#include <asm/mach/map.h> |
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#include <asm/mach/irq.h> |
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#include <linux/platform_data/mtd-nand-s3c2410.h> |
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#include <linux/platform_data/i2c-s3c2410.h> |
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#include "hardware-s3c24xx.h" |
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#include "regs-gpio.h" |
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#include <linux/platform_data/fb-s3c2410.h> |
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#include "gpio-samsung.h" |
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#include <asm/mach-types.h> |
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#include <linux/mtd/mtd.h> |
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#include <linux/mtd/rawnand.h> |
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#include <linux/mtd/nand-ecc-sw-hamming.h> |
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#include <linux/mtd/partitions.h> |
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#include "gpio-cfg.h" |
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#include "devs.h" |
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#include "cpu.h" |
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#include "pm.h" |
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#include <linux/platform_data/usb-s3c2410_udc.h> |
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#include "s3c24xx.h" |
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#include "s3c2412-power.h" |
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static struct map_desc jive_iodesc[] __initdata = { |
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}; |
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#define UCON S3C2410_UCON_DEFAULT |
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#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE |
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#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
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static struct s3c2410_uartcfg jive_uartcfgs[] = { |
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[0] = { |
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.hwport = 0, |
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.flags = 0, |
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.ucon = UCON, |
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.ulcon = ULCON, |
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.ufcon = UFCON, |
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}, |
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[1] = { |
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.hwport = 1, |
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.flags = 0, |
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.ucon = UCON, |
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.ulcon = ULCON, |
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.ufcon = UFCON, |
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}, |
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[2] = { |
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.hwport = 2, |
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.flags = 0, |
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.ucon = UCON, |
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.ulcon = ULCON, |
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.ufcon = UFCON, |
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} |
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}; |
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/* Jive flash assignment |
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* |
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* 0x00000000-0x00028000 : uboot |
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* 0x00028000-0x0002c000 : uboot env |
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* 0x0002c000-0x00030000 : spare |
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* 0x00030000-0x00200000 : zimage A |
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* 0x00200000-0x01600000 : cramfs A |
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* 0x01600000-0x017d0000 : zimage B |
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* 0x017d0000-0x02bd0000 : cramfs B |
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* 0x02bd0000-0x03fd0000 : yaffs |
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*/ |
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static struct mtd_partition __initdata jive_imageA_nand_part[] = { |
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#ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER |
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/* Don't allow access to the bootloader from linux */ |
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{ |
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.name = "uboot", |
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.offset = 0, |
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.size = (160 * SZ_1K), |
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.mask_flags = MTD_WRITEABLE, /* force read-only */ |
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}, |
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/* spare */ |
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{ |
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.name = "spare", |
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.offset = (176 * SZ_1K), |
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.size = (16 * SZ_1K), |
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}, |
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#endif |
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/* booted images */ |
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{ |
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.name = "kernel (ro)", |
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.offset = (192 * SZ_1K), |
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.size = (SZ_2M) - (192 * SZ_1K), |
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.mask_flags = MTD_WRITEABLE, /* force read-only */ |
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}, { |
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.name = "root (ro)", |
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.offset = (SZ_2M), |
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.size = (20 * SZ_1M), |
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.mask_flags = MTD_WRITEABLE, /* force read-only */ |
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}, |
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/* yaffs */ |
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{ |
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.name = "yaffs", |
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.offset = (44 * SZ_1M), |
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.size = (20 * SZ_1M), |
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}, |
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/* bootloader environment */ |
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{ |
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.name = "env", |
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.offset = (160 * SZ_1K), |
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.size = (16 * SZ_1K), |
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}, |
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/* upgrade images */ |
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{ |
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.name = "zimage", |
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.offset = (22 * SZ_1M), |
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.size = (2 * SZ_1M) - (192 * SZ_1K), |
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}, { |
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.name = "cramfs", |
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.offset = (24 * SZ_1M) - (192*SZ_1K), |
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.size = (20 * SZ_1M), |
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}, |
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}; |
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static struct mtd_partition __initdata jive_imageB_nand_part[] = { |
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#ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER |
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/* Don't allow access to the bootloader from linux */ |
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{ |
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.name = "uboot", |
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.offset = 0, |
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.size = (160 * SZ_1K), |
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.mask_flags = MTD_WRITEABLE, /* force read-only */ |
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}, |
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/* spare */ |
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{ |
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.name = "spare", |
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.offset = (176 * SZ_1K), |
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.size = (16 * SZ_1K), |
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}, |
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#endif |
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/* booted images */ |
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{ |
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.name = "kernel (ro)", |
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.offset = (22 * SZ_1M), |
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.size = (2 * SZ_1M) - (192 * SZ_1K), |
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.mask_flags = MTD_WRITEABLE, /* force read-only */ |
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}, |
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{ |
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.name = "root (ro)", |
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.offset = (24 * SZ_1M) - (192 * SZ_1K), |
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.size = (20 * SZ_1M), |
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.mask_flags = MTD_WRITEABLE, /* force read-only */ |
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}, |
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/* yaffs */ |
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{ |
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.name = "yaffs", |
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.offset = (44 * SZ_1M), |
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.size = (20 * SZ_1M), |
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}, |
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/* bootloader environment */ |
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{ |
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.name = "env", |
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.offset = (160 * SZ_1K), |
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.size = (16 * SZ_1K), |
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}, |
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/* upgrade images */ |
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{ |
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.name = "zimage", |
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.offset = (192 * SZ_1K), |
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.size = (2 * SZ_1M) - (192 * SZ_1K), |
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}, { |
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.name = "cramfs", |
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.offset = (2 * SZ_1M), |
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.size = (20 * SZ_1M), |
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}, |
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}; |
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static struct s3c2410_nand_set __initdata jive_nand_sets[] = { |
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[0] = { |
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.name = "flash", |
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.nr_chips = 1, |
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.nr_partitions = ARRAY_SIZE(jive_imageA_nand_part), |
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.partitions = jive_imageA_nand_part, |
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}, |
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}; |
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static struct s3c2410_platform_nand __initdata jive_nand_info = { |
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/* set taken from osiris nand timings, possibly still conservative */ |
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.tacls = 30, |
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.twrph0 = 55, |
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.twrph1 = 40, |
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.sets = jive_nand_sets, |
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.nr_sets = ARRAY_SIZE(jive_nand_sets), |
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.engine_type = NAND_ECC_ENGINE_TYPE_SOFT, |
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}; |
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static int __init jive_mtdset(char *options) |
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{ |
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struct s3c2410_nand_set *nand = &jive_nand_sets[0]; |
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unsigned long set; |
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if (options == NULL || options[0] == '\0') |
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return 0; |
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if (kstrtoul(options, 10, &set)) { |
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printk(KERN_ERR "failed to parse mtdset=%s\n", options); |
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return 0; |
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} |
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switch (set) { |
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case 1: |
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nand->nr_partitions = ARRAY_SIZE(jive_imageB_nand_part); |
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nand->partitions = jive_imageB_nand_part; |
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case 0: |
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/* this is already setup in the nand info */ |
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break; |
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default: |
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printk(KERN_ERR "Unknown mtd set %ld specified," |
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"using default.", set); |
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} |
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return 0; |
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} |
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/* parse the mtdset= option given to the kernel command line */ |
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__setup("mtdset=", jive_mtdset); |
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/* LCD timing and setup */ |
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#define LCD_XRES (240) |
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#define LCD_YRES (320) |
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#define LCD_LEFT_MARGIN (12) |
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#define LCD_RIGHT_MARGIN (12) |
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#define LCD_LOWER_MARGIN (12) |
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#define LCD_UPPER_MARGIN (12) |
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#define LCD_VSYNC (2) |
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#define LCD_HSYNC (2) |
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#define LCD_REFRESH (60) |
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#define LCD_HTOT (LCD_HSYNC + LCD_LEFT_MARGIN + LCD_XRES + LCD_RIGHT_MARGIN) |
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#define LCD_VTOT (LCD_VSYNC + LCD_LOWER_MARGIN + LCD_YRES + LCD_UPPER_MARGIN) |
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static struct s3c2410fb_display jive_vgg2432a4_display[] = { |
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[0] = { |
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.width = LCD_XRES, |
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.height = LCD_YRES, |
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.xres = LCD_XRES, |
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.yres = LCD_YRES, |
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.left_margin = LCD_LEFT_MARGIN, |
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.right_margin = LCD_RIGHT_MARGIN, |
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.upper_margin = LCD_UPPER_MARGIN, |
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.lower_margin = LCD_LOWER_MARGIN, |
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.hsync_len = LCD_HSYNC, |
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.vsync_len = LCD_VSYNC, |
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.pixclock = (1000000000000LL / |
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(LCD_REFRESH * LCD_HTOT * LCD_VTOT)), |
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.bpp = 16, |
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.type = (S3C2410_LCDCON1_TFT16BPP | |
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S3C2410_LCDCON1_TFT), |
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.lcdcon5 = (S3C2410_LCDCON5_FRM565 | |
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S3C2410_LCDCON5_INVVLINE | |
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S3C2410_LCDCON5_INVVFRAME | |
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S3C2410_LCDCON5_INVVDEN | |
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S3C2410_LCDCON5_PWREN), |
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}, |
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}; |
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/* todo - put into gpio header */ |
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#define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2)) |
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#define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2)) |
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static struct s3c2410fb_mach_info jive_lcd_config = { |
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.displays = jive_vgg2432a4_display, |
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.num_displays = ARRAY_SIZE(jive_vgg2432a4_display), |
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.default_display = 0, |
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/* Enable VD[2..7], VD[10..15], VD[18..23] and VCLK, syncs, VDEN |
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* and disable the pull down resistors on pins we are using for LCD |
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* data. */ |
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.gpcup = (0xf << 1) | (0x3f << 10), |
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.gpcup_reg = S3C2410_GPCUP, |
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.gpccon = (S3C2410_GPC1_VCLK | S3C2410_GPC2_VLINE | |
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S3C2410_GPC3_VFRAME | S3C2410_GPC4_VM | |
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S3C2410_GPC10_VD2 | S3C2410_GPC11_VD3 | |
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S3C2410_GPC12_VD4 | S3C2410_GPC13_VD5 | |
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S3C2410_GPC14_VD6 | S3C2410_GPC15_VD7), |
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.gpccon_mask = (S3C2410_GPCCON_MASK(1) | S3C2410_GPCCON_MASK(2) | |
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S3C2410_GPCCON_MASK(3) | S3C2410_GPCCON_MASK(4) | |
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S3C2410_GPCCON_MASK(10) | S3C2410_GPCCON_MASK(11) | |
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S3C2410_GPCCON_MASK(12) | S3C2410_GPCCON_MASK(13) | |
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S3C2410_GPCCON_MASK(14) | S3C2410_GPCCON_MASK(15)), |
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.gpccon_reg = S3C2410_GPCCON, |
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.gpdup = (0x3f << 2) | (0x3f << 10), |
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.gpdup_reg = S3C2410_GPDUP, |
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.gpdcon = (S3C2410_GPD2_VD10 | S3C2410_GPD3_VD11 | |
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S3C2410_GPD4_VD12 | S3C2410_GPD5_VD13 | |
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S3C2410_GPD6_VD14 | S3C2410_GPD7_VD15 | |
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S3C2410_GPD10_VD18 | S3C2410_GPD11_VD19 | |
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S3C2410_GPD12_VD20 | S3C2410_GPD13_VD21 | |
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S3C2410_GPD14_VD22 | S3C2410_GPD15_VD23), |
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.gpdcon_mask = (S3C2410_GPDCON_MASK(2) | S3C2410_GPDCON_MASK(3) | |
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S3C2410_GPDCON_MASK(4) | S3C2410_GPDCON_MASK(5) | |
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S3C2410_GPDCON_MASK(6) | S3C2410_GPDCON_MASK(7) | |
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S3C2410_GPDCON_MASK(10) | S3C2410_GPDCON_MASK(11)| |
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S3C2410_GPDCON_MASK(12) | S3C2410_GPDCON_MASK(13)| |
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S3C2410_GPDCON_MASK(14) | S3C2410_GPDCON_MASK(15)), |
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.gpdcon_reg = S3C2410_GPDCON, |
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}; |
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/* ILI9320 support. */ |
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static void jive_lcm_reset(unsigned int set) |
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{ |
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printk(KERN_DEBUG "%s(%d)\n", __func__, set); |
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gpio_set_value(S3C2410_GPG(13), set); |
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} |
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#undef LCD_UPPER_MARGIN |
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#define LCD_UPPER_MARGIN 2 |
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static struct ili9320_platdata jive_lcm_config = { |
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.hsize = LCD_XRES, |
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.vsize = LCD_YRES, |
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.reset = jive_lcm_reset, |
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.suspend = ILI9320_SUSPEND_DEEP, |
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.entry_mode = ILI9320_ENTRYMODE_ID(3) | ILI9320_ENTRYMODE_BGR, |
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.display2 = (ILI9320_DISPLAY2_FP(LCD_UPPER_MARGIN) | |
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ILI9320_DISPLAY2_BP(LCD_LOWER_MARGIN)), |
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.display3 = 0x0, |
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.display4 = 0x0, |
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.rgb_if1 = (ILI9320_RGBIF1_RIM_RGB18 | |
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ILI9320_RGBIF1_RM | ILI9320_RGBIF1_CLK_RGBIF), |
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.rgb_if2 = ILI9320_RGBIF2_DPL, |
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.interface2 = 0x0, |
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.interface3 = 0x3, |
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.interface4 = (ILI9320_INTERFACE4_RTNE(16) | |
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ILI9320_INTERFACE4_DIVE(1)), |
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.interface5 = 0x0, |
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.interface6 = 0x0, |
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}; |
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/* LCD SPI support */ |
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static struct spi_gpio_platform_data jive_lcd_spi = { |
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.num_chipselect = 1, |
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}; |
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static struct platform_device jive_device_lcdspi = { |
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.name = "spi_gpio", |
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.id = 1, |
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.dev.platform_data = &jive_lcd_spi, |
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}; |
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static struct gpiod_lookup_table jive_lcdspi_gpiod_table = { |
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.dev_id = "spi_gpio", |
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.table = { |
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GPIO_LOOKUP("GPIOG", 8, |
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"sck", GPIO_ACTIVE_HIGH), |
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GPIO_LOOKUP("GPIOB", 8, |
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"mosi", GPIO_ACTIVE_HIGH), |
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GPIO_LOOKUP("GPIOB", 7, |
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"cs", GPIO_ACTIVE_HIGH), |
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{ }, |
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}, |
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}; |
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/* WM8750 audio code SPI definition */ |
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static struct spi_gpio_platform_data jive_wm8750_spi = { |
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.num_chipselect = 1, |
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}; |
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static struct platform_device jive_device_wm8750 = { |
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.name = "spi_gpio", |
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.id = 2, |
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.dev.platform_data = &jive_wm8750_spi, |
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}; |
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static struct gpiod_lookup_table jive_wm8750_gpiod_table = { |
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.dev_id = "spi_gpio", |
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.table = { |
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GPIO_LOOKUP("GPIOB", 4, |
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"sck", GPIO_ACTIVE_HIGH), |
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GPIO_LOOKUP("GPIOB", 9, |
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"mosi", GPIO_ACTIVE_HIGH), |
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GPIO_LOOKUP("GPIOH", 10, |
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"cs", GPIO_ACTIVE_HIGH), |
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{ }, |
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}, |
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}; |
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/* JIVE SPI devices. */ |
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static struct spi_board_info __initdata jive_spi_devs[] = { |
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[0] = { |
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.modalias = "VGG2432A4", |
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.bus_num = 1, |
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.chip_select = 0, |
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.mode = SPI_MODE_3, /* CPOL=1, CPHA=1 */ |
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.max_speed_hz = 100000, |
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.platform_data = &jive_lcm_config, |
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}, { |
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.modalias = "WM8750", |
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.bus_num = 2, |
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.chip_select = 0, |
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.mode = SPI_MODE_0, /* CPOL=0, CPHA=0 */ |
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.max_speed_hz = 100000, |
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}, |
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}; |
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/* I2C bus and device configuration. */ |
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static struct s3c2410_platform_i2c jive_i2c_cfg __initdata = { |
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.frequency = 80 * 1000, |
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.flags = S3C_IICFLG_FILTER, |
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.sda_delay = 2, |
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}; |
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static struct i2c_board_info jive_i2c_devs[] __initdata = { |
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[0] = { |
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I2C_BOARD_INFO("lis302dl", 0x1c), |
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.irq = IRQ_EINT14, |
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}, |
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}; |
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/* The platform devices being used. */ |
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static struct platform_device *jive_devices[] __initdata = { |
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&s3c_device_ohci, |
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&s3c_device_rtc, |
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&s3c_device_wdt, |
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&s3c_device_i2c0, |
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&s3c_device_lcd, |
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&jive_device_lcdspi, |
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&jive_device_wm8750, |
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&s3c_device_nand, |
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&s3c_device_usbgadget, |
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&s3c2412_device_dma, |
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}; |
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static struct s3c2410_udc_mach_info jive_udc_cfg __initdata = { |
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.vbus_pin = S3C2410_GPG(1), /* detect is on GPG1 */ |
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}; |
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/* Jive power management device */ |
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#ifdef CONFIG_PM |
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static int jive_pm_suspend(void) |
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{ |
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/* Write the magic value u-boot uses to check for resume into |
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* the INFORM0 register, and ensure INFORM1 is set to the |
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* correct address to resume from. */ |
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__raw_writel(0x2BED, S3C2412_INFORM0); |
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__raw_writel(__pa_symbol(s3c_cpu_resume), S3C2412_INFORM1); |
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return 0; |
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} |
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static void jive_pm_resume(void) |
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{ |
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__raw_writel(0x0, S3C2412_INFORM0); |
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} |
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#else |
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#define jive_pm_suspend NULL |
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#define jive_pm_resume NULL |
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#endif |
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static struct syscore_ops jive_pm_syscore_ops = { |
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.suspend = jive_pm_suspend, |
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.resume = jive_pm_resume, |
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}; |
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static void __init jive_map_io(void) |
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{ |
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s3c24xx_init_io(jive_iodesc, ARRAY_SIZE(jive_iodesc)); |
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s3c24xx_init_uarts(jive_uartcfgs, ARRAY_SIZE(jive_uartcfgs)); |
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s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); |
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} |
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|
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static void __init jive_init_time(void) |
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{ |
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s3c2412_init_clocks(12000000); |
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s3c24xx_timer_init(); |
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} |
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|
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static void jive_power_off(void) |
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{ |
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printk(KERN_INFO "powering system down...\n"); |
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|
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gpio_request_one(S3C2410_GPC(5), GPIOF_OUT_INIT_HIGH, NULL); |
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gpio_free(S3C2410_GPC(5)); |
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} |
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|
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static void __init jive_machine_init(void) |
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{ |
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/* register system core operations for managing low level suspend */ |
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|
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register_syscore_ops(&jive_pm_syscore_ops); |
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|
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/* write our sleep configurations for the IO. Pull down all unused |
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* IO, ensure that we have turned off all peripherals we do not |
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* need, and configure the ones we do need. */ |
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|
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/* Port B sleep */ |
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|
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__raw_writel(S3C2412_SLPCON_IN(0) | |
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S3C2412_SLPCON_PULL(1) | |
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S3C2412_SLPCON_HIGH(2) | |
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S3C2412_SLPCON_PULL(3) | |
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S3C2412_SLPCON_PULL(4) | |
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S3C2412_SLPCON_PULL(5) | |
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S3C2412_SLPCON_PULL(6) | |
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S3C2412_SLPCON_HIGH(7) | |
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S3C2412_SLPCON_PULL(8) | |
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S3C2412_SLPCON_PULL(9) | |
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S3C2412_SLPCON_PULL(10), S3C2412_GPBSLPCON); |
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|
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/* Port C sleep */ |
|
|
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__raw_writel(S3C2412_SLPCON_PULL(0) | |
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S3C2412_SLPCON_PULL(1) | |
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S3C2412_SLPCON_PULL(2) | |
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S3C2412_SLPCON_PULL(3) | |
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S3C2412_SLPCON_PULL(4) | |
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S3C2412_SLPCON_PULL(5) | |
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S3C2412_SLPCON_LOW(6) | |
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S3C2412_SLPCON_PULL(6) | |
|
S3C2412_SLPCON_PULL(7) | |
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S3C2412_SLPCON_PULL(8) | |
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S3C2412_SLPCON_PULL(9) | |
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S3C2412_SLPCON_PULL(10) | |
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S3C2412_SLPCON_PULL(11) | |
|
S3C2412_SLPCON_PULL(12) | |
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S3C2412_SLPCON_PULL(13) | |
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S3C2412_SLPCON_PULL(14) | |
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S3C2412_SLPCON_PULL(15), S3C2412_GPCSLPCON); |
|
|
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/* Port D sleep */ |
|
|
|
__raw_writel(S3C2412_SLPCON_ALL_PULL, S3C2412_GPDSLPCON); |
|
|
|
/* Port F sleep */ |
|
|
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__raw_writel(S3C2412_SLPCON_LOW(0) | |
|
S3C2412_SLPCON_LOW(1) | |
|
S3C2412_SLPCON_LOW(2) | |
|
S3C2412_SLPCON_EINT(3) | |
|
S3C2412_SLPCON_EINT(4) | |
|
S3C2412_SLPCON_EINT(5) | |
|
S3C2412_SLPCON_EINT(6) | |
|
S3C2412_SLPCON_EINT(7), S3C2412_GPFSLPCON); |
|
|
|
/* Port G sleep */ |
|
|
|
__raw_writel(S3C2412_SLPCON_IN(0) | |
|
S3C2412_SLPCON_IN(1) | |
|
S3C2412_SLPCON_IN(2) | |
|
S3C2412_SLPCON_IN(3) | |
|
S3C2412_SLPCON_IN(4) | |
|
S3C2412_SLPCON_IN(5) | |
|
S3C2412_SLPCON_IN(6) | |
|
S3C2412_SLPCON_IN(7) | |
|
S3C2412_SLPCON_PULL(8) | |
|
S3C2412_SLPCON_PULL(9) | |
|
S3C2412_SLPCON_IN(10) | |
|
S3C2412_SLPCON_PULL(11) | |
|
S3C2412_SLPCON_PULL(12) | |
|
S3C2412_SLPCON_PULL(13) | |
|
S3C2412_SLPCON_IN(14) | |
|
S3C2412_SLPCON_PULL(15), S3C2412_GPGSLPCON); |
|
|
|
/* Port H sleep */ |
|
|
|
__raw_writel(S3C2412_SLPCON_PULL(0) | |
|
S3C2412_SLPCON_PULL(1) | |
|
S3C2412_SLPCON_PULL(2) | |
|
S3C2412_SLPCON_PULL(3) | |
|
S3C2412_SLPCON_PULL(4) | |
|
S3C2412_SLPCON_PULL(5) | |
|
S3C2412_SLPCON_PULL(6) | |
|
S3C2412_SLPCON_IN(7) | |
|
S3C2412_SLPCON_IN(8) | |
|
S3C2412_SLPCON_PULL(9) | |
|
S3C2412_SLPCON_IN(10), S3C2412_GPHSLPCON); |
|
|
|
/* initialise the power management now we've setup everything. */ |
|
|
|
s3c_pm_init(); |
|
|
|
/** TODO - check that this is after the cmdline option! */ |
|
s3c_nand_set_platdata(&jive_nand_info); |
|
|
|
gpio_request(S3C2410_GPG(13), "lcm reset"); |
|
gpio_direction_output(S3C2410_GPG(13), 0); |
|
|
|
gpio_request_one(S3C2410_GPB(6), GPIOF_OUT_INIT_LOW, NULL); |
|
gpio_free(S3C2410_GPB(6)); |
|
|
|
/* Turn off suspend on both USB ports, and switch the |
|
* selectable USB port to USB device mode. */ |
|
|
|
s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | |
|
S3C2410_MISCCR_USBSUSPND0 | |
|
S3C2410_MISCCR_USBSUSPND1, 0x0); |
|
|
|
s3c24xx_udc_set_platdata(&jive_udc_cfg); |
|
s3c24xx_fb_set_platdata(&jive_lcd_config); |
|
|
|
spi_register_board_info(jive_spi_devs, ARRAY_SIZE(jive_spi_devs)); |
|
|
|
s3c_i2c0_set_platdata(&jive_i2c_cfg); |
|
i2c_register_board_info(0, jive_i2c_devs, ARRAY_SIZE(jive_i2c_devs)); |
|
|
|
pm_power_off = jive_power_off; |
|
|
|
gpiod_add_lookup_table(&jive_lcdspi_gpiod_table); |
|
gpiod_add_lookup_table(&jive_wm8750_gpiod_table); |
|
platform_add_devices(jive_devices, ARRAY_SIZE(jive_devices)); |
|
} |
|
|
|
MACHINE_START(JIVE, "JIVE") |
|
/* Maintainer: Ben Dooks <[email protected]> */ |
|
.atag_offset = 0x100, |
|
|
|
.init_irq = s3c2412_init_irq, |
|
.map_io = jive_map_io, |
|
.init_machine = jive_machine_init, |
|
.init_time = jive_init_time, |
|
MACHINE_END
|
|
|