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81 lines
1.8 KiB
81 lines
1.8 KiB
// SPDX-License-Identifier: GPL-2.0 |
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// Copyright (c) 2018 Nuvoton Technology corporation. |
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// Copyright 2018 Google, Inc. |
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#define pr_fmt(fmt) "nuvoton,npcm7xx-smp: " fmt |
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#include <linux/delay.h> |
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#include <linux/device.h> |
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#include <linux/smp.h> |
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#include <linux/io.h> |
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#include <linux/of.h> |
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#include <linux/of_device.h> |
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#include <linux/of_platform.h> |
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#include <linux/of_address.h> |
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#include <asm/cacheflush.h> |
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#include <asm/smp.h> |
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#include <asm/smp_plat.h> |
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#include <asm/smp_scu.h> |
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#define NPCM7XX_SCRPAD_REG 0x13c |
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extern void npcm7xx_secondary_startup(void); |
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static int npcm7xx_smp_boot_secondary(unsigned int cpu, |
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struct task_struct *idle) |
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{ |
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struct device_node *gcr_np; |
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void __iomem *gcr_base; |
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int ret = 0; |
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gcr_np = of_find_compatible_node(NULL, NULL, "nuvoton,npcm750-gcr"); |
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if (!gcr_np) { |
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pr_err("no gcr device node\n"); |
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ret = -ENODEV; |
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goto out; |
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} |
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gcr_base = of_iomap(gcr_np, 0); |
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if (!gcr_base) { |
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pr_err("could not iomap gcr"); |
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ret = -ENOMEM; |
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goto out; |
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} |
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/* give boot ROM kernel start address. */ |
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iowrite32(__pa_symbol(npcm7xx_secondary_startup), gcr_base + |
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NPCM7XX_SCRPAD_REG); |
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/* make sure the previous write is seen by all observers. */ |
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dsb_sev(); |
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iounmap(gcr_base); |
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out: |
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return ret; |
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} |
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static void __init npcm7xx_smp_prepare_cpus(unsigned int max_cpus) |
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{ |
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struct device_node *scu_np; |
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void __iomem *scu_base; |
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scu_np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu"); |
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if (!scu_np) { |
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pr_err("no scu device node\n"); |
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return; |
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} |
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scu_base = of_iomap(scu_np, 0); |
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if (!scu_base) { |
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pr_err("could not iomap scu"); |
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return; |
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} |
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scu_enable(scu_base); |
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iounmap(scu_base); |
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} |
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static struct smp_operations npcm7xx_smp_ops __initdata = { |
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.smp_prepare_cpus = npcm7xx_smp_prepare_cpus, |
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.smp_boot_secondary = npcm7xx_smp_boot_secondary, |
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}; |
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CPU_METHOD_OF_DECLARE(npcm7xx_smp, "nuvoton,npcm750-smp", &npcm7xx_smp_ops);
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