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270 lines
6.3 KiB
270 lines
6.3 KiB
/* |
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* Suspend/resume support. Currently supporting Armada XP only. |
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* |
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* Copyright (C) 2014 Marvell |
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* |
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* Thomas Petazzoni <[email protected]> |
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* |
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* This file is licensed under the terms of the GNU General Public |
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* License version 2. This program is licensed "as is" without any |
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* warranty of any kind, whether express or implied. |
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*/ |
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#include <linux/cpu_pm.h> |
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#include <linux/delay.h> |
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#include <linux/gpio.h> |
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#include <linux/io.h> |
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#include <linux/kernel.h> |
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#include <linux/mbus.h> |
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#include <linux/of_address.h> |
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#include <linux/suspend.h> |
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#include <asm/cacheflush.h> |
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#include <asm/outercache.h> |
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#include <asm/suspend.h> |
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#include "coherency.h" |
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#include "common.h" |
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#include "pmsu.h" |
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#define SDRAM_CONFIG_OFFS 0x0 |
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#define SDRAM_CONFIG_SR_MODE_BIT BIT(24) |
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#define SDRAM_OPERATION_OFFS 0x18 |
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#define SDRAM_OPERATION_SELF_REFRESH 0x7 |
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#define SDRAM_DLB_EVICTION_OFFS 0x30c |
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#define SDRAM_DLB_EVICTION_THRESHOLD_MASK 0xff |
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static void (*mvebu_board_pm_enter)(void __iomem *sdram_reg, u32 srcmd); |
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static void __iomem *sdram_ctrl; |
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static int mvebu_pm_powerdown(unsigned long data) |
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{ |
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u32 reg, srcmd; |
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flush_cache_all(); |
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outer_flush_all(); |
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/* |
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* Issue a Data Synchronization Barrier instruction to ensure |
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* that all state saving has been completed. |
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*/ |
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dsb(); |
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/* Flush the DLB and wait ~7 usec */ |
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reg = readl(sdram_ctrl + SDRAM_DLB_EVICTION_OFFS); |
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reg &= ~SDRAM_DLB_EVICTION_THRESHOLD_MASK; |
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writel(reg, sdram_ctrl + SDRAM_DLB_EVICTION_OFFS); |
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udelay(7); |
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/* Set DRAM in battery backup mode */ |
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reg = readl(sdram_ctrl + SDRAM_CONFIG_OFFS); |
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reg &= ~SDRAM_CONFIG_SR_MODE_BIT; |
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writel(reg, sdram_ctrl + SDRAM_CONFIG_OFFS); |
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/* Prepare to go to self-refresh */ |
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srcmd = readl(sdram_ctrl + SDRAM_OPERATION_OFFS); |
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srcmd &= ~0x1F; |
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srcmd |= SDRAM_OPERATION_SELF_REFRESH; |
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mvebu_board_pm_enter(sdram_ctrl + SDRAM_OPERATION_OFFS, srcmd); |
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return 0; |
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} |
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#define BOOT_INFO_ADDR 0x3000 |
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#define BOOT_MAGIC_WORD 0xdeadb002 |
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#define BOOT_MAGIC_LIST_END 0xffffffff |
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/* |
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* Those registers are accessed before switching the internal register |
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* base, which is why we hardcode the 0xd0000000 base address, the one |
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* used by the SoC out of reset. |
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*/ |
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#define MBUS_WINDOW_12_CTRL 0xd00200b0 |
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#define MBUS_INTERNAL_REG_ADDRESS 0xd0020080 |
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#define SDRAM_WIN_BASE_REG(x) (0x20180 + (0x8*x)) |
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#define SDRAM_WIN_CTRL_REG(x) (0x20184 + (0x8*x)) |
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static phys_addr_t mvebu_internal_reg_base(void) |
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{ |
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struct device_node *np; |
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__be32 in_addr[2]; |
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np = of_find_node_by_name(NULL, "internal-regs"); |
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BUG_ON(!np); |
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/* |
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* Ask the DT what is the internal register address on this |
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* platform. In the mvebu-mbus DT binding, 0xf0010000 |
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* corresponds to the internal register window. |
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*/ |
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in_addr[0] = cpu_to_be32(0xf0010000); |
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in_addr[1] = 0x0; |
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return of_translate_address(np, in_addr); |
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} |
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static void mvebu_pm_store_armadaxp_bootinfo(u32 *store_addr) |
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{ |
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phys_addr_t resume_pc; |
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resume_pc = __pa_symbol(armada_370_xp_cpu_resume); |
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/* |
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* The bootloader expects the first two words to be a magic |
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* value (BOOT_MAGIC_WORD), followed by the address of the |
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* resume code to jump to. Then, it expects a sequence of |
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* (address, value) pairs, which can be used to restore the |
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* value of certain registers. This sequence must end with the |
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* BOOT_MAGIC_LIST_END magic value. |
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*/ |
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writel(BOOT_MAGIC_WORD, store_addr++); |
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writel(resume_pc, store_addr++); |
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/* |
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* Some platforms remap their internal register base address |
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* to 0xf1000000. However, out of reset, window 12 starts at |
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* 0xf0000000 and ends at 0xf7ffffff, which would overlap with |
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* the internal registers. Therefore, disable window 12. |
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*/ |
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writel(MBUS_WINDOW_12_CTRL, store_addr++); |
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writel(0x0, store_addr++); |
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/* |
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* Set the internal register base address to the value |
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* expected by Linux, as read from the Device Tree. |
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*/ |
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writel(MBUS_INTERNAL_REG_ADDRESS, store_addr++); |
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writel(mvebu_internal_reg_base(), store_addr++); |
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/* |
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* Ask the mvebu-mbus driver to store the SDRAM window |
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* configuration, which has to be restored by the bootloader |
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* before re-entering the kernel on resume. |
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*/ |
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store_addr += mvebu_mbus_save_cpu_target(store_addr); |
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writel(BOOT_MAGIC_LIST_END, store_addr); |
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} |
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static int mvebu_pm_store_bootinfo(void) |
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{ |
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u32 *store_addr; |
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store_addr = phys_to_virt(BOOT_INFO_ADDR); |
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if (of_machine_is_compatible("marvell,armadaxp")) |
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mvebu_pm_store_armadaxp_bootinfo(store_addr); |
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else |
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return -ENODEV; |
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return 0; |
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} |
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static int mvebu_enter_suspend(void) |
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{ |
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int ret; |
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ret = mvebu_pm_store_bootinfo(); |
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if (ret) |
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return ret; |
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cpu_pm_enter(); |
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cpu_suspend(0, mvebu_pm_powerdown); |
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outer_resume(); |
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mvebu_v7_pmsu_idle_exit(); |
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set_cpu_coherent(); |
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cpu_pm_exit(); |
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return 0; |
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} |
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static int mvebu_pm_enter(suspend_state_t state) |
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{ |
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switch (state) { |
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case PM_SUSPEND_STANDBY: |
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cpu_do_idle(); |
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break; |
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case PM_SUSPEND_MEM: |
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pr_warn("Entering suspend to RAM. Only special wake-up sources will resume the system\n"); |
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return mvebu_enter_suspend(); |
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default: |
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return -EINVAL; |
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} |
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return 0; |
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} |
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static int mvebu_pm_valid(suspend_state_t state) |
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{ |
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if (state == PM_SUSPEND_STANDBY) |
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return 1; |
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if (state == PM_SUSPEND_MEM && mvebu_board_pm_enter != NULL) |
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return 1; |
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return 0; |
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} |
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static const struct platform_suspend_ops mvebu_pm_ops = { |
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.enter = mvebu_pm_enter, |
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.valid = mvebu_pm_valid, |
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}; |
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static int __init mvebu_pm_init(void) |
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{ |
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if (!of_machine_is_compatible("marvell,armadaxp") && |
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!of_machine_is_compatible("marvell,armada370") && |
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!of_machine_is_compatible("marvell,armada380") && |
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!of_machine_is_compatible("marvell,armada390")) |
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return -ENODEV; |
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suspend_set_ops(&mvebu_pm_ops); |
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return 0; |
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} |
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late_initcall(mvebu_pm_init); |
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int __init mvebu_pm_suspend_init(void (*board_pm_enter)(void __iomem *sdram_reg, |
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u32 srcmd)) |
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{ |
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struct device_node *np; |
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struct resource res; |
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np = of_find_compatible_node(NULL, NULL, |
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"marvell,armada-xp-sdram-controller"); |
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if (!np) |
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return -ENODEV; |
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if (of_address_to_resource(np, 0, &res)) { |
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of_node_put(np); |
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return -ENODEV; |
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} |
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if (!request_mem_region(res.start, resource_size(&res), |
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np->full_name)) { |
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of_node_put(np); |
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return -EBUSY; |
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} |
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sdram_ctrl = ioremap(res.start, resource_size(&res)); |
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if (!sdram_ctrl) { |
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release_mem_region(res.start, resource_size(&res)); |
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of_node_put(np); |
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return -ENOMEM; |
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} |
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of_node_put(np); |
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mvebu_board_pm_enter = board_pm_enter; |
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return 0; |
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}
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