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461 lines
8.8 KiB
461 lines
8.8 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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#ifndef _ALPHA_BITOPS_H |
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#define _ALPHA_BITOPS_H |
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#ifndef _LINUX_BITOPS_H |
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#error only <linux/bitops.h> can be included directly |
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#endif |
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#include <asm/compiler.h> |
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#include <asm/barrier.h> |
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/* |
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* Copyright 1994, Linus Torvalds. |
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*/ |
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/* |
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* These have to be done with inline assembly: that way the bit-setting |
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* is guaranteed to be atomic. All bit operations return 0 if the bit |
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* was cleared before the operation and != 0 if it was not. |
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* |
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* To get proper branch prediction for the main line, we must branch |
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* forward to code at the end of this object's .text section, then |
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* branch back to restart the operation. |
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* |
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* bit 0 is the LSB of addr; bit 64 is the LSB of (addr+1). |
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*/ |
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static inline void |
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set_bit(unsigned long nr, volatile void * addr) |
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{ |
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unsigned long temp; |
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int *m = ((int *) addr) + (nr >> 5); |
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__asm__ __volatile__( |
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"1: ldl_l %0,%3\n" |
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" bis %0,%2,%0\n" |
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" stl_c %0,%1\n" |
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" beq %0,2f\n" |
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".subsection 2\n" |
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"2: br 1b\n" |
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".previous" |
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:"=&r" (temp), "=m" (*m) |
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:"Ir" (1UL << (nr & 31)), "m" (*m)); |
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} |
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/* |
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* WARNING: non atomic version. |
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*/ |
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static inline void |
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__set_bit(unsigned long nr, volatile void * addr) |
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{ |
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int *m = ((int *) addr) + (nr >> 5); |
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*m |= 1 << (nr & 31); |
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} |
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static inline void |
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clear_bit(unsigned long nr, volatile void * addr) |
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{ |
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unsigned long temp; |
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int *m = ((int *) addr) + (nr >> 5); |
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__asm__ __volatile__( |
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"1: ldl_l %0,%3\n" |
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" bic %0,%2,%0\n" |
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" stl_c %0,%1\n" |
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" beq %0,2f\n" |
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".subsection 2\n" |
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"2: br 1b\n" |
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".previous" |
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:"=&r" (temp), "=m" (*m) |
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:"Ir" (1UL << (nr & 31)), "m" (*m)); |
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} |
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static inline void |
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clear_bit_unlock(unsigned long nr, volatile void * addr) |
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{ |
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smp_mb(); |
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clear_bit(nr, addr); |
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} |
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/* |
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* WARNING: non atomic version. |
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*/ |
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static __inline__ void |
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__clear_bit(unsigned long nr, volatile void * addr) |
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{ |
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int *m = ((int *) addr) + (nr >> 5); |
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*m &= ~(1 << (nr & 31)); |
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} |
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static inline void |
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__clear_bit_unlock(unsigned long nr, volatile void * addr) |
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{ |
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smp_mb(); |
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__clear_bit(nr, addr); |
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} |
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static inline void |
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change_bit(unsigned long nr, volatile void * addr) |
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{ |
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unsigned long temp; |
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int *m = ((int *) addr) + (nr >> 5); |
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__asm__ __volatile__( |
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"1: ldl_l %0,%3\n" |
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" xor %0,%2,%0\n" |
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" stl_c %0,%1\n" |
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" beq %0,2f\n" |
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".subsection 2\n" |
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"2: br 1b\n" |
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".previous" |
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:"=&r" (temp), "=m" (*m) |
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:"Ir" (1UL << (nr & 31)), "m" (*m)); |
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} |
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/* |
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* WARNING: non atomic version. |
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*/ |
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static __inline__ void |
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__change_bit(unsigned long nr, volatile void * addr) |
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{ |
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int *m = ((int *) addr) + (nr >> 5); |
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*m ^= 1 << (nr & 31); |
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} |
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static inline int |
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test_and_set_bit(unsigned long nr, volatile void *addr) |
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{ |
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unsigned long oldbit; |
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unsigned long temp; |
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int *m = ((int *) addr) + (nr >> 5); |
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__asm__ __volatile__( |
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#ifdef CONFIG_SMP |
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" mb\n" |
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#endif |
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"1: ldl_l %0,%4\n" |
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" and %0,%3,%2\n" |
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" bne %2,2f\n" |
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" xor %0,%3,%0\n" |
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" stl_c %0,%1\n" |
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" beq %0,3f\n" |
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"2:\n" |
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#ifdef CONFIG_SMP |
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" mb\n" |
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#endif |
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".subsection 2\n" |
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"3: br 1b\n" |
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".previous" |
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:"=&r" (temp), "=m" (*m), "=&r" (oldbit) |
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:"Ir" (1UL << (nr & 31)), "m" (*m) : "memory"); |
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return oldbit != 0; |
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} |
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static inline int |
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test_and_set_bit_lock(unsigned long nr, volatile void *addr) |
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{ |
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unsigned long oldbit; |
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unsigned long temp; |
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int *m = ((int *) addr) + (nr >> 5); |
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__asm__ __volatile__( |
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"1: ldl_l %0,%4\n" |
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" and %0,%3,%2\n" |
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" bne %2,2f\n" |
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" xor %0,%3,%0\n" |
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" stl_c %0,%1\n" |
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" beq %0,3f\n" |
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"2:\n" |
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#ifdef CONFIG_SMP |
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" mb\n" |
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#endif |
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".subsection 2\n" |
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"3: br 1b\n" |
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".previous" |
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:"=&r" (temp), "=m" (*m), "=&r" (oldbit) |
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:"Ir" (1UL << (nr & 31)), "m" (*m) : "memory"); |
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return oldbit != 0; |
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} |
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/* |
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* WARNING: non atomic version. |
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*/ |
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static inline int |
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__test_and_set_bit(unsigned long nr, volatile void * addr) |
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{ |
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unsigned long mask = 1 << (nr & 0x1f); |
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int *m = ((int *) addr) + (nr >> 5); |
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int old = *m; |
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*m = old | mask; |
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return (old & mask) != 0; |
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} |
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static inline int |
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test_and_clear_bit(unsigned long nr, volatile void * addr) |
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{ |
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unsigned long oldbit; |
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unsigned long temp; |
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int *m = ((int *) addr) + (nr >> 5); |
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__asm__ __volatile__( |
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#ifdef CONFIG_SMP |
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" mb\n" |
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#endif |
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"1: ldl_l %0,%4\n" |
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" and %0,%3,%2\n" |
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" beq %2,2f\n" |
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" xor %0,%3,%0\n" |
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" stl_c %0,%1\n" |
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" beq %0,3f\n" |
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"2:\n" |
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#ifdef CONFIG_SMP |
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" mb\n" |
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#endif |
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".subsection 2\n" |
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"3: br 1b\n" |
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".previous" |
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:"=&r" (temp), "=m" (*m), "=&r" (oldbit) |
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:"Ir" (1UL << (nr & 31)), "m" (*m) : "memory"); |
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return oldbit != 0; |
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} |
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/* |
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* WARNING: non atomic version. |
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*/ |
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static inline int |
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__test_and_clear_bit(unsigned long nr, volatile void * addr) |
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{ |
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unsigned long mask = 1 << (nr & 0x1f); |
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int *m = ((int *) addr) + (nr >> 5); |
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int old = *m; |
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*m = old & ~mask; |
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return (old & mask) != 0; |
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} |
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static inline int |
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test_and_change_bit(unsigned long nr, volatile void * addr) |
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{ |
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unsigned long oldbit; |
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unsigned long temp; |
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int *m = ((int *) addr) + (nr >> 5); |
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__asm__ __volatile__( |
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#ifdef CONFIG_SMP |
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" mb\n" |
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#endif |
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"1: ldl_l %0,%4\n" |
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" and %0,%3,%2\n" |
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" xor %0,%3,%0\n" |
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" stl_c %0,%1\n" |
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" beq %0,3f\n" |
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#ifdef CONFIG_SMP |
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" mb\n" |
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#endif |
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".subsection 2\n" |
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"3: br 1b\n" |
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".previous" |
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:"=&r" (temp), "=m" (*m), "=&r" (oldbit) |
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:"Ir" (1UL << (nr & 31)), "m" (*m) : "memory"); |
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return oldbit != 0; |
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} |
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/* |
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* WARNING: non atomic version. |
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*/ |
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static __inline__ int |
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__test_and_change_bit(unsigned long nr, volatile void * addr) |
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{ |
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unsigned long mask = 1 << (nr & 0x1f); |
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int *m = ((int *) addr) + (nr >> 5); |
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int old = *m; |
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*m = old ^ mask; |
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return (old & mask) != 0; |
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} |
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static inline int |
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test_bit(int nr, const volatile void * addr) |
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{ |
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return (1UL & (((const int *) addr)[nr >> 5] >> (nr & 31))) != 0UL; |
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} |
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/* |
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* ffz = Find First Zero in word. Undefined if no zero exists, |
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* so code should check against ~0UL first.. |
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* |
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* Do a binary search on the bits. Due to the nature of large |
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* constants on the alpha, it is worthwhile to split the search. |
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*/ |
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static inline unsigned long ffz_b(unsigned long x) |
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{ |
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unsigned long sum, x1, x2, x4; |
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x = ~x & -~x; /* set first 0 bit, clear others */ |
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x1 = x & 0xAA; |
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x2 = x & 0xCC; |
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x4 = x & 0xF0; |
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sum = x2 ? 2 : 0; |
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sum += (x4 != 0) * 4; |
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sum += (x1 != 0); |
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return sum; |
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} |
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static inline unsigned long ffz(unsigned long word) |
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{ |
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#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67) |
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/* Whee. EV67 can calculate it directly. */ |
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return __kernel_cttz(~word); |
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#else |
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unsigned long bits, qofs, bofs; |
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bits = __kernel_cmpbge(word, ~0UL); |
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qofs = ffz_b(bits); |
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bits = __kernel_extbl(word, qofs); |
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bofs = ffz_b(bits); |
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return qofs*8 + bofs; |
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#endif |
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} |
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/* |
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* __ffs = Find First set bit in word. Undefined if no set bit exists. |
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*/ |
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static inline unsigned long __ffs(unsigned long word) |
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{ |
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#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67) |
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/* Whee. EV67 can calculate it directly. */ |
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return __kernel_cttz(word); |
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#else |
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unsigned long bits, qofs, bofs; |
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bits = __kernel_cmpbge(0, word); |
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qofs = ffz_b(bits); |
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bits = __kernel_extbl(word, qofs); |
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bofs = ffz_b(~bits); |
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return qofs*8 + bofs; |
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#endif |
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} |
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#ifdef __KERNEL__ |
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/* |
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* ffs: find first bit set. This is defined the same way as |
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* the libc and compiler builtin ffs routines, therefore |
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* differs in spirit from the above __ffs. |
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*/ |
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static inline int ffs(int word) |
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{ |
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int result = __ffs(word) + 1; |
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return word ? result : 0; |
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} |
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/* |
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* fls: find last bit set. |
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*/ |
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#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67) |
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static inline int fls64(unsigned long word) |
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{ |
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return 64 - __kernel_ctlz(word); |
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} |
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#else |
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extern const unsigned char __flsm1_tab[256]; |
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static inline int fls64(unsigned long x) |
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{ |
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unsigned long t, a, r; |
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t = __kernel_cmpbge (x, 0x0101010101010101UL); |
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a = __flsm1_tab[t]; |
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t = __kernel_extbl (x, a); |
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r = a*8 + __flsm1_tab[t] + (x != 0); |
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return r; |
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} |
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#endif |
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static inline unsigned long __fls(unsigned long x) |
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{ |
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return fls64(x) - 1; |
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} |
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static inline int fls(unsigned int x) |
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{ |
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return fls64(x); |
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} |
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/* |
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* hweightN: returns the hamming weight (i.e. the number |
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* of bits set) of a N-bit word |
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*/ |
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#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67) |
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/* Whee. EV67 can calculate it directly. */ |
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static inline unsigned long __arch_hweight64(unsigned long w) |
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{ |
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return __kernel_ctpop(w); |
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} |
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static inline unsigned int __arch_hweight32(unsigned int w) |
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{ |
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return __arch_hweight64(w); |
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} |
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static inline unsigned int __arch_hweight16(unsigned int w) |
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{ |
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return __arch_hweight64(w & 0xffff); |
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} |
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static inline unsigned int __arch_hweight8(unsigned int w) |
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{ |
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return __arch_hweight64(w & 0xff); |
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} |
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#else |
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#include <asm-generic/bitops/arch_hweight.h> |
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#endif |
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#include <asm-generic/bitops/const_hweight.h> |
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#endif /* __KERNEL__ */ |
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#include <asm-generic/bitops/find.h> |
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#ifdef __KERNEL__ |
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/* |
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* Every architecture must define this function. It's the fastest |
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* way of searching a 100-bit bitmap. It's guaranteed that at least |
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* one of the 100 bits is cleared. |
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*/ |
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static inline unsigned long |
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sched_find_first_bit(const unsigned long b[2]) |
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{ |
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unsigned long b0, b1, ofs, tmp; |
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b0 = b[0]; |
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b1 = b[1]; |
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ofs = (b0 ? 0 : 64); |
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tmp = (b0 ? b0 : b1); |
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return __ffs(tmp) + ofs; |
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} |
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#include <asm-generic/bitops/le.h> |
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#include <asm-generic/bitops/ext2-atomic-setbit.h> |
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#endif /* __KERNEL__ */ |
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#endif /* _ALPHA_BITOPS_H */
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