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547 lines
15 KiB
547 lines
15 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* AD1843 low level driver |
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* |
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* Copyright 2003 Vivien Chappelier <[email protected]> |
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* Copyright 2008 Thomas Bogendoerfer <[email protected]> |
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* |
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* inspired from vwsnd.c (SGI VW audio driver) |
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* Copyright 1999 Silicon Graphics, Inc. All rights reserved. |
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*/ |
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#include <linux/init.h> |
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#include <linux/sched.h> |
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#include <linux/errno.h> |
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#include <sound/core.h> |
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#include <sound/pcm.h> |
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#include <sound/ad1843.h> |
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/* |
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* AD1843 bitfield definitions. All are named as in the AD1843 data |
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* sheet, with ad1843_ prepended and individual bit numbers removed. |
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* |
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* E.g., bits LSS0 through LSS2 become ad1843_LSS. |
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* |
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* Only the bitfields we need are defined. |
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*/ |
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struct ad1843_bitfield { |
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char reg; |
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char lo_bit; |
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char nbits; |
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}; |
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static const struct ad1843_bitfield |
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ad1843_PDNO = { 0, 14, 1 }, /* Converter Power-Down Flag */ |
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ad1843_INIT = { 0, 15, 1 }, /* Clock Initialization Flag */ |
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ad1843_RIG = { 2, 0, 4 }, /* Right ADC Input Gain */ |
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ad1843_RMGE = { 2, 4, 1 }, /* Right ADC Mic Gain Enable */ |
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ad1843_RSS = { 2, 5, 3 }, /* Right ADC Source Select */ |
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ad1843_LIG = { 2, 8, 4 }, /* Left ADC Input Gain */ |
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ad1843_LMGE = { 2, 12, 1 }, /* Left ADC Mic Gain Enable */ |
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ad1843_LSS = { 2, 13, 3 }, /* Left ADC Source Select */ |
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ad1843_RD2M = { 3, 0, 5 }, /* Right DAC 2 Mix Gain/Atten */ |
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ad1843_RD2MM = { 3, 7, 1 }, /* Right DAC 2 Mix Mute */ |
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ad1843_LD2M = { 3, 8, 5 }, /* Left DAC 2 Mix Gain/Atten */ |
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ad1843_LD2MM = { 3, 15, 1 }, /* Left DAC 2 Mix Mute */ |
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ad1843_RX1M = { 4, 0, 5 }, /* Right Aux 1 Mix Gain/Atten */ |
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ad1843_RX1MM = { 4, 7, 1 }, /* Right Aux 1 Mix Mute */ |
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ad1843_LX1M = { 4, 8, 5 }, /* Left Aux 1 Mix Gain/Atten */ |
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ad1843_LX1MM = { 4, 15, 1 }, /* Left Aux 1 Mix Mute */ |
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ad1843_RX2M = { 5, 0, 5 }, /* Right Aux 2 Mix Gain/Atten */ |
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ad1843_RX2MM = { 5, 7, 1 }, /* Right Aux 2 Mix Mute */ |
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ad1843_LX2M = { 5, 8, 5 }, /* Left Aux 2 Mix Gain/Atten */ |
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ad1843_LX2MM = { 5, 15, 1 }, /* Left Aux 2 Mix Mute */ |
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ad1843_RMCM = { 7, 0, 5 }, /* Right Mic Mix Gain/Atten */ |
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ad1843_RMCMM = { 7, 7, 1 }, /* Right Mic Mix Mute */ |
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ad1843_LMCM = { 7, 8, 5 }, /* Left Mic Mix Gain/Atten */ |
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ad1843_LMCMM = { 7, 15, 1 }, /* Left Mic Mix Mute */ |
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ad1843_HPOS = { 8, 4, 1 }, /* Headphone Output Voltage Swing */ |
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ad1843_HPOM = { 8, 5, 1 }, /* Headphone Output Mute */ |
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ad1843_MPOM = { 8, 6, 1 }, /* Mono Output Mute */ |
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ad1843_RDA1G = { 9, 0, 6 }, /* Right DAC1 Analog/Digital Gain */ |
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ad1843_RDA1GM = { 9, 7, 1 }, /* Right DAC1 Analog Mute */ |
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ad1843_LDA1G = { 9, 8, 6 }, /* Left DAC1 Analog/Digital Gain */ |
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ad1843_LDA1GM = { 9, 15, 1 }, /* Left DAC1 Analog Mute */ |
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ad1843_RDA2G = { 10, 0, 6 }, /* Right DAC2 Analog/Digital Gain */ |
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ad1843_RDA2GM = { 10, 7, 1 }, /* Right DAC2 Analog Mute */ |
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ad1843_LDA2G = { 10, 8, 6 }, /* Left DAC2 Analog/Digital Gain */ |
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ad1843_LDA2GM = { 10, 15, 1 }, /* Left DAC2 Analog Mute */ |
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ad1843_RDA1AM = { 11, 7, 1 }, /* Right DAC1 Digital Mute */ |
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ad1843_LDA1AM = { 11, 15, 1 }, /* Left DAC1 Digital Mute */ |
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ad1843_RDA2AM = { 12, 7, 1 }, /* Right DAC2 Digital Mute */ |
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ad1843_LDA2AM = { 12, 15, 1 }, /* Left DAC2 Digital Mute */ |
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ad1843_ADLC = { 15, 0, 2 }, /* ADC Left Sample Rate Source */ |
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ad1843_ADRC = { 15, 2, 2 }, /* ADC Right Sample Rate Source */ |
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ad1843_DA1C = { 15, 8, 2 }, /* DAC1 Sample Rate Source */ |
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ad1843_DA2C = { 15, 10, 2 }, /* DAC2 Sample Rate Source */ |
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ad1843_C1C = { 17, 0, 16 }, /* Clock 1 Sample Rate Select */ |
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ad1843_C2C = { 20, 0, 16 }, /* Clock 2 Sample Rate Select */ |
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ad1843_C3C = { 23, 0, 16 }, /* Clock 3 Sample Rate Select */ |
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ad1843_DAADL = { 25, 4, 2 }, /* Digital ADC Left Source Select */ |
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ad1843_DAADR = { 25, 6, 2 }, /* Digital ADC Right Source Select */ |
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ad1843_DAMIX = { 25, 14, 1 }, /* DAC Digital Mix Enable */ |
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ad1843_DRSFLT = { 25, 15, 1 }, /* Digital Reampler Filter Mode */ |
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ad1843_ADLF = { 26, 0, 2 }, /* ADC Left Channel Data Format */ |
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ad1843_ADRF = { 26, 2, 2 }, /* ADC Right Channel Data Format */ |
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ad1843_ADTLK = { 26, 4, 1 }, /* ADC Transmit Lock Mode Select */ |
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ad1843_SCF = { 26, 7, 1 }, /* SCLK Frequency Select */ |
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ad1843_DA1F = { 26, 8, 2 }, /* DAC1 Data Format Select */ |
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ad1843_DA2F = { 26, 10, 2 }, /* DAC2 Data Format Select */ |
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ad1843_DA1SM = { 26, 14, 1 }, /* DAC1 Stereo/Mono Mode Select */ |
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ad1843_DA2SM = { 26, 15, 1 }, /* DAC2 Stereo/Mono Mode Select */ |
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ad1843_ADLEN = { 27, 0, 1 }, /* ADC Left Channel Enable */ |
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ad1843_ADREN = { 27, 1, 1 }, /* ADC Right Channel Enable */ |
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ad1843_AAMEN = { 27, 4, 1 }, /* Analog to Analog Mix Enable */ |
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ad1843_ANAEN = { 27, 7, 1 }, /* Analog Channel Enable */ |
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ad1843_DA1EN = { 27, 8, 1 }, /* DAC1 Enable */ |
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ad1843_DA2EN = { 27, 9, 1 }, /* DAC2 Enable */ |
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ad1843_DDMEN = { 27, 12, 1 }, /* DAC2 to DAC1 Mix Enable */ |
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ad1843_C1EN = { 28, 11, 1 }, /* Clock Generator 1 Enable */ |
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ad1843_C2EN = { 28, 12, 1 }, /* Clock Generator 2 Enable */ |
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ad1843_C3EN = { 28, 13, 1 }, /* Clock Generator 3 Enable */ |
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ad1843_PDNI = { 28, 15, 1 }; /* Converter Power Down */ |
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/* |
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* The various registers of the AD1843 use three different formats for |
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* specifying gain. The ad1843_gain structure parameterizes the |
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* formats. |
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*/ |
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struct ad1843_gain { |
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int negative; /* nonzero if gain is negative. */ |
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const struct ad1843_bitfield *lfield; |
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const struct ad1843_bitfield *rfield; |
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const struct ad1843_bitfield *lmute; |
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const struct ad1843_bitfield *rmute; |
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}; |
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static const struct ad1843_gain ad1843_gain_RECLEV = { |
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.negative = 0, |
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.lfield = &ad1843_LIG, |
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.rfield = &ad1843_RIG |
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}; |
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static const struct ad1843_gain ad1843_gain_LINE = { |
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.negative = 1, |
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.lfield = &ad1843_LX1M, |
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.rfield = &ad1843_RX1M, |
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.lmute = &ad1843_LX1MM, |
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.rmute = &ad1843_RX1MM |
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}; |
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static const struct ad1843_gain ad1843_gain_LINE_2 = { |
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.negative = 1, |
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.lfield = &ad1843_LDA2G, |
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.rfield = &ad1843_RDA2G, |
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.lmute = &ad1843_LDA2GM, |
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.rmute = &ad1843_RDA2GM |
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}; |
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static const struct ad1843_gain ad1843_gain_MIC = { |
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.negative = 1, |
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.lfield = &ad1843_LMCM, |
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.rfield = &ad1843_RMCM, |
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.lmute = &ad1843_LMCMM, |
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.rmute = &ad1843_RMCMM |
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}; |
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static const struct ad1843_gain ad1843_gain_PCM_0 = { |
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.negative = 1, |
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.lfield = &ad1843_LDA1G, |
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.rfield = &ad1843_RDA1G, |
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.lmute = &ad1843_LDA1GM, |
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.rmute = &ad1843_RDA1GM |
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}; |
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static const struct ad1843_gain ad1843_gain_PCM_1 = { |
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.negative = 1, |
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.lfield = &ad1843_LD2M, |
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.rfield = &ad1843_RD2M, |
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.lmute = &ad1843_LD2MM, |
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.rmute = &ad1843_RD2MM |
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}; |
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static const struct ad1843_gain *ad1843_gain[AD1843_GAIN_SIZE] = |
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{ |
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&ad1843_gain_RECLEV, |
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&ad1843_gain_LINE, |
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&ad1843_gain_LINE_2, |
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&ad1843_gain_MIC, |
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&ad1843_gain_PCM_0, |
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&ad1843_gain_PCM_1, |
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}; |
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/* read the current value of an AD1843 bitfield. */ |
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static int ad1843_read_bits(struct snd_ad1843 *ad1843, |
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const struct ad1843_bitfield *field) |
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{ |
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int w; |
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w = ad1843->read(ad1843->chip, field->reg); |
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return w >> field->lo_bit & ((1 << field->nbits) - 1); |
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} |
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/* |
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* write a new value to an AD1843 bitfield and return the old value. |
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*/ |
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static int ad1843_write_bits(struct snd_ad1843 *ad1843, |
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const struct ad1843_bitfield *field, |
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int newval) |
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{ |
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int w, mask, oldval, newbits; |
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w = ad1843->read(ad1843->chip, field->reg); |
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mask = ((1 << field->nbits) - 1) << field->lo_bit; |
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oldval = (w & mask) >> field->lo_bit; |
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newbits = (newval << field->lo_bit) & mask; |
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w = (w & ~mask) | newbits; |
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ad1843->write(ad1843->chip, field->reg, w); |
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return oldval; |
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} |
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/* |
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* ad1843_read_multi reads multiple bitfields from the same AD1843 |
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* register. It uses a single read cycle to do it. (Reading the |
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* ad1843 requires 256 bit times at 12.288 MHz, or nearly 20 |
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* microseconds.) |
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* |
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* Called like this. |
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* |
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* ad1843_read_multi(ad1843, nfields, |
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* &ad1843_FIELD1, &val1, |
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* &ad1843_FIELD2, &val2, ...); |
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*/ |
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static void ad1843_read_multi(struct snd_ad1843 *ad1843, int argcount, ...) |
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{ |
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va_list ap; |
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const struct ad1843_bitfield *fp; |
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int w = 0, mask, *value, reg = -1; |
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va_start(ap, argcount); |
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while (--argcount >= 0) { |
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fp = va_arg(ap, const struct ad1843_bitfield *); |
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value = va_arg(ap, int *); |
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if (reg == -1) { |
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reg = fp->reg; |
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w = ad1843->read(ad1843->chip, reg); |
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} |
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mask = (1 << fp->nbits) - 1; |
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*value = w >> fp->lo_bit & mask; |
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} |
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va_end(ap); |
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} |
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/* |
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* ad1843_write_multi stores multiple bitfields into the same AD1843 |
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* register. It uses one read and one write cycle to do it. |
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* |
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* Called like this. |
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* |
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* ad1843_write_multi(ad1843, nfields, |
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* &ad1843_FIELD1, val1, |
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* &ad1843_FIELF2, val2, ...); |
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*/ |
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static void ad1843_write_multi(struct snd_ad1843 *ad1843, int argcount, ...) |
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{ |
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va_list ap; |
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int reg; |
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const struct ad1843_bitfield *fp; |
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int value; |
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int w, m, mask, bits; |
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mask = 0; |
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bits = 0; |
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reg = -1; |
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va_start(ap, argcount); |
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while (--argcount >= 0) { |
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fp = va_arg(ap, const struct ad1843_bitfield *); |
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value = va_arg(ap, int); |
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if (reg == -1) |
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reg = fp->reg; |
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else |
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WARN_ON(reg != fp->reg); |
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m = ((1 << fp->nbits) - 1) << fp->lo_bit; |
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mask |= m; |
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bits |= (value << fp->lo_bit) & m; |
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} |
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va_end(ap); |
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if (~mask & 0xFFFF) |
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w = ad1843->read(ad1843->chip, reg); |
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else |
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w = 0; |
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w = (w & ~mask) | bits; |
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ad1843->write(ad1843->chip, reg, w); |
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} |
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int ad1843_get_gain_max(struct snd_ad1843 *ad1843, int id) |
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{ |
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const struct ad1843_gain *gp = ad1843_gain[id]; |
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int ret; |
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ret = (1 << gp->lfield->nbits); |
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if (!gp->lmute) |
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ret -= 1; |
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return ret; |
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} |
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/* |
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* ad1843_get_gain reads the specified register and extracts the gain value |
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* using the supplied gain type. |
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*/ |
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int ad1843_get_gain(struct snd_ad1843 *ad1843, int id) |
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{ |
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int lg, rg, lm, rm; |
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const struct ad1843_gain *gp = ad1843_gain[id]; |
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unsigned short mask = (1 << gp->lfield->nbits) - 1; |
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ad1843_read_multi(ad1843, 2, gp->lfield, &lg, gp->rfield, &rg); |
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if (gp->negative) { |
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lg = mask - lg; |
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rg = mask - rg; |
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} |
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if (gp->lmute) { |
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ad1843_read_multi(ad1843, 2, gp->lmute, &lm, gp->rmute, &rm); |
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if (lm) |
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lg = 0; |
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if (rm) |
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rg = 0; |
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} |
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return lg << 0 | rg << 8; |
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} |
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/* |
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* Set an audio channel's gain. |
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* |
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* Returns the new gain, which may be lower than the old gain. |
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*/ |
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int ad1843_set_gain(struct snd_ad1843 *ad1843, int id, int newval) |
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{ |
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const struct ad1843_gain *gp = ad1843_gain[id]; |
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unsigned short mask = (1 << gp->lfield->nbits) - 1; |
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int lg = (newval >> 0) & mask; |
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int rg = (newval >> 8) & mask; |
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int lm = (lg == 0) ? 1 : 0; |
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int rm = (rg == 0) ? 1 : 0; |
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if (gp->negative) { |
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lg = mask - lg; |
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rg = mask - rg; |
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} |
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if (gp->lmute) |
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ad1843_write_multi(ad1843, 2, gp->lmute, lm, gp->rmute, rm); |
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ad1843_write_multi(ad1843, 2, gp->lfield, lg, gp->rfield, rg); |
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return ad1843_get_gain(ad1843, id); |
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} |
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/* Returns the current recording source */ |
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int ad1843_get_recsrc(struct snd_ad1843 *ad1843) |
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{ |
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int val = ad1843_read_bits(ad1843, &ad1843_LSS); |
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if (val < 0 || val > 2) { |
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val = 2; |
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ad1843_write_multi(ad1843, 2, |
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&ad1843_LSS, val, &ad1843_RSS, val); |
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} |
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return val; |
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} |
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/* |
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* Set recording source. |
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* |
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* Returns newsrc on success, -errno on failure. |
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*/ |
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int ad1843_set_recsrc(struct snd_ad1843 *ad1843, int newsrc) |
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{ |
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if (newsrc < 0 || newsrc > 2) |
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return -EINVAL; |
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ad1843_write_multi(ad1843, 2, &ad1843_LSS, newsrc, &ad1843_RSS, newsrc); |
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return newsrc; |
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} |
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/* Setup ad1843 for D/A conversion. */ |
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void ad1843_setup_dac(struct snd_ad1843 *ad1843, |
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unsigned int id, |
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unsigned int framerate, |
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snd_pcm_format_t fmt, |
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unsigned int channels) |
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{ |
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int ad_fmt = 0, ad_mode = 0; |
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switch (fmt) { |
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case SNDRV_PCM_FORMAT_S8: |
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ad_fmt = 0; |
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break; |
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case SNDRV_PCM_FORMAT_U8: |
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ad_fmt = 0; |
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break; |
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case SNDRV_PCM_FORMAT_S16_LE: |
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ad_fmt = 1; |
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break; |
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case SNDRV_PCM_FORMAT_MU_LAW: |
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ad_fmt = 2; |
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break; |
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case SNDRV_PCM_FORMAT_A_LAW: |
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ad_fmt = 3; |
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break; |
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default: |
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break; |
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} |
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switch (channels) { |
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case 2: |
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ad_mode = 0; |
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break; |
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case 1: |
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ad_mode = 1; |
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break; |
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default: |
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break; |
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} |
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if (id) { |
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ad1843_write_bits(ad1843, &ad1843_C2C, framerate); |
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ad1843_write_multi(ad1843, 2, |
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&ad1843_DA2SM, ad_mode, |
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&ad1843_DA2F, ad_fmt); |
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} else { |
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ad1843_write_bits(ad1843, &ad1843_C1C, framerate); |
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ad1843_write_multi(ad1843, 2, |
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&ad1843_DA1SM, ad_mode, |
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&ad1843_DA1F, ad_fmt); |
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} |
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} |
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void ad1843_shutdown_dac(struct snd_ad1843 *ad1843, unsigned int id) |
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{ |
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if (id) |
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ad1843_write_bits(ad1843, &ad1843_DA2F, 1); |
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else |
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ad1843_write_bits(ad1843, &ad1843_DA1F, 1); |
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} |
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void ad1843_setup_adc(struct snd_ad1843 *ad1843, |
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unsigned int framerate, |
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snd_pcm_format_t fmt, |
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unsigned int channels) |
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{ |
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int da_fmt = 0; |
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switch (fmt) { |
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case SNDRV_PCM_FORMAT_S8: da_fmt = 0; break; |
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case SNDRV_PCM_FORMAT_U8: da_fmt = 0; break; |
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case SNDRV_PCM_FORMAT_S16_LE: da_fmt = 1; break; |
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case SNDRV_PCM_FORMAT_MU_LAW: da_fmt = 2; break; |
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case SNDRV_PCM_FORMAT_A_LAW: da_fmt = 3; break; |
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default: break; |
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} |
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ad1843_write_bits(ad1843, &ad1843_C3C, framerate); |
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ad1843_write_multi(ad1843, 2, |
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&ad1843_ADLF, da_fmt, &ad1843_ADRF, da_fmt); |
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} |
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void ad1843_shutdown_adc(struct snd_ad1843 *ad1843) |
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{ |
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/* nothing to do */ |
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} |
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/* |
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* Fully initialize the ad1843. As described in the AD1843 data |
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* sheet, section "START-UP SEQUENCE". The numbered comments are |
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* subsection headings from the data sheet. See the data sheet, pages |
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* 52-54, for more info. |
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* |
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* return 0 on success, -errno on failure. */ |
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int ad1843_init(struct snd_ad1843 *ad1843) |
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{ |
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unsigned long later; |
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if (ad1843_read_bits(ad1843, &ad1843_INIT) != 0) { |
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printk(KERN_ERR "ad1843: AD1843 won't initialize\n"); |
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return -EIO; |
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} |
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ad1843_write_bits(ad1843, &ad1843_SCF, 1); |
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|
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/* 4. Put the conversion resources into standby. */ |
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ad1843_write_bits(ad1843, &ad1843_PDNI, 0); |
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later = jiffies + msecs_to_jiffies(500); |
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while (ad1843_read_bits(ad1843, &ad1843_PDNO)) { |
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if (time_after(jiffies, later)) { |
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printk(KERN_ERR |
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"ad1843: AD1843 won't power up\n"); |
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return -EIO; |
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} |
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schedule_timeout_interruptible(5); |
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} |
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|
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/* 5. Power up the clock generators and enable clock output pins. */ |
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ad1843_write_multi(ad1843, 3, |
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&ad1843_C1EN, 1, |
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&ad1843_C2EN, 1, |
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&ad1843_C3EN, 1); |
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|
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/* 6. Configure conversion resources while they are in standby. */ |
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|
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/* DAC1/2 use clock 1/2 as source, ADC uses clock 3. Always. */ |
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ad1843_write_multi(ad1843, 4, |
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&ad1843_DA1C, 1, |
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&ad1843_DA2C, 2, |
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&ad1843_ADLC, 3, |
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&ad1843_ADRC, 3); |
|
|
|
/* 7. Enable conversion resources. */ |
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ad1843_write_bits(ad1843, &ad1843_ADTLK, 1); |
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ad1843_write_multi(ad1843, 7, |
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&ad1843_ANAEN, 1, |
|
&ad1843_AAMEN, 1, |
|
&ad1843_DA1EN, 1, |
|
&ad1843_DA2EN, 1, |
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&ad1843_DDMEN, 1, |
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&ad1843_ADLEN, 1, |
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&ad1843_ADREN, 1); |
|
|
|
/* 8. Configure conversion resources while they are enabled. */ |
|
|
|
/* set gain to 0 for all channels */ |
|
ad1843_set_gain(ad1843, AD1843_GAIN_RECLEV, 0); |
|
ad1843_set_gain(ad1843, AD1843_GAIN_LINE, 0); |
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ad1843_set_gain(ad1843, AD1843_GAIN_LINE_2, 0); |
|
ad1843_set_gain(ad1843, AD1843_GAIN_MIC, 0); |
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ad1843_set_gain(ad1843, AD1843_GAIN_PCM_0, 0); |
|
ad1843_set_gain(ad1843, AD1843_GAIN_PCM_1, 0); |
|
|
|
/* Unmute all channels. */ |
|
/* DAC1 */ |
|
ad1843_write_multi(ad1843, 2, &ad1843_LDA1GM, 0, &ad1843_RDA1GM, 0); |
|
/* DAC2 */ |
|
ad1843_write_multi(ad1843, 2, &ad1843_LDA2GM, 0, &ad1843_RDA2GM, 0); |
|
|
|
/* Set default recording source to Line In and set |
|
* mic gain to +20 dB. |
|
*/ |
|
ad1843_set_recsrc(ad1843, 2); |
|
ad1843_write_multi(ad1843, 2, &ad1843_LMGE, 1, &ad1843_RMGE, 1); |
|
|
|
/* Set Speaker Out level to +/- 4V and unmute it. */ |
|
ad1843_write_multi(ad1843, 3, |
|
&ad1843_HPOS, 1, |
|
&ad1843_HPOM, 0, |
|
&ad1843_MPOM, 0); |
|
|
|
return 0; |
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}
|
|
|