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915 lines
26 KiB
915 lines
26 KiB
# SPDX-License-Identifier: GPL-2.0-only |
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menuconfig CRYPTO_HW |
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bool "Hardware crypto devices" |
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default y |
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help |
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Say Y here to get to see options for hardware crypto devices and |
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processors. This option alone does not add any kernel code. |
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If you say N, all options in this submenu will be skipped and disabled. |
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if CRYPTO_HW |
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source "drivers/crypto/allwinner/Kconfig" |
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config CRYPTO_DEV_PADLOCK |
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tristate "Support for VIA PadLock ACE" |
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depends on X86 && !UML |
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help |
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Some VIA processors come with an integrated crypto engine |
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(so called VIA PadLock ACE, Advanced Cryptography Engine) |
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that provides instructions for very fast cryptographic |
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operations with supported algorithms. |
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The instructions are used only when the CPU supports them. |
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Otherwise software encryption is used. |
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config CRYPTO_DEV_PADLOCK_AES |
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tristate "PadLock driver for AES algorithm" |
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depends on CRYPTO_DEV_PADLOCK |
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select CRYPTO_SKCIPHER |
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select CRYPTO_LIB_AES |
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help |
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Use VIA PadLock for AES algorithm. |
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Available in VIA C3 and newer CPUs. |
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If unsure say M. The compiled module will be |
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called padlock-aes. |
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config CRYPTO_DEV_PADLOCK_SHA |
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tristate "PadLock driver for SHA1 and SHA256 algorithms" |
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depends on CRYPTO_DEV_PADLOCK |
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select CRYPTO_HASH |
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select CRYPTO_SHA1 |
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select CRYPTO_SHA256 |
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help |
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Use VIA PadLock for SHA1/SHA256 algorithms. |
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Available in VIA C7 and newer processors. |
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If unsure say M. The compiled module will be |
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called padlock-sha. |
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config CRYPTO_DEV_GEODE |
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tristate "Support for the Geode LX AES engine" |
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depends on X86_32 && PCI |
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select CRYPTO_ALGAPI |
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select CRYPTO_SKCIPHER |
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help |
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Say 'Y' here to use the AMD Geode LX processor on-board AES |
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engine for the CryptoAPI AES algorithm. |
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To compile this driver as a module, choose M here: the module |
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will be called geode-aes. |
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config ZCRYPT |
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tristate "Support for s390 cryptographic adapters" |
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depends on S390 |
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select HW_RANDOM |
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help |
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Select this option if you want to enable support for |
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s390 cryptographic adapters like: |
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+ Crypto Express 2 up to 7 Coprocessor (CEXxC) |
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+ Crypto Express 2 up to 7 Accelerator (CEXxA) |
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+ Crypto Express 4 up to 7 EP11 Coprocessor (CEXxP) |
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config ZCRYPT_DEBUG |
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bool "Enable debug features for s390 cryptographic adapters" |
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default n |
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depends on DEBUG_KERNEL |
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depends on ZCRYPT |
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help |
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Say 'Y' here to enable some additional debug features on the |
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s390 cryptographic adapters driver. |
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There will be some more sysfs attributes displayed for ap cards |
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and queues and some flags on crypto requests are interpreted as |
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debugging messages to force error injection. |
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Do not enable on production level kernel build. |
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If unsure, say N. |
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config ZCRYPT_MULTIDEVNODES |
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bool "Support for multiple zcrypt device nodes" |
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default y |
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depends on S390 |
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depends on ZCRYPT |
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help |
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With this option enabled the zcrypt device driver can |
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provide multiple devices nodes in /dev. Each device |
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node can get customized to limit access and narrow |
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down the use of the available crypto hardware. |
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config PKEY |
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tristate "Kernel API for protected key handling" |
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depends on S390 |
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depends on ZCRYPT |
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help |
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With this option enabled the pkey kernel module provides an API |
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for creation and handling of protected keys. Other parts of the |
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kernel or userspace applications may use these functions. |
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Select this option if you want to enable the kernel and userspace |
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API for proteced key handling. |
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Please note that creation of protected keys from secure keys |
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requires to have at least one CEX card in coprocessor mode |
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available at runtime. |
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config CRYPTO_PAES_S390 |
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tristate "PAES cipher algorithms" |
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depends on S390 |
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depends on ZCRYPT |
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depends on PKEY |
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select CRYPTO_ALGAPI |
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select CRYPTO_SKCIPHER |
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help |
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This is the s390 hardware accelerated implementation of the |
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AES cipher algorithms for use with protected key. |
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Select this option if you want to use the paes cipher |
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for example to use protected key encrypted devices. |
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config CRYPTO_SHA1_S390 |
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tristate "SHA1 digest algorithm" |
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depends on S390 |
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select CRYPTO_HASH |
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help |
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This is the s390 hardware accelerated implementation of the |
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). |
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It is available as of z990. |
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config CRYPTO_SHA256_S390 |
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tristate "SHA256 digest algorithm" |
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depends on S390 |
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select CRYPTO_HASH |
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help |
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This is the s390 hardware accelerated implementation of the |
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SHA256 secure hash standard (DFIPS 180-2). |
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It is available as of z9. |
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config CRYPTO_SHA512_S390 |
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tristate "SHA384 and SHA512 digest algorithm" |
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depends on S390 |
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select CRYPTO_HASH |
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help |
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This is the s390 hardware accelerated implementation of the |
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SHA512 secure hash standard. |
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It is available as of z10. |
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config CRYPTO_SHA3_256_S390 |
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tristate "SHA3_224 and SHA3_256 digest algorithm" |
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depends on S390 |
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select CRYPTO_HASH |
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help |
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This is the s390 hardware accelerated implementation of the |
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SHA3_256 secure hash standard. |
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It is available as of z14. |
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config CRYPTO_SHA3_512_S390 |
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tristate "SHA3_384 and SHA3_512 digest algorithm" |
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depends on S390 |
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select CRYPTO_HASH |
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help |
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This is the s390 hardware accelerated implementation of the |
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SHA3_512 secure hash standard. |
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It is available as of z14. |
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config CRYPTO_DES_S390 |
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tristate "DES and Triple DES cipher algorithms" |
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depends on S390 |
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select CRYPTO_ALGAPI |
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select CRYPTO_SKCIPHER |
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select CRYPTO_LIB_DES |
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help |
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This is the s390 hardware accelerated implementation of the |
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DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). |
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As of z990 the ECB and CBC mode are hardware accelerated. |
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As of z196 the CTR mode is hardware accelerated. |
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config CRYPTO_AES_S390 |
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tristate "AES cipher algorithms" |
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depends on S390 |
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select CRYPTO_ALGAPI |
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select CRYPTO_SKCIPHER |
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help |
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This is the s390 hardware accelerated implementation of the |
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AES cipher algorithms (FIPS-197). |
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As of z9 the ECB and CBC modes are hardware accelerated |
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for 128 bit keys. |
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As of z10 the ECB and CBC modes are hardware accelerated |
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for all AES key sizes. |
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As of z196 the CTR mode is hardware accelerated for all AES |
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key sizes and XTS mode is hardware accelerated for 256 and |
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512 bit keys. |
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config S390_PRNG |
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tristate "Pseudo random number generator device driver" |
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depends on S390 |
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default "m" |
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help |
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Select this option if you want to use the s390 pseudo random number |
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generator. The PRNG is part of the cryptographic processor functions |
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and uses triple-DES to generate secure random numbers like the |
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ANSI X9.17 standard. User-space programs access the |
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pseudo-random-number device through the char device /dev/prandom. |
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It is available as of z9. |
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config CRYPTO_GHASH_S390 |
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tristate "GHASH hash function" |
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depends on S390 |
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select CRYPTO_HASH |
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help |
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This is the s390 hardware accelerated implementation of GHASH, |
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the hash function used in GCM (Galois/Counter mode). |
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It is available as of z196. |
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config CRYPTO_CRC32_S390 |
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tristate "CRC-32 algorithms" |
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depends on S390 |
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select CRYPTO_HASH |
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select CRC32 |
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help |
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Select this option if you want to use hardware accelerated |
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implementations of CRC algorithms. With this option, you |
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can optimize the computation of CRC-32 (IEEE 802.3 Ethernet) |
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and CRC-32C (Castagnoli). |
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It is available with IBM z13 or later. |
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config CRYPTO_DEV_NIAGARA2 |
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tristate "Niagara2 Stream Processing Unit driver" |
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select CRYPTO_LIB_DES |
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select CRYPTO_SKCIPHER |
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select CRYPTO_HASH |
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select CRYPTO_MD5 |
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select CRYPTO_SHA1 |
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select CRYPTO_SHA256 |
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depends on SPARC64 |
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help |
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Each core of a Niagara2 processor contains a Stream |
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Processing Unit, which itself contains several cryptographic |
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sub-units. One set provides the Modular Arithmetic Unit, |
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used for SSL offload. The other set provides the Cipher |
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Group, which can perform encryption, decryption, hashing, |
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checksumming, and raw copies. |
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config CRYPTO_DEV_SL3516 |
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tristate "Storlink SL3516 crypto offloader" |
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depends on ARCH_GEMINI || COMPILE_TEST |
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depends on HAS_IOMEM && PM |
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select CRYPTO_SKCIPHER |
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select CRYPTO_ENGINE |
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select CRYPTO_ECB |
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select CRYPTO_AES |
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select HW_RANDOM |
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help |
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This option allows you to have support for SL3516 crypto offloader. |
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config CRYPTO_DEV_SL3516_DEBUG |
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bool "Enable SL3516 stats" |
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depends on CRYPTO_DEV_SL3516 |
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depends on DEBUG_FS |
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help |
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Say y to enable SL3516 debug stats. |
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This will create /sys/kernel/debug/sl3516/stats for displaying |
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the number of requests per algorithm and other internal stats. |
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config CRYPTO_DEV_HIFN_795X |
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tristate "Driver HIFN 795x crypto accelerator chips" |
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select CRYPTO_LIB_DES |
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select CRYPTO_SKCIPHER |
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select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG |
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depends on PCI |
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depends on !ARCH_DMA_ADDR_T_64BIT |
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help |
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This option allows you to have support for HIFN 795x crypto adapters. |
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config CRYPTO_DEV_HIFN_795X_RNG |
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bool "HIFN 795x random number generator" |
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depends on CRYPTO_DEV_HIFN_795X |
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help |
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Select this option if you want to enable the random number generator |
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on the HIFN 795x crypto adapters. |
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source "drivers/crypto/caam/Kconfig" |
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config CRYPTO_DEV_TALITOS |
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tristate "Talitos Freescale Security Engine (SEC)" |
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select CRYPTO_AEAD |
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select CRYPTO_AUTHENC |
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select CRYPTO_SKCIPHER |
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select CRYPTO_HASH |
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select CRYPTO_LIB_DES |
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select HW_RANDOM |
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depends on FSL_SOC |
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help |
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Say 'Y' here to use the Freescale Security Engine (SEC) |
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to offload cryptographic algorithm computation. |
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The Freescale SEC is present on PowerQUICC 'E' processors, such |
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as the MPC8349E and MPC8548E. |
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To compile this driver as a module, choose M here: the module |
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will be called talitos. |
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config CRYPTO_DEV_TALITOS1 |
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bool "SEC1 (SEC 1.0 and SEC Lite 1.2)" |
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depends on CRYPTO_DEV_TALITOS |
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depends on PPC_8xx || PPC_82xx |
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default y |
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help |
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Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0 |
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found on MPC82xx or the Freescale Security Engine (SEC Lite) |
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version 1.2 found on MPC8xx |
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config CRYPTO_DEV_TALITOS2 |
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bool "SEC2+ (SEC version 2.0 or upper)" |
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depends on CRYPTO_DEV_TALITOS |
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default y if !PPC_8xx |
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help |
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Say 'Y' here to use the Freescale Security Engine (SEC) |
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version 2 and following as found on MPC83xx, MPC85xx, etc ... |
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config CRYPTO_DEV_IXP4XX |
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tristate "Driver for IXP4xx crypto hardware acceleration" |
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depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE |
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select CRYPTO_AES |
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select CRYPTO_DES |
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select CRYPTO_ECB |
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select CRYPTO_CBC |
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select CRYPTO_CTR |
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select CRYPTO_LIB_DES |
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select CRYPTO_AEAD |
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select CRYPTO_AUTHENC |
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select CRYPTO_SKCIPHER |
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help |
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Driver for the IXP4xx NPE crypto engine. |
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config CRYPTO_DEV_PPC4XX |
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tristate "Driver AMCC PPC4xx crypto accelerator" |
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depends on PPC && 4xx |
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select CRYPTO_HASH |
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select CRYPTO_AEAD |
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select CRYPTO_AES |
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select CRYPTO_LIB_AES |
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select CRYPTO_CCM |
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select CRYPTO_CTR |
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select CRYPTO_GCM |
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select CRYPTO_SKCIPHER |
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help |
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This option allows you to have support for AMCC crypto acceleration. |
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config HW_RANDOM_PPC4XX |
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bool "PowerPC 4xx generic true random number generator support" |
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depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y |
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default y |
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help |
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This option provides the kernel-side support for the TRNG hardware |
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found in the security function of some PowerPC 4xx SoCs. |
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config CRYPTO_DEV_OMAP |
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tristate "Support for OMAP crypto HW accelerators" |
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depends on ARCH_OMAP2PLUS |
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help |
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OMAP processors have various crypto HW accelerators. Select this if |
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you want to use the OMAP modules for any of the crypto algorithms. |
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if CRYPTO_DEV_OMAP |
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config CRYPTO_DEV_OMAP_SHAM |
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tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" |
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depends on ARCH_OMAP2PLUS |
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select CRYPTO_ENGINE |
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select CRYPTO_SHA1 |
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select CRYPTO_MD5 |
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select CRYPTO_SHA256 |
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select CRYPTO_SHA512 |
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select CRYPTO_HMAC |
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help |
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OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you |
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want to use the OMAP module for MD5/SHA1/SHA2 algorithms. |
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config CRYPTO_DEV_OMAP_AES |
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tristate "Support for OMAP AES hw engine" |
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depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS |
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select CRYPTO_AES |
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select CRYPTO_SKCIPHER |
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select CRYPTO_ENGINE |
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select CRYPTO_CBC |
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select CRYPTO_ECB |
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select CRYPTO_CTR |
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select CRYPTO_AEAD |
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help |
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OMAP processors have AES module accelerator. Select this if you |
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want to use the OMAP module for AES algorithms. |
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config CRYPTO_DEV_OMAP_DES |
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tristate "Support for OMAP DES/3DES hw engine" |
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depends on ARCH_OMAP2PLUS |
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select CRYPTO_LIB_DES |
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select CRYPTO_SKCIPHER |
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select CRYPTO_ENGINE |
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help |
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OMAP processors have DES/3DES module accelerator. Select this if you |
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want to use the OMAP module for DES and 3DES algorithms. Currently |
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the ECB and CBC modes of operation are supported by the driver. Also |
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accesses made on unaligned boundaries are supported. |
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endif # CRYPTO_DEV_OMAP |
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config CRYPTO_DEV_SAHARA |
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tristate "Support for SAHARA crypto accelerator" |
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depends on ARCH_MXC && OF |
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select CRYPTO_SKCIPHER |
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select CRYPTO_AES |
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select CRYPTO_ECB |
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help |
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This option enables support for the SAHARA HW crypto accelerator |
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found in some Freescale i.MX chips. |
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config CRYPTO_DEV_EXYNOS_RNG |
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tristate "Exynos HW pseudo random number generator support" |
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depends on ARCH_EXYNOS || COMPILE_TEST |
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depends on HAS_IOMEM |
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select CRYPTO_RNG |
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help |
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This driver provides kernel-side support through the |
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cryptographic API for the pseudo random number generator hardware |
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found on Exynos SoCs. |
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To compile this driver as a module, choose M here: the |
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module will be called exynos-rng. |
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If unsure, say Y. |
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config CRYPTO_DEV_S5P |
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tristate "Support for Samsung S5PV210/Exynos crypto accelerator" |
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depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST |
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depends on HAS_IOMEM |
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select CRYPTO_AES |
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select CRYPTO_SKCIPHER |
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help |
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This option allows you to have support for S5P crypto acceleration. |
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Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES |
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algorithms execution. |
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config CRYPTO_DEV_EXYNOS_HASH |
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bool "Support for Samsung Exynos HASH accelerator" |
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depends on CRYPTO_DEV_S5P |
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depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m |
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select CRYPTO_SHA1 |
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select CRYPTO_MD5 |
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select CRYPTO_SHA256 |
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help |
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Select this to offload Exynos from HASH MD5/SHA1/SHA256. |
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This will select software SHA1, MD5 and SHA256 as they are |
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needed for small and zero-size messages. |
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HASH algorithms will be disabled if EXYNOS_RNG |
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is enabled due to hw conflict. |
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config CRYPTO_DEV_NX |
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bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration" |
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depends on PPC64 |
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help |
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This enables support for the NX hardware cryptographic accelerator |
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coprocessor that is in IBM PowerPC P7+ or later processors. This |
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does not actually enable any drivers, it only allows you to select |
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which acceleration type (encryption and/or compression) to enable. |
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if CRYPTO_DEV_NX |
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source "drivers/crypto/nx/Kconfig" |
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endif |
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config CRYPTO_DEV_UX500 |
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tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration" |
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depends on ARCH_U8500 |
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help |
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Driver for ST-Ericsson UX500 crypto engine. |
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if CRYPTO_DEV_UX500 |
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source "drivers/crypto/ux500/Kconfig" |
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endif # if CRYPTO_DEV_UX500 |
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config CRYPTO_DEV_ATMEL_AUTHENC |
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bool "Support for Atmel IPSEC/SSL hw accelerator" |
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depends on ARCH_AT91 || COMPILE_TEST |
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depends on CRYPTO_DEV_ATMEL_AES |
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help |
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Some Atmel processors can combine the AES and SHA hw accelerators |
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to enhance support of IPSEC/SSL. |
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Select this if you want to use the Atmel modules for |
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authenc(hmac(shaX),Y(cbc)) algorithms. |
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config CRYPTO_DEV_ATMEL_AES |
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tristate "Support for Atmel AES hw accelerator" |
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depends on ARCH_AT91 || COMPILE_TEST |
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select CRYPTO_AES |
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select CRYPTO_AEAD |
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select CRYPTO_SKCIPHER |
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select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC |
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select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC |
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help |
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Some Atmel processors have AES hw accelerator. |
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Select this if you want to use the Atmel module for |
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AES algorithms. |
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To compile this driver as a module, choose M here: the module |
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will be called atmel-aes. |
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config CRYPTO_DEV_ATMEL_TDES |
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tristate "Support for Atmel DES/TDES hw accelerator" |
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depends on ARCH_AT91 || COMPILE_TEST |
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select CRYPTO_LIB_DES |
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select CRYPTO_SKCIPHER |
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help |
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Some Atmel processors have DES/TDES hw accelerator. |
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Select this if you want to use the Atmel module for |
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DES/TDES algorithms. |
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To compile this driver as a module, choose M here: the module |
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will be called atmel-tdes. |
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config CRYPTO_DEV_ATMEL_SHA |
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tristate "Support for Atmel SHA hw accelerator" |
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depends on ARCH_AT91 || COMPILE_TEST |
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select CRYPTO_HASH |
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help |
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Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512 |
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hw accelerator. |
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Select this if you want to use the Atmel module for |
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SHA1/SHA224/SHA256/SHA384/SHA512 algorithms. |
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To compile this driver as a module, choose M here: the module |
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will be called atmel-sha. |
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config CRYPTO_DEV_ATMEL_I2C |
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tristate |
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select BITREVERSE |
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config CRYPTO_DEV_ATMEL_ECC |
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tristate "Support for Microchip / Atmel ECC hw accelerator" |
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depends on I2C |
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select CRYPTO_DEV_ATMEL_I2C |
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select CRYPTO_ECDH |
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select CRC16 |
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help |
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Microhip / Atmel ECC hw accelerator. |
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Select this if you want to use the Microchip / Atmel module for |
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ECDH algorithm. |
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To compile this driver as a module, choose M here: the module |
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will be called atmel-ecc. |
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config CRYPTO_DEV_ATMEL_SHA204A |
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tristate "Support for Microchip / Atmel SHA accelerator and RNG" |
|
depends on I2C |
|
select CRYPTO_DEV_ATMEL_I2C |
|
select HW_RANDOM |
|
select CRC16 |
|
help |
|
Microhip / Atmel SHA accelerator and RNG. |
|
Select this if you want to use the Microchip / Atmel SHA204A |
|
module as a random number generator. (Other functions of the |
|
chip are currently not exposed by this driver) |
|
|
|
To compile this driver as a module, choose M here: the module |
|
will be called atmel-sha204a. |
|
|
|
config CRYPTO_DEV_CCP |
|
bool "Support for AMD Secure Processor" |
|
depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM |
|
help |
|
The AMD Secure Processor provides support for the Cryptographic Coprocessor |
|
(CCP) and the Platform Security Processor (PSP) devices. |
|
|
|
if CRYPTO_DEV_CCP |
|
source "drivers/crypto/ccp/Kconfig" |
|
endif |
|
|
|
config CRYPTO_DEV_MXS_DCP |
|
tristate "Support for Freescale MXS DCP" |
|
depends on (ARCH_MXS || ARCH_MXC) |
|
select STMP_DEVICE |
|
select CRYPTO_CBC |
|
select CRYPTO_ECB |
|
select CRYPTO_AES |
|
select CRYPTO_SKCIPHER |
|
select CRYPTO_HASH |
|
help |
|
The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB |
|
co-processor on the die. |
|
|
|
To compile this driver as a module, choose M here: the module |
|
will be called mxs-dcp. |
|
|
|
source "drivers/crypto/qat/Kconfig" |
|
source "drivers/crypto/cavium/cpt/Kconfig" |
|
source "drivers/crypto/cavium/nitrox/Kconfig" |
|
source "drivers/crypto/marvell/Kconfig" |
|
|
|
config CRYPTO_DEV_CAVIUM_ZIP |
|
tristate "Cavium ZIP driver" |
|
depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) |
|
help |
|
Select this option if you want to enable compression/decompression |
|
acceleration on Cavium's ARM based SoCs |
|
|
|
config CRYPTO_DEV_QCE |
|
tristate "Qualcomm crypto engine accelerator" |
|
depends on ARCH_QCOM || COMPILE_TEST |
|
depends on HAS_IOMEM |
|
help |
|
This driver supports Qualcomm crypto engine accelerator |
|
hardware. To compile this driver as a module, choose M here. The |
|
module will be called qcrypto. |
|
|
|
config CRYPTO_DEV_QCE_SKCIPHER |
|
bool |
|
depends on CRYPTO_DEV_QCE |
|
select CRYPTO_AES |
|
select CRYPTO_LIB_DES |
|
select CRYPTO_ECB |
|
select CRYPTO_CBC |
|
select CRYPTO_XTS |
|
select CRYPTO_CTR |
|
select CRYPTO_SKCIPHER |
|
|
|
config CRYPTO_DEV_QCE_SHA |
|
bool |
|
depends on CRYPTO_DEV_QCE |
|
select CRYPTO_SHA1 |
|
select CRYPTO_SHA256 |
|
|
|
config CRYPTO_DEV_QCE_AEAD |
|
bool |
|
depends on CRYPTO_DEV_QCE |
|
select CRYPTO_AUTHENC |
|
select CRYPTO_LIB_DES |
|
|
|
choice |
|
prompt "Algorithms enabled for QCE acceleration" |
|
default CRYPTO_DEV_QCE_ENABLE_ALL |
|
depends on CRYPTO_DEV_QCE |
|
help |
|
This option allows to choose whether to build support for all algorithms |
|
(default), hashes-only, or skciphers-only. |
|
|
|
The QCE engine does not appear to scale as well as the CPU to handle |
|
multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the |
|
QCE handles only 2 requests in parallel. |
|
|
|
Ipsec throughput seems to improve when disabling either family of |
|
algorithms, sharing the load with the CPU. Enabling skciphers-only |
|
appears to work best. |
|
|
|
config CRYPTO_DEV_QCE_ENABLE_ALL |
|
bool "All supported algorithms" |
|
select CRYPTO_DEV_QCE_SKCIPHER |
|
select CRYPTO_DEV_QCE_SHA |
|
select CRYPTO_DEV_QCE_AEAD |
|
help |
|
Enable all supported algorithms: |
|
- AES (CBC, CTR, ECB, XTS) |
|
- 3DES (CBC, ECB) |
|
- DES (CBC, ECB) |
|
- SHA1, HMAC-SHA1 |
|
- SHA256, HMAC-SHA256 |
|
|
|
config CRYPTO_DEV_QCE_ENABLE_SKCIPHER |
|
bool "Symmetric-key ciphers only" |
|
select CRYPTO_DEV_QCE_SKCIPHER |
|
help |
|
Enable symmetric-key ciphers only: |
|
- AES (CBC, CTR, ECB, XTS) |
|
- 3DES (ECB, CBC) |
|
- DES (ECB, CBC) |
|
|
|
config CRYPTO_DEV_QCE_ENABLE_SHA |
|
bool "Hash/HMAC only" |
|
select CRYPTO_DEV_QCE_SHA |
|
help |
|
Enable hashes/HMAC algorithms only: |
|
- SHA1, HMAC-SHA1 |
|
- SHA256, HMAC-SHA256 |
|
|
|
config CRYPTO_DEV_QCE_ENABLE_AEAD |
|
bool "AEAD algorithms only" |
|
select CRYPTO_DEV_QCE_AEAD |
|
help |
|
Enable AEAD algorithms only: |
|
- authenc() |
|
- ccm(aes) |
|
- rfc4309(ccm(aes)) |
|
endchoice |
|
|
|
config CRYPTO_DEV_QCE_SW_MAX_LEN |
|
int "Default maximum request size to use software for AES" |
|
depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER |
|
default 512 |
|
help |
|
This sets the default maximum request size to perform AES requests |
|
using software instead of the crypto engine. It can be changed by |
|
setting the aes_sw_max_len parameter. |
|
|
|
Small blocks are processed faster in software than hardware. |
|
Considering the 256-bit ciphers, software is 2-3 times faster than |
|
qce at 256-bytes, 30% faster at 512, and about even at 768-bytes. |
|
With 128-bit keys, the break-even point would be around 1024-bytes. |
|
|
|
The default is set a little lower, to 512 bytes, to balance the |
|
cost in CPU usage. The minimum recommended setting is 16-bytes |
|
(1 AES block), since AES-GCM will fail if you set it lower. |
|
Setting this to zero will send all requests to the hardware. |
|
|
|
Note that 192-bit keys are not supported by the hardware and are |
|
always processed by the software fallback, and all DES requests |
|
are done by the hardware. |
|
|
|
config CRYPTO_DEV_QCOM_RNG |
|
tristate "Qualcomm Random Number Generator Driver" |
|
depends on ARCH_QCOM || COMPILE_TEST |
|
select CRYPTO_RNG |
|
help |
|
This driver provides support for the Random Number |
|
Generator hardware found on Qualcomm SoCs. |
|
|
|
To compile this driver as a module, choose M here. The |
|
module will be called qcom-rng. If unsure, say N. |
|
|
|
config CRYPTO_DEV_VMX |
|
bool "Support for VMX cryptographic acceleration instructions" |
|
depends on PPC64 && VSX |
|
help |
|
Support for VMX cryptographic acceleration instructions. |
|
|
|
source "drivers/crypto/vmx/Kconfig" |
|
|
|
config CRYPTO_DEV_IMGTEC_HASH |
|
tristate "Imagination Technologies hardware hash accelerator" |
|
depends on MIPS || COMPILE_TEST |
|
select CRYPTO_MD5 |
|
select CRYPTO_SHA1 |
|
select CRYPTO_SHA256 |
|
select CRYPTO_HASH |
|
help |
|
This driver interfaces with the Imagination Technologies |
|
hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 |
|
hashing algorithms. |
|
|
|
config CRYPTO_DEV_ROCKCHIP |
|
tristate "Rockchip's Cryptographic Engine driver" |
|
depends on OF && ARCH_ROCKCHIP |
|
select CRYPTO_AES |
|
select CRYPTO_LIB_DES |
|
select CRYPTO_MD5 |
|
select CRYPTO_SHA1 |
|
select CRYPTO_SHA256 |
|
select CRYPTO_HASH |
|
select CRYPTO_SKCIPHER |
|
|
|
help |
|
This driver interfaces with the hardware crypto accelerator. |
|
Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. |
|
|
|
config CRYPTO_DEV_ZYNQMP_AES |
|
tristate "Support for Xilinx ZynqMP AES hw accelerator" |
|
depends on ZYNQMP_FIRMWARE || COMPILE_TEST |
|
select CRYPTO_AES |
|
select CRYPTO_ENGINE |
|
select CRYPTO_AEAD |
|
help |
|
Xilinx ZynqMP has AES-GCM engine used for symmetric key |
|
encryption and decryption. This driver interfaces with AES hw |
|
accelerator. Select this if you want to use the ZynqMP module |
|
for AES algorithms. |
|
|
|
source "drivers/crypto/chelsio/Kconfig" |
|
|
|
source "drivers/crypto/virtio/Kconfig" |
|
|
|
config CRYPTO_DEV_BCM_SPU |
|
tristate "Broadcom symmetric crypto/hash acceleration support" |
|
depends on ARCH_BCM_IPROC |
|
depends on MAILBOX |
|
default m |
|
select CRYPTO_AUTHENC |
|
select CRYPTO_LIB_DES |
|
select CRYPTO_MD5 |
|
select CRYPTO_SHA1 |
|
select CRYPTO_SHA256 |
|
select CRYPTO_SHA512 |
|
help |
|
This driver provides support for Broadcom crypto acceleration using the |
|
Secure Processing Unit (SPU). The SPU driver registers skcipher, |
|
ahash, and aead algorithms with the kernel cryptographic API. |
|
|
|
source "drivers/crypto/stm32/Kconfig" |
|
|
|
config CRYPTO_DEV_SAFEXCEL |
|
tristate "Inside Secure's SafeXcel cryptographic engine driver" |
|
depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM |
|
select CRYPTO_LIB_AES |
|
select CRYPTO_AUTHENC |
|
select CRYPTO_SKCIPHER |
|
select CRYPTO_LIB_DES |
|
select CRYPTO_HASH |
|
select CRYPTO_HMAC |
|
select CRYPTO_MD5 |
|
select CRYPTO_SHA1 |
|
select CRYPTO_SHA256 |
|
select CRYPTO_SHA512 |
|
select CRYPTO_CHACHA20POLY1305 |
|
select CRYPTO_SHA3 |
|
help |
|
This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic |
|
engines designed by Inside Secure. It currently accelerates DES, 3DES and |
|
AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256, |
|
SHA384 and SHA512 hash algorithms for both basic hash and HMAC. |
|
Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations. |
|
|
|
config CRYPTO_DEV_ARTPEC6 |
|
tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration." |
|
depends on ARM && (ARCH_ARTPEC || COMPILE_TEST) |
|
depends on OF |
|
select CRYPTO_AEAD |
|
select CRYPTO_AES |
|
select CRYPTO_ALGAPI |
|
select CRYPTO_SKCIPHER |
|
select CRYPTO_CTR |
|
select CRYPTO_HASH |
|
select CRYPTO_SHA1 |
|
select CRYPTO_SHA256 |
|
select CRYPTO_SHA512 |
|
help |
|
Enables the driver for the on-chip crypto accelerator |
|
of Axis ARTPEC SoCs. |
|
|
|
To compile this driver as a module, choose M here. |
|
|
|
config CRYPTO_DEV_CCREE |
|
tristate "Support for ARM TrustZone CryptoCell family of security processors" |
|
depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA |
|
default n |
|
select CRYPTO_HASH |
|
select CRYPTO_SKCIPHER |
|
select CRYPTO_LIB_DES |
|
select CRYPTO_AEAD |
|
select CRYPTO_AUTHENC |
|
select CRYPTO_SHA1 |
|
select CRYPTO_MD5 |
|
select CRYPTO_SHA256 |
|
select CRYPTO_SHA512 |
|
select CRYPTO_HMAC |
|
select CRYPTO_AES |
|
select CRYPTO_CBC |
|
select CRYPTO_ECB |
|
select CRYPTO_CTR |
|
select CRYPTO_XTS |
|
select CRYPTO_SM4 |
|
select CRYPTO_SM3 |
|
help |
|
Say 'Y' to enable a driver for the REE interface of the Arm |
|
TrustZone CryptoCell family of processors. Currently the |
|
CryptoCell 713, 703, 712, 710 and 630 are supported. |
|
Choose this if you wish to use hardware acceleration of |
|
cryptographic operations on the system REE. |
|
If unsure say Y. |
|
|
|
source "drivers/crypto/hisilicon/Kconfig" |
|
|
|
source "drivers/crypto/amlogic/Kconfig" |
|
|
|
config CRYPTO_DEV_SA2UL |
|
tristate "Support for TI security accelerator" |
|
depends on ARCH_K3 || COMPILE_TEST |
|
select ARM64_CRYPTO |
|
select CRYPTO_AES |
|
select CRYPTO_AES_ARM64 |
|
select CRYPTO_ALGAPI |
|
select CRYPTO_AUTHENC |
|
select CRYPTO_SHA1 |
|
select CRYPTO_SHA256 |
|
select CRYPTO_SHA512 |
|
select HW_RANDOM |
|
select SG_SPLIT |
|
help |
|
K3 devices include a security accelerator engine that may be |
|
used for crypto offload. Select this if you want to use hardware |
|
acceleration for cryptographic algorithms on these devices. |
|
|
|
source "drivers/crypto/keembay/Kconfig" |
|
|
|
endif # CRYPTO_HW
|
|
|