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348 lines
11 KiB
348 lines
11 KiB
// SPDX-License-Identifier: (GPL-2.0 OR MIT) |
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// |
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// Copyright (c) 2018 BayLibre, SAS. |
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// Author: Jerome Brunet <[email protected]> |
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/* This driver implements the frontend capture DAI of AXG based SoCs */ |
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#include <linux/clk.h> |
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#include <linux/regmap.h> |
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#include <linux/module.h> |
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#include <linux/of_platform.h> |
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#include <sound/pcm_params.h> |
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#include <sound/soc.h> |
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#include <sound/soc-dai.h> |
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#include "axg-fifo.h" |
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#define CTRL0_TODDR_SEL_RESAMPLE BIT(30) |
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#define CTRL0_TODDR_EXT_SIGNED BIT(29) |
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#define CTRL0_TODDR_PP_MODE BIT(28) |
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#define CTRL0_TODDR_SYNC_CH BIT(27) |
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#define CTRL0_TODDR_TYPE_MASK GENMASK(15, 13) |
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#define CTRL0_TODDR_TYPE(x) ((x) << 13) |
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#define CTRL0_TODDR_MSB_POS_MASK GENMASK(12, 8) |
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#define CTRL0_TODDR_MSB_POS(x) ((x) << 8) |
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#define CTRL0_TODDR_LSB_POS_MASK GENMASK(7, 3) |
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#define CTRL0_TODDR_LSB_POS(x) ((x) << 3) |
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#define CTRL1_TODDR_FORCE_FINISH BIT(25) |
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#define CTRL1_SEL_SHIFT 28 |
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#define TODDR_MSB_POS 31 |
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static int axg_toddr_pcm_new(struct snd_soc_pcm_runtime *rtd, |
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struct snd_soc_dai *dai) |
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{ |
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return axg_fifo_pcm_new(rtd, SNDRV_PCM_STREAM_CAPTURE); |
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} |
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static int g12a_toddr_dai_prepare(struct snd_pcm_substream *substream, |
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struct snd_soc_dai *dai) |
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{ |
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struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai); |
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/* Reset the write pointer to the FIFO_INIT_ADDR */ |
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regmap_update_bits(fifo->map, FIFO_CTRL1, |
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CTRL1_TODDR_FORCE_FINISH, 0); |
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regmap_update_bits(fifo->map, FIFO_CTRL1, |
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CTRL1_TODDR_FORCE_FINISH, CTRL1_TODDR_FORCE_FINISH); |
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regmap_update_bits(fifo->map, FIFO_CTRL1, |
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CTRL1_TODDR_FORCE_FINISH, 0); |
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return 0; |
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} |
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static int axg_toddr_dai_hw_params(struct snd_pcm_substream *substream, |
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struct snd_pcm_hw_params *params, |
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struct snd_soc_dai *dai) |
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{ |
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struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai); |
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unsigned int type, width; |
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switch (params_physical_width(params)) { |
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case 8: |
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type = 0; /* 8 samples of 8 bits */ |
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break; |
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case 16: |
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type = 2; /* 4 samples of 16 bits - right justified */ |
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break; |
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case 32: |
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type = 4; /* 2 samples of 32 bits - right justified */ |
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break; |
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default: |
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return -EINVAL; |
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} |
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width = params_width(params); |
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regmap_update_bits(fifo->map, FIFO_CTRL0, |
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CTRL0_TODDR_TYPE_MASK | |
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CTRL0_TODDR_MSB_POS_MASK | |
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CTRL0_TODDR_LSB_POS_MASK, |
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CTRL0_TODDR_TYPE(type) | |
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CTRL0_TODDR_MSB_POS(TODDR_MSB_POS) | |
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CTRL0_TODDR_LSB_POS(TODDR_MSB_POS - (width - 1))); |
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return 0; |
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} |
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static int axg_toddr_dai_startup(struct snd_pcm_substream *substream, |
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struct snd_soc_dai *dai) |
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{ |
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struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai); |
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int ret; |
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/* Enable pclk to access registers and clock the fifo ip */ |
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ret = clk_prepare_enable(fifo->pclk); |
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if (ret) |
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return ret; |
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/* Select orginal data - resampling not supported ATM */ |
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regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_SEL_RESAMPLE, 0); |
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/* Only signed format are supported ATM */ |
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regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_EXT_SIGNED, |
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CTRL0_TODDR_EXT_SIGNED); |
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/* Apply single buffer mode to the interface */ |
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regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_PP_MODE, 0); |
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return 0; |
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} |
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static void axg_toddr_dai_shutdown(struct snd_pcm_substream *substream, |
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struct snd_soc_dai *dai) |
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{ |
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struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai); |
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clk_disable_unprepare(fifo->pclk); |
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} |
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static const struct snd_soc_dai_ops axg_toddr_ops = { |
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.hw_params = axg_toddr_dai_hw_params, |
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.startup = axg_toddr_dai_startup, |
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.shutdown = axg_toddr_dai_shutdown, |
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}; |
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static struct snd_soc_dai_driver axg_toddr_dai_drv = { |
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.name = "TODDR", |
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.capture = { |
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.stream_name = "Capture", |
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.channels_min = 1, |
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.channels_max = AXG_FIFO_CH_MAX, |
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.rates = AXG_FIFO_RATES, |
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.formats = AXG_FIFO_FORMATS, |
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}, |
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.ops = &axg_toddr_ops, |
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.pcm_new = axg_toddr_pcm_new, |
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}; |
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static const char * const axg_toddr_sel_texts[] = { |
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"IN 0", "IN 1", "IN 2", "IN 3", "IN 4", "IN 5", "IN 6", "IN 7" |
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}; |
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static SOC_ENUM_SINGLE_DECL(axg_toddr_sel_enum, FIFO_CTRL0, CTRL0_SEL_SHIFT, |
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axg_toddr_sel_texts); |
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static const struct snd_kcontrol_new axg_toddr_in_mux = |
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SOC_DAPM_ENUM("Input Source", axg_toddr_sel_enum); |
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static const struct snd_soc_dapm_widget axg_toddr_dapm_widgets[] = { |
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SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_toddr_in_mux), |
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SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 3", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 4", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 5", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 6", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 7", NULL, 0, SND_SOC_NOPM, 0, 0), |
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}; |
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static const struct snd_soc_dapm_route axg_toddr_dapm_routes[] = { |
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{ "Capture", NULL, "SRC SEL" }, |
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{ "SRC SEL", "IN 0", "IN 0" }, |
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{ "SRC SEL", "IN 1", "IN 1" }, |
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{ "SRC SEL", "IN 2", "IN 2" }, |
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{ "SRC SEL", "IN 3", "IN 3" }, |
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{ "SRC SEL", "IN 4", "IN 4" }, |
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{ "SRC SEL", "IN 5", "IN 5" }, |
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{ "SRC SEL", "IN 6", "IN 6" }, |
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{ "SRC SEL", "IN 7", "IN 7" }, |
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}; |
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static const struct snd_soc_component_driver axg_toddr_component_drv = { |
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.dapm_widgets = axg_toddr_dapm_widgets, |
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.num_dapm_widgets = ARRAY_SIZE(axg_toddr_dapm_widgets), |
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.dapm_routes = axg_toddr_dapm_routes, |
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.num_dapm_routes = ARRAY_SIZE(axg_toddr_dapm_routes), |
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.open = axg_fifo_pcm_open, |
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.close = axg_fifo_pcm_close, |
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.hw_params = axg_fifo_pcm_hw_params, |
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.hw_free = axg_fifo_pcm_hw_free, |
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.pointer = axg_fifo_pcm_pointer, |
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.trigger = axg_fifo_pcm_trigger, |
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}; |
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static const struct axg_fifo_match_data axg_toddr_match_data = { |
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.field_threshold = REG_FIELD(FIFO_CTRL1, 16, 23), |
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.component_drv = &axg_toddr_component_drv, |
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.dai_drv = &axg_toddr_dai_drv |
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}; |
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static int g12a_toddr_dai_startup(struct snd_pcm_substream *substream, |
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struct snd_soc_dai *dai) |
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{ |
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struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai); |
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int ret; |
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ret = axg_toddr_dai_startup(substream, dai); |
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if (ret) |
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return ret; |
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/* |
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* Make sure the first channel ends up in the at beginning of the output |
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* As weird as it looks, without this the first channel may be misplaced |
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* in memory, with a random shift of 2 channels. |
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*/ |
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regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_SYNC_CH, |
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CTRL0_TODDR_SYNC_CH); |
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return 0; |
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} |
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static const struct snd_soc_dai_ops g12a_toddr_ops = { |
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.prepare = g12a_toddr_dai_prepare, |
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.hw_params = axg_toddr_dai_hw_params, |
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.startup = g12a_toddr_dai_startup, |
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.shutdown = axg_toddr_dai_shutdown, |
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}; |
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static struct snd_soc_dai_driver g12a_toddr_dai_drv = { |
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.name = "TODDR", |
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.capture = { |
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.stream_name = "Capture", |
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.channels_min = 1, |
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.channels_max = AXG_FIFO_CH_MAX, |
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.rates = AXG_FIFO_RATES, |
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.formats = AXG_FIFO_FORMATS, |
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}, |
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.ops = &g12a_toddr_ops, |
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.pcm_new = axg_toddr_pcm_new, |
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}; |
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static const struct snd_soc_component_driver g12a_toddr_component_drv = { |
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.dapm_widgets = axg_toddr_dapm_widgets, |
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.num_dapm_widgets = ARRAY_SIZE(axg_toddr_dapm_widgets), |
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.dapm_routes = axg_toddr_dapm_routes, |
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.num_dapm_routes = ARRAY_SIZE(axg_toddr_dapm_routes), |
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.open = axg_fifo_pcm_open, |
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.close = axg_fifo_pcm_close, |
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.hw_params = g12a_fifo_pcm_hw_params, |
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.hw_free = axg_fifo_pcm_hw_free, |
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.pointer = axg_fifo_pcm_pointer, |
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.trigger = axg_fifo_pcm_trigger, |
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}; |
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static const struct axg_fifo_match_data g12a_toddr_match_data = { |
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.field_threshold = REG_FIELD(FIFO_CTRL1, 16, 23), |
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.component_drv = &g12a_toddr_component_drv, |
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.dai_drv = &g12a_toddr_dai_drv |
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}; |
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static const char * const sm1_toddr_sel_texts[] = { |
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"IN 0", "IN 1", "IN 2", "IN 3", "IN 4", "IN 5", "IN 6", "IN 7", |
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"IN 8", "IN 9", "IN 10", "IN 11", "IN 12", "IN 13", "IN 14", "IN 15" |
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}; |
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static SOC_ENUM_SINGLE_DECL(sm1_toddr_sel_enum, FIFO_CTRL1, CTRL1_SEL_SHIFT, |
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sm1_toddr_sel_texts); |
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static const struct snd_kcontrol_new sm1_toddr_in_mux = |
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SOC_DAPM_ENUM("Input Source", sm1_toddr_sel_enum); |
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static const struct snd_soc_dapm_widget sm1_toddr_dapm_widgets[] = { |
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SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &sm1_toddr_in_mux), |
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SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 3", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 4", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 5", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 6", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 7", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 8", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 9", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 10", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 11", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 12", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 13", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 14", NULL, 0, SND_SOC_NOPM, 0, 0), |
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SND_SOC_DAPM_AIF_IN("IN 15", NULL, 0, SND_SOC_NOPM, 0, 0), |
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}; |
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static const struct snd_soc_dapm_route sm1_toddr_dapm_routes[] = { |
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{ "Capture", NULL, "SRC SEL" }, |
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{ "SRC SEL", "IN 0", "IN 0" }, |
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{ "SRC SEL", "IN 1", "IN 1" }, |
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{ "SRC SEL", "IN 2", "IN 2" }, |
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{ "SRC SEL", "IN 3", "IN 3" }, |
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{ "SRC SEL", "IN 4", "IN 4" }, |
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{ "SRC SEL", "IN 5", "IN 5" }, |
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{ "SRC SEL", "IN 6", "IN 6" }, |
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{ "SRC SEL", "IN 7", "IN 7" }, |
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{ "SRC SEL", "IN 8", "IN 8" }, |
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{ "SRC SEL", "IN 9", "IN 9" }, |
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{ "SRC SEL", "IN 10", "IN 10" }, |
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{ "SRC SEL", "IN 11", "IN 11" }, |
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{ "SRC SEL", "IN 12", "IN 12" }, |
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{ "SRC SEL", "IN 13", "IN 13" }, |
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{ "SRC SEL", "IN 14", "IN 14" }, |
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{ "SRC SEL", "IN 15", "IN 15" }, |
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}; |
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static const struct snd_soc_component_driver sm1_toddr_component_drv = { |
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.dapm_widgets = sm1_toddr_dapm_widgets, |
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.num_dapm_widgets = ARRAY_SIZE(sm1_toddr_dapm_widgets), |
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.dapm_routes = sm1_toddr_dapm_routes, |
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.num_dapm_routes = ARRAY_SIZE(sm1_toddr_dapm_routes), |
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.open = axg_fifo_pcm_open, |
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.close = axg_fifo_pcm_close, |
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.hw_params = g12a_fifo_pcm_hw_params, |
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.hw_free = axg_fifo_pcm_hw_free, |
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.pointer = axg_fifo_pcm_pointer, |
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.trigger = axg_fifo_pcm_trigger, |
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}; |
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static const struct axg_fifo_match_data sm1_toddr_match_data = { |
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.field_threshold = REG_FIELD(FIFO_CTRL1, 12, 23), |
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.component_drv = &sm1_toddr_component_drv, |
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.dai_drv = &g12a_toddr_dai_drv |
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}; |
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static const struct of_device_id axg_toddr_of_match[] = { |
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{ |
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.compatible = "amlogic,axg-toddr", |
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.data = &axg_toddr_match_data, |
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}, { |
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.compatible = "amlogic,g12a-toddr", |
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.data = &g12a_toddr_match_data, |
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}, { |
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.compatible = "amlogic,sm1-toddr", |
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.data = &sm1_toddr_match_data, |
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}, {} |
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}; |
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MODULE_DEVICE_TABLE(of, axg_toddr_of_match); |
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static struct platform_driver axg_toddr_pdrv = { |
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.probe = axg_fifo_probe, |
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.driver = { |
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.name = "axg-toddr", |
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.of_match_table = axg_toddr_of_match, |
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}, |
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}; |
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module_platform_driver(axg_toddr_pdrv); |
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MODULE_DESCRIPTION("Amlogic AXG capture fifo driver"); |
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MODULE_AUTHOR("Jerome Brunet <[email protected]>"); |
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MODULE_LICENSE("GPL v2");
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