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654 lines
24 KiB
654 lines
24 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Texas Instruments System Control Interface Protocol |
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* |
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* Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ |
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* Nishanth Menon |
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*/ |
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#ifndef __TISCI_PROTOCOL_H |
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#define __TISCI_PROTOCOL_H |
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/** |
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* struct ti_sci_version_info - version information structure |
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* @abi_major: Major ABI version. Change here implies risk of backward |
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* compatibility break. |
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* @abi_minor: Minor ABI version. Change here implies new feature addition, |
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* or compatible change in ABI. |
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* @firmware_revision: Firmware revision (not usually used). |
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* @firmware_description: Firmware description (not usually used). |
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*/ |
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struct ti_sci_version_info { |
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u8 abi_major; |
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u8 abi_minor; |
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u16 firmware_revision; |
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char firmware_description[32]; |
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}; |
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struct ti_sci_handle; |
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/** |
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* struct ti_sci_core_ops - SoC Core Operations |
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* @reboot_device: Reboot the SoC |
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* Returns 0 for successful request(ideally should never return), |
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* else returns corresponding error value. |
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*/ |
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struct ti_sci_core_ops { |
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int (*reboot_device)(const struct ti_sci_handle *handle); |
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}; |
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/** |
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* struct ti_sci_dev_ops - Device control operations |
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* @get_device: Command to request for device managed by TISCI |
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* Returns 0 for successful exclusive request, else returns |
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* corresponding error message. |
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* @idle_device: Command to idle a device managed by TISCI |
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* Returns 0 for successful exclusive request, else returns |
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* corresponding error message. |
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* @put_device: Command to release a device managed by TISCI |
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* Returns 0 for successful release, else returns corresponding |
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* error message. |
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* @is_valid: Check if the device ID is a valid ID. |
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* Returns 0 if the ID is valid, else returns corresponding error. |
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* @get_context_loss_count: Command to retrieve context loss counter - this |
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* increments every time the device looses context. Overflow |
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* is possible. |
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* - count: pointer to u32 which will retrieve counter |
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* Returns 0 for successful information request and count has |
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* proper data, else returns corresponding error message. |
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* @is_idle: Reports back about device idle state |
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* - req_state: Returns requested idle state |
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* Returns 0 for successful information request and req_state and |
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* current_state has proper data, else returns corresponding error |
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* message. |
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* @is_stop: Reports back about device stop state |
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* - req_state: Returns requested stop state |
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* - current_state: Returns current stop state |
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* Returns 0 for successful information request and req_state and |
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* current_state has proper data, else returns corresponding error |
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* message. |
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* @is_on: Reports back about device ON(or active) state |
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* - req_state: Returns requested ON state |
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* - current_state: Returns current ON state |
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* Returns 0 for successful information request and req_state and |
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* current_state has proper data, else returns corresponding error |
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* message. |
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* @is_transitioning: Reports back if the device is in the middle of transition |
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* of state. |
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* -current_state: Returns 'true' if currently transitioning. |
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* @set_device_resets: Command to configure resets for device managed by TISCI. |
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* -reset_state: Device specific reset bit field |
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* Returns 0 for successful request, else returns |
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* corresponding error message. |
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* @get_device_resets: Command to read state of resets for device managed |
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* by TISCI. |
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* -reset_state: pointer to u32 which will retrieve resets |
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* Returns 0 for successful request, else returns |
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* corresponding error message. |
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* |
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* NOTE: for all these functions, the following parameters are generic in |
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* nature: |
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* -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle |
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* -id: Device Identifier |
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* |
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* Request for the device - NOTE: the client MUST maintain integrity of |
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* usage count by balancing get_device with put_device. No refcounting is |
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* managed by driver for that purpose. |
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*/ |
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struct ti_sci_dev_ops { |
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int (*get_device)(const struct ti_sci_handle *handle, u32 id); |
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int (*get_device_exclusive)(const struct ti_sci_handle *handle, u32 id); |
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int (*idle_device)(const struct ti_sci_handle *handle, u32 id); |
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int (*idle_device_exclusive)(const struct ti_sci_handle *handle, |
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u32 id); |
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int (*put_device)(const struct ti_sci_handle *handle, u32 id); |
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int (*is_valid)(const struct ti_sci_handle *handle, u32 id); |
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int (*get_context_loss_count)(const struct ti_sci_handle *handle, |
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u32 id, u32 *count); |
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int (*is_idle)(const struct ti_sci_handle *handle, u32 id, |
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bool *requested_state); |
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int (*is_stop)(const struct ti_sci_handle *handle, u32 id, |
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bool *req_state, bool *current_state); |
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int (*is_on)(const struct ti_sci_handle *handle, u32 id, |
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bool *req_state, bool *current_state); |
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int (*is_transitioning)(const struct ti_sci_handle *handle, u32 id, |
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bool *current_state); |
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int (*set_device_resets)(const struct ti_sci_handle *handle, u32 id, |
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u32 reset_state); |
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int (*get_device_resets)(const struct ti_sci_handle *handle, u32 id, |
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u32 *reset_state); |
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}; |
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/** |
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* struct ti_sci_clk_ops - Clock control operations |
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* @get_clock: Request for activation of clock and manage by processor |
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* - needs_ssc: 'true' if Spread Spectrum clock is desired. |
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* - can_change_freq: 'true' if frequency change is desired. |
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* - enable_input_term: 'true' if input termination is desired. |
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* @idle_clock: Request for Idling a clock managed by processor |
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* @put_clock: Release the clock to be auto managed by TISCI |
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* @is_auto: Is the clock being auto managed |
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* - req_state: state indicating if the clock is auto managed |
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* @is_on: Is the clock ON |
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* - req_state: if the clock is requested to be forced ON |
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* - current_state: if the clock is currently ON |
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* @is_off: Is the clock OFF |
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* - req_state: if the clock is requested to be forced OFF |
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* - current_state: if the clock is currently Gated |
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* @set_parent: Set the clock source of a specific device clock |
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* - parent_id: Parent clock identifier to set. |
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* @get_parent: Get the current clock source of a specific device clock |
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* - parent_id: Parent clock identifier which is the parent. |
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* @get_num_parents: Get the number of parents of the current clock source |
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* - num_parents: returns the number of parent clocks. |
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* @get_best_match_freq: Find a best matching frequency for a frequency |
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* range. |
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* - match_freq: Best matching frequency in Hz. |
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* @set_freq: Set the Clock frequency |
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* @get_freq: Get the Clock frequency |
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* - current_freq: Frequency in Hz that the clock is at. |
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* |
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* NOTE: for all these functions, the following parameters are generic in |
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* nature: |
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* -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle |
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* -did: Device identifier this request is for |
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* -cid: Clock identifier for the device for this request. |
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* Each device has it's own set of clock inputs. This indexes |
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* which clock input to modify. |
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* -min_freq: The minimum allowable frequency in Hz. This is the minimum |
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* allowable programmed frequency and does not account for clock |
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* tolerances and jitter. |
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* -target_freq: The target clock frequency in Hz. A frequency will be |
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* processed as close to this target frequency as possible. |
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* -max_freq: The maximum allowable frequency in Hz. This is the maximum |
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* allowable programmed frequency and does not account for clock |
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* tolerances and jitter. |
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* |
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* Request for the clock - NOTE: the client MUST maintain integrity of |
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* usage count by balancing get_clock with put_clock. No refcounting is |
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* managed by driver for that purpose. |
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*/ |
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struct ti_sci_clk_ops { |
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int (*get_clock)(const struct ti_sci_handle *handle, u32 did, u32 cid, |
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bool needs_ssc, bool can_change_freq, |
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bool enable_input_term); |
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int (*idle_clock)(const struct ti_sci_handle *handle, u32 did, u32 cid); |
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int (*put_clock)(const struct ti_sci_handle *handle, u32 did, u32 cid); |
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int (*is_auto)(const struct ti_sci_handle *handle, u32 did, u32 cid, |
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bool *req_state); |
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int (*is_on)(const struct ti_sci_handle *handle, u32 did, u32 cid, |
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bool *req_state, bool *current_state); |
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int (*is_off)(const struct ti_sci_handle *handle, u32 did, u32 cid, |
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bool *req_state, bool *current_state); |
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int (*set_parent)(const struct ti_sci_handle *handle, u32 did, u32 cid, |
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u32 parent_id); |
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int (*get_parent)(const struct ti_sci_handle *handle, u32 did, u32 cid, |
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u32 *parent_id); |
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int (*get_num_parents)(const struct ti_sci_handle *handle, u32 did, |
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u32 cid, u32 *num_parents); |
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int (*get_best_match_freq)(const struct ti_sci_handle *handle, u32 did, |
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u32 cid, u64 min_freq, u64 target_freq, |
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u64 max_freq, u64 *match_freq); |
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int (*set_freq)(const struct ti_sci_handle *handle, u32 did, u32 cid, |
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u64 min_freq, u64 target_freq, u64 max_freq); |
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int (*get_freq)(const struct ti_sci_handle *handle, u32 did, u32 cid, |
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u64 *current_freq); |
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}; |
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/** |
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* struct ti_sci_resource_desc - Description of TI SCI resource instance range. |
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* @start: Start index of the first resource range. |
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* @num: Number of resources in the first range. |
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* @start_sec: Start index of the second resource range. |
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* @num_sec: Number of resources in the second range. |
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* @res_map: Bitmap to manage the allocation of these resources. |
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*/ |
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struct ti_sci_resource_desc { |
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u16 start; |
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u16 num; |
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u16 start_sec; |
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u16 num_sec; |
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unsigned long *res_map; |
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}; |
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/** |
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* struct ti_sci_rm_core_ops - Resource management core operations |
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* @get_range: Get a range of resources belonging to ti sci host. |
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* @get_rage_from_shost: Get a range of resources belonging to |
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* specified host id. |
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* - s_host: Host processing entity to which the |
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* resources are allocated |
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* |
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* NOTE: for these functions, all the parameters are consolidated and defined |
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* as below: |
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* - handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle |
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* - dev_id: TISCI device ID. |
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* - subtype: Resource assignment subtype that is being requested |
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* from the given device. |
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* - desc: Pointer to ti_sci_resource_desc to be updated with the resource |
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* range start index and number of resources |
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*/ |
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struct ti_sci_rm_core_ops { |
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int (*get_range)(const struct ti_sci_handle *handle, u32 dev_id, |
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u8 subtype, struct ti_sci_resource_desc *desc); |
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int (*get_range_from_shost)(const struct ti_sci_handle *handle, |
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u32 dev_id, u8 subtype, u8 s_host, |
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struct ti_sci_resource_desc *desc); |
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}; |
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#define TI_SCI_RESASG_SUBTYPE_IR_OUTPUT 0 |
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#define TI_SCI_RESASG_SUBTYPE_IA_VINT 0xa |
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#define TI_SCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT 0xd |
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/** |
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* struct ti_sci_rm_irq_ops: IRQ management operations |
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* @set_irq: Set an IRQ route between the requested source |
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* and destination |
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* @set_event_map: Set an Event based peripheral irq to Interrupt |
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* Aggregator. |
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* @free_irq: Free an IRQ route between the requested source |
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* and destination. |
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* @free_event_map: Free an event based peripheral irq to Interrupt |
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* Aggregator. |
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*/ |
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struct ti_sci_rm_irq_ops { |
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int (*set_irq)(const struct ti_sci_handle *handle, u16 src_id, |
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u16 src_index, u16 dst_id, u16 dst_host_irq); |
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int (*set_event_map)(const struct ti_sci_handle *handle, u16 src_id, |
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u16 src_index, u16 ia_id, u16 vint, |
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u16 global_event, u8 vint_status_bit); |
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int (*free_irq)(const struct ti_sci_handle *handle, u16 src_id, |
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u16 src_index, u16 dst_id, u16 dst_host_irq); |
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int (*free_event_map)(const struct ti_sci_handle *handle, u16 src_id, |
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u16 src_index, u16 ia_id, u16 vint, |
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u16 global_event, u8 vint_status_bit); |
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}; |
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/* RA config.addr_lo parameter is valid for RM ring configure TI_SCI message */ |
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#define TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID BIT(0) |
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/* RA config.addr_hi parameter is valid for RM ring configure TI_SCI message */ |
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#define TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID BIT(1) |
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/* RA config.count parameter is valid for RM ring configure TI_SCI message */ |
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#define TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID BIT(2) |
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/* RA config.mode parameter is valid for RM ring configure TI_SCI message */ |
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#define TI_SCI_MSG_VALUE_RM_RING_MODE_VALID BIT(3) |
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/* RA config.size parameter is valid for RM ring configure TI_SCI message */ |
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#define TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID BIT(4) |
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/* RA config.order_id parameter is valid for RM ring configure TISCI message */ |
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#define TI_SCI_MSG_VALUE_RM_RING_ORDER_ID_VALID BIT(5) |
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/* RA config.virtid parameter is valid for RM ring configure TISCI message */ |
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#define TI_SCI_MSG_VALUE_RM_RING_VIRTID_VALID BIT(6) |
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/* RA config.asel parameter is valid for RM ring configure TISCI message */ |
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#define TI_SCI_MSG_VALUE_RM_RING_ASEL_VALID BIT(7) |
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#define TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER \ |
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(TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID | \ |
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TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID | \ |
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TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID | \ |
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TI_SCI_MSG_VALUE_RM_RING_MODE_VALID | \ |
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TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID | \ |
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TI_SCI_MSG_VALUE_RM_RING_ASEL_VALID) |
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/** |
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* struct ti_sci_msg_rm_ring_cfg - Ring configuration |
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* |
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* Parameters for Navigator Subsystem ring configuration |
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* See @ti_sci_msg_rm_ring_cfg_req |
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*/ |
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struct ti_sci_msg_rm_ring_cfg { |
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u32 valid_params; |
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u16 nav_id; |
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u16 index; |
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u32 addr_lo; |
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u32 addr_hi; |
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u32 count; |
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u8 mode; |
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u8 size; |
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u8 order_id; |
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u16 virtid; |
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u8 asel; |
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}; |
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/** |
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* struct ti_sci_rm_ringacc_ops - Ring Accelerator Management operations |
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* @set_cfg: configure the SoC Navigator Subsystem Ring Accelerator ring |
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*/ |
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struct ti_sci_rm_ringacc_ops { |
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int (*set_cfg)(const struct ti_sci_handle *handle, |
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const struct ti_sci_msg_rm_ring_cfg *params); |
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}; |
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/** |
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* struct ti_sci_rm_psil_ops - PSI-L thread operations |
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* @pair: pair PSI-L source thread to a destination thread. |
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* If the src_thread is mapped to UDMA tchan, the corresponding channel's |
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* TCHAN_THRD_ID register is updated. |
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* If the dst_thread is mapped to UDMA rchan, the corresponding channel's |
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* RCHAN_THRD_ID register is updated. |
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* @unpair: unpair PSI-L source thread from a destination thread. |
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* If the src_thread is mapped to UDMA tchan, the corresponding channel's |
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* TCHAN_THRD_ID register is cleared. |
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* If the dst_thread is mapped to UDMA rchan, the corresponding channel's |
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* RCHAN_THRD_ID register is cleared. |
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*/ |
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struct ti_sci_rm_psil_ops { |
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int (*pair)(const struct ti_sci_handle *handle, u32 nav_id, |
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u32 src_thread, u32 dst_thread); |
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int (*unpair)(const struct ti_sci_handle *handle, u32 nav_id, |
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u32 src_thread, u32 dst_thread); |
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}; |
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/* UDMAP channel types */ |
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#define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR 2 |
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#define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR_SB 3 /* RX only */ |
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#define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBRR 10 |
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#define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBVR 11 |
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#define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBRR 12 |
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#define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBVR 13 |
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#define TI_SCI_RM_UDMAP_RX_FLOW_DESC_HOST 0 |
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#define TI_SCI_RM_UDMAP_RX_FLOW_DESC_MONO 2 |
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#define TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_64_BYTES 1 |
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#define TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_128_BYTES 2 |
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#define TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_256_BYTES 3 |
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#define TI_SCI_RM_BCDMA_EXTENDED_CH_TYPE_TCHAN 0 |
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#define TI_SCI_RM_BCDMA_EXTENDED_CH_TYPE_BCHAN 1 |
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/* UDMAP TX/RX channel valid_params common declarations */ |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERR_VALID BIT(0) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_VALID BIT(1) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID BIT(2) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_VALID BIT(3) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CQ_QNUM_VALID BIT(4) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PRIORITY_VALID BIT(5) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_QOS_VALID BIT(6) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ORDER_ID_VALID BIT(7) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIORITY_VALID BIT(8) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_VALID BIT(14) |
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/** |
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* Configures a Navigator Subsystem UDMAP transmit channel |
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* |
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* Configures a Navigator Subsystem UDMAP transmit channel registers. |
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* See @ti_sci_msg_rm_udmap_tx_ch_cfg_req |
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*/ |
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struct ti_sci_msg_rm_udmap_tx_ch_cfg { |
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u32 valid_params; |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_EINFO_VALID BIT(9) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_PSWORDS_VALID BIT(10) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID BIT(11) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID BIT(12) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID BIT(13) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_TDTYPE_VALID BIT(15) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_EXTENDED_CH_TYPE_VALID BIT(16) |
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u16 nav_id; |
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u16 index; |
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u8 tx_pause_on_err; |
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u8 tx_filt_einfo; |
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u8 tx_filt_pswords; |
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u8 tx_atype; |
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u8 tx_chan_type; |
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u8 tx_supr_tdpkt; |
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u16 tx_fetch_size; |
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u8 tx_credit_count; |
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u16 txcq_qnum; |
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u8 tx_priority; |
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u8 tx_qos; |
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u8 tx_orderid; |
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u16 fdepth; |
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u8 tx_sched_priority; |
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u8 tx_burst_size; |
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u8 tx_tdtype; |
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u8 extended_ch_type; |
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}; |
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/** |
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* Configures a Navigator Subsystem UDMAP receive channel |
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* |
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* Configures a Navigator Subsystem UDMAP receive channel registers. |
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* See @ti_sci_msg_rm_udmap_rx_ch_cfg_req |
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*/ |
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struct ti_sci_msg_rm_udmap_rx_ch_cfg { |
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u32 valid_params; |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_START_VALID BIT(9) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_CNT_VALID BIT(10) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_SHORT_VALID BIT(11) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_LONG_VALID BIT(12) |
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u16 nav_id; |
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u16 index; |
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u16 rx_fetch_size; |
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u16 rxcq_qnum; |
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u8 rx_priority; |
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u8 rx_qos; |
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u8 rx_orderid; |
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u8 rx_sched_priority; |
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u16 flowid_start; |
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u16 flowid_cnt; |
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u8 rx_pause_on_err; |
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u8 rx_atype; |
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u8 rx_chan_type; |
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u8 rx_ignore_short; |
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u8 rx_ignore_long; |
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u8 rx_burst_size; |
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}; |
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/** |
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* Configures a Navigator Subsystem UDMAP receive flow |
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* |
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* Configures a Navigator Subsystem UDMAP receive flow's registers. |
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* See @tis_ci_msg_rm_udmap_flow_cfg_req |
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*/ |
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struct ti_sci_msg_rm_udmap_flow_cfg { |
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u32 valid_params; |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_EINFO_PRESENT_VALID BIT(0) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PSINFO_PRESENT_VALID BIT(1) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_ERROR_HANDLING_VALID BIT(2) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DESC_TYPE_VALID BIT(3) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SOP_OFFSET_VALID BIT(4) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_QNUM_VALID BIT(5) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_VALID BIT(6) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_VALID BIT(7) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_VALID BIT(8) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_VALID BIT(9) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_SEL_VALID BIT(10) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_SEL_VALID BIT(11) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_SEL_VALID BIT(12) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_SEL_VALID BIT(13) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ0_SZ0_QNUM_VALID BIT(14) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ1_QNUM_VALID BIT(15) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ2_QNUM_VALID BIT(16) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ3_QNUM_VALID BIT(17) |
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#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PS_LOCATION_VALID BIT(18) |
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u16 nav_id; |
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u16 flow_index; |
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u8 rx_einfo_present; |
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u8 rx_psinfo_present; |
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u8 rx_error_handling; |
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u8 rx_desc_type; |
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u16 rx_sop_offset; |
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u16 rx_dest_qnum; |
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u8 rx_src_tag_hi; |
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u8 rx_src_tag_lo; |
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u8 rx_dest_tag_hi; |
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u8 rx_dest_tag_lo; |
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u8 rx_src_tag_hi_sel; |
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u8 rx_src_tag_lo_sel; |
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u8 rx_dest_tag_hi_sel; |
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u8 rx_dest_tag_lo_sel; |
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u16 rx_fdq0_sz0_qnum; |
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u16 rx_fdq1_qnum; |
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u16 rx_fdq2_qnum; |
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u16 rx_fdq3_qnum; |
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u8 rx_ps_location; |
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}; |
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/** |
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* struct ti_sci_rm_udmap_ops - UDMA Management operations |
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* @tx_ch_cfg: configure SoC Navigator Subsystem UDMA transmit channel. |
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* @rx_ch_cfg: configure SoC Navigator Subsystem UDMA receive channel. |
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* @rx_flow_cfg1: configure SoC Navigator Subsystem UDMA receive flow. |
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*/ |
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struct ti_sci_rm_udmap_ops { |
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int (*tx_ch_cfg)(const struct ti_sci_handle *handle, |
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const struct ti_sci_msg_rm_udmap_tx_ch_cfg *params); |
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int (*rx_ch_cfg)(const struct ti_sci_handle *handle, |
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const struct ti_sci_msg_rm_udmap_rx_ch_cfg *params); |
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int (*rx_flow_cfg)(const struct ti_sci_handle *handle, |
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const struct ti_sci_msg_rm_udmap_flow_cfg *params); |
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}; |
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/** |
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* struct ti_sci_proc_ops - Processor Control operations |
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* @request: Request to control a physical processor. The requesting host |
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* should be in the processor access list |
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* @release: Relinquish a physical processor control |
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* @handover: Handover a physical processor control to another host |
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* in the permitted list |
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* @set_config: Set base configuration of a processor |
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* @set_control: Setup limited control flags in specific cases |
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* @get_status: Get the state of physical processor |
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* |
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* NOTE: The following paramteres are generic in nature for all these ops, |
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* -handle: Pointer to TI SCI handle as retrieved by *ti_sci_get_handle |
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* -pid: Processor ID |
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* -hid: Host ID |
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*/ |
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struct ti_sci_proc_ops { |
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int (*request)(const struct ti_sci_handle *handle, u8 pid); |
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int (*release)(const struct ti_sci_handle *handle, u8 pid); |
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int (*handover)(const struct ti_sci_handle *handle, u8 pid, u8 hid); |
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int (*set_config)(const struct ti_sci_handle *handle, u8 pid, |
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u64 boot_vector, u32 cfg_set, u32 cfg_clr); |
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int (*set_control)(const struct ti_sci_handle *handle, u8 pid, |
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u32 ctrl_set, u32 ctrl_clr); |
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int (*get_status)(const struct ti_sci_handle *handle, u8 pid, |
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u64 *boot_vector, u32 *cfg_flags, u32 *ctrl_flags, |
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u32 *status_flags); |
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}; |
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/** |
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* struct ti_sci_ops - Function support for TI SCI |
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* @dev_ops: Device specific operations |
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* @clk_ops: Clock specific operations |
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* @rm_core_ops: Resource management core operations. |
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* @rm_irq_ops: IRQ management specific operations |
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* @proc_ops: Processor Control specific operations |
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*/ |
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struct ti_sci_ops { |
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struct ti_sci_core_ops core_ops; |
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struct ti_sci_dev_ops dev_ops; |
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struct ti_sci_clk_ops clk_ops; |
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struct ti_sci_rm_core_ops rm_core_ops; |
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struct ti_sci_rm_irq_ops rm_irq_ops; |
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struct ti_sci_rm_ringacc_ops rm_ring_ops; |
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struct ti_sci_rm_psil_ops rm_psil_ops; |
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struct ti_sci_rm_udmap_ops rm_udmap_ops; |
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struct ti_sci_proc_ops proc_ops; |
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}; |
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/** |
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* struct ti_sci_handle - Handle returned to TI SCI clients for usage. |
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* @version: structure containing version information |
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* @ops: operations that are made available to TI SCI clients |
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*/ |
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struct ti_sci_handle { |
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struct ti_sci_version_info version; |
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struct ti_sci_ops ops; |
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}; |
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#define TI_SCI_RESOURCE_NULL 0xffff |
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/** |
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* struct ti_sci_resource - Structure representing a resource assigned |
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* to a device. |
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* @sets: Number of sets available from this resource type |
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* @lock: Lock to guard the res map in each set. |
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* @desc: Array of resource descriptors. |
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*/ |
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struct ti_sci_resource { |
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u16 sets; |
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raw_spinlock_t lock; |
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struct ti_sci_resource_desc *desc; |
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}; |
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#if IS_ENABLED(CONFIG_TI_SCI_PROTOCOL) |
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const struct ti_sci_handle *ti_sci_get_handle(struct device *dev); |
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int ti_sci_put_handle(const struct ti_sci_handle *handle); |
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const struct ti_sci_handle *devm_ti_sci_get_handle(struct device *dev); |
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const struct ti_sci_handle *ti_sci_get_by_phandle(struct device_node *np, |
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const char *property); |
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const struct ti_sci_handle *devm_ti_sci_get_by_phandle(struct device *dev, |
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const char *property); |
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u16 ti_sci_get_free_resource(struct ti_sci_resource *res); |
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void ti_sci_release_resource(struct ti_sci_resource *res, u16 id); |
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u32 ti_sci_get_num_resources(struct ti_sci_resource *res); |
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struct ti_sci_resource * |
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devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle, |
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struct device *dev, u32 dev_id, char *of_prop); |
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struct ti_sci_resource * |
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devm_ti_sci_get_resource(const struct ti_sci_handle *handle, struct device *dev, |
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u32 dev_id, u32 sub_type); |
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#else /* CONFIG_TI_SCI_PROTOCOL */ |
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static inline const struct ti_sci_handle *ti_sci_get_handle(struct device *dev) |
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{ |
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return ERR_PTR(-EINVAL); |
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} |
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static inline int ti_sci_put_handle(const struct ti_sci_handle *handle) |
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{ |
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return -EINVAL; |
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} |
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static inline |
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const struct ti_sci_handle *devm_ti_sci_get_handle(struct device *dev) |
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{ |
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return ERR_PTR(-EINVAL); |
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} |
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static inline |
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const struct ti_sci_handle *ti_sci_get_by_phandle(struct device_node *np, |
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const char *property) |
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{ |
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return ERR_PTR(-EINVAL); |
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} |
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static inline |
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const struct ti_sci_handle *devm_ti_sci_get_by_phandle(struct device *dev, |
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const char *property) |
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{ |
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return ERR_PTR(-EINVAL); |
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} |
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static inline u16 ti_sci_get_free_resource(struct ti_sci_resource *res) |
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{ |
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return TI_SCI_RESOURCE_NULL; |
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} |
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static inline void ti_sci_release_resource(struct ti_sci_resource *res, u16 id) |
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{ |
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} |
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static inline u32 ti_sci_get_num_resources(struct ti_sci_resource *res) |
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{ |
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return 0; |
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} |
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static inline struct ti_sci_resource * |
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devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle, |
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struct device *dev, u32 dev_id, char *of_prop) |
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{ |
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return ERR_PTR(-EINVAL); |
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} |
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static inline struct ti_sci_resource * |
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devm_ti_sci_get_resource(const struct ti_sci_handle *handle, struct device *dev, |
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u32 dev_id, u32 sub_type); |
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{ |
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return ERR_PTR(-EINVAL); |
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} |
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#endif /* CONFIG_TI_SCI_PROTOCOL */ |
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#endif /* __TISCI_PROTOCOL_H */
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