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69 lines
1.6 KiB
69 lines
1.6 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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#ifndef __ASM_SH_SE7724_H |
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#define __ASM_SH_SE7724_H |
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/* |
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* linux/include/asm-sh/se7724.h |
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* |
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* Copyright (C) 2009 Renesas Solutions Corp. |
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* |
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* Kuninori Morimoto <[email protected]> |
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* |
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* Hitachi UL SolutionEngine 7724 Support. |
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* |
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* Based on se7722.h |
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* Copyright (C) 2007 Nobuhiro Iwamatsu |
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*/ |
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#include <linux/sh_intc.h> |
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#include <asm/addrspace.h> |
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/* SH Eth */ |
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#define SH_ETH_ADDR (0xA4600000) |
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#define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0) |
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#define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8) |
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#define PA_LED (0xba203000) /* 8bit LED */ |
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#define IRQ_MODE (0xba200010) |
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#define IRQ0_SR (0xba200014) |
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#define IRQ1_SR (0xba200018) |
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#define IRQ2_SR (0xba20001c) |
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#define IRQ0_MR (0xba200020) |
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#define IRQ1_MR (0xba200024) |
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#define IRQ2_MR (0xba200028) |
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/* IRQ */ |
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#define IRQ0_IRQ evt2irq(0x600) |
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#define IRQ1_IRQ evt2irq(0x620) |
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#define IRQ2_IRQ evt2irq(0x640) |
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/* Bits in IRQ012 registers */ |
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#define SE7724_FPGA_IRQ_BASE 220 |
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/* IRQ0 */ |
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#define IRQ0_BASE SE7724_FPGA_IRQ_BASE |
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#define IRQ0_KEY (IRQ0_BASE + 12) |
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#define IRQ0_RMII (IRQ0_BASE + 13) |
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#define IRQ0_SMC (IRQ0_BASE + 14) |
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#define IRQ0_MASK 0x7fff |
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#define IRQ0_END IRQ0_SMC |
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/* IRQ1 */ |
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#define IRQ1_BASE (IRQ0_END + 1) |
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#define IRQ1_TS (IRQ1_BASE + 0) |
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#define IRQ1_MASK 0x0001 |
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#define IRQ1_END IRQ1_TS |
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/* IRQ2 */ |
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#define IRQ2_BASE (IRQ1_END + 1) |
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#define IRQ2_USB0 (IRQ1_BASE + 0) |
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#define IRQ2_USB1 (IRQ1_BASE + 1) |
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#define IRQ2_MASK 0x0003 |
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#define IRQ2_END IRQ2_USB1 |
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#define SE7724_FPGA_IRQ_NR (IRQ2_END - IRQ0_BASE) |
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/* arch/sh/boards/se/7724/irq.c */ |
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void init_se7724_IRQ(void); |
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#define __IO_PREFIX se7724 |
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#include <asm/io_generic.h> |
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#endif /* __ASM_SH_SE7724_H */
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