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718 lines
17 KiB
718 lines
17 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright 2006 Jake Moilanen <[email protected]>, IBM Corp. |
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* Copyright 2006-2007 Michael Ellerman, IBM Corp. |
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*/ |
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#include <linux/crash_dump.h> |
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#include <linux/device.h> |
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#include <linux/irq.h> |
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#include <linux/msi.h> |
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#include <asm/rtas.h> |
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#include <asm/hw_irq.h> |
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#include <asm/ppc-pci.h> |
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#include <asm/machdep.h> |
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#include <asm/xive.h> |
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#include "pseries.h" |
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static int query_token, change_token; |
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#define RTAS_QUERY_FN 0 |
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#define RTAS_CHANGE_FN 1 |
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#define RTAS_RESET_FN 2 |
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#define RTAS_CHANGE_MSI_FN 3 |
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#define RTAS_CHANGE_MSIX_FN 4 |
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#define RTAS_CHANGE_32MSI_FN 5 |
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/* RTAS Helpers */ |
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static int rtas_change_msi(struct pci_dn *pdn, u32 func, u32 num_irqs) |
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{ |
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u32 addr, seq_num, rtas_ret[3]; |
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unsigned long buid; |
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int rc; |
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addr = rtas_config_addr(pdn->busno, pdn->devfn, 0); |
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buid = pdn->phb->buid; |
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seq_num = 1; |
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do { |
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if (func == RTAS_CHANGE_MSI_FN || func == RTAS_CHANGE_MSIX_FN || |
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func == RTAS_CHANGE_32MSI_FN) |
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rc = rtas_call(change_token, 6, 4, rtas_ret, addr, |
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BUID_HI(buid), BUID_LO(buid), |
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func, num_irqs, seq_num); |
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else |
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rc = rtas_call(change_token, 6, 3, rtas_ret, addr, |
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BUID_HI(buid), BUID_LO(buid), |
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func, num_irqs, seq_num); |
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seq_num = rtas_ret[1]; |
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} while (rtas_busy_delay(rc)); |
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/* |
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* If the RTAS call succeeded, return the number of irqs allocated. |
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* If not, make sure we return a negative error code. |
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*/ |
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if (rc == 0) |
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rc = rtas_ret[0]; |
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else if (rc > 0) |
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rc = -rc; |
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pr_debug("rtas_msi: ibm,change_msi(func=%d,num=%d), got %d rc = %d\n", |
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func, num_irqs, rtas_ret[0], rc); |
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return rc; |
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} |
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static void rtas_disable_msi(struct pci_dev *pdev) |
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{ |
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struct pci_dn *pdn; |
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pdn = pci_get_pdn(pdev); |
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if (!pdn) |
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return; |
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/* |
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* disabling MSI with the explicit interface also disables MSI-X |
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*/ |
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if (rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, 0) != 0) { |
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/* |
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* may have failed because explicit interface is not |
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* present |
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*/ |
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if (rtas_change_msi(pdn, RTAS_CHANGE_FN, 0) != 0) { |
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pr_debug("rtas_msi: Setting MSIs to 0 failed!\n"); |
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} |
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} |
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} |
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static int rtas_query_irq_number(struct pci_dn *pdn, int offset) |
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{ |
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u32 addr, rtas_ret[2]; |
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unsigned long buid; |
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int rc; |
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addr = rtas_config_addr(pdn->busno, pdn->devfn, 0); |
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buid = pdn->phb->buid; |
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do { |
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rc = rtas_call(query_token, 4, 3, rtas_ret, addr, |
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BUID_HI(buid), BUID_LO(buid), offset); |
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} while (rtas_busy_delay(rc)); |
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if (rc) { |
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pr_debug("rtas_msi: error (%d) querying source number\n", rc); |
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return rc; |
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} |
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return rtas_ret[0]; |
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} |
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static int check_req(struct pci_dev *pdev, int nvec, char *prop_name) |
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{ |
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struct device_node *dn; |
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const __be32 *p; |
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u32 req_msi; |
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dn = pci_device_to_OF_node(pdev); |
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p = of_get_property(dn, prop_name, NULL); |
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if (!p) { |
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pr_debug("rtas_msi: No %s on %pOF\n", prop_name, dn); |
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return -ENOENT; |
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} |
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req_msi = be32_to_cpup(p); |
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if (req_msi < nvec) { |
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pr_debug("rtas_msi: %s requests < %d MSIs\n", prop_name, nvec); |
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if (req_msi == 0) /* Be paranoid */ |
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return -ENOSPC; |
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return req_msi; |
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} |
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return 0; |
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} |
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static int check_req_msi(struct pci_dev *pdev, int nvec) |
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{ |
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return check_req(pdev, nvec, "ibm,req#msi"); |
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} |
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static int check_req_msix(struct pci_dev *pdev, int nvec) |
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{ |
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return check_req(pdev, nvec, "ibm,req#msi-x"); |
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} |
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/* Quota calculation */ |
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static struct device_node *__find_pe_total_msi(struct device_node *node, int *total) |
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{ |
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struct device_node *dn; |
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const __be32 *p; |
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dn = of_node_get(node); |
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while (dn) { |
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p = of_get_property(dn, "ibm,pe-total-#msi", NULL); |
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if (p) { |
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pr_debug("rtas_msi: found prop on dn %pOF\n", |
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dn); |
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*total = be32_to_cpup(p); |
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return dn; |
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} |
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dn = of_get_next_parent(dn); |
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} |
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return NULL; |
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} |
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static struct device_node *find_pe_total_msi(struct pci_dev *dev, int *total) |
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{ |
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return __find_pe_total_msi(pci_device_to_OF_node(dev), total); |
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} |
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static struct device_node *find_pe_dn(struct pci_dev *dev, int *total) |
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{ |
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struct device_node *dn; |
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struct eeh_dev *edev; |
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/* Found our PE and assume 8 at that point. */ |
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dn = pci_device_to_OF_node(dev); |
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if (!dn) |
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return NULL; |
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/* Get the top level device in the PE */ |
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edev = pdn_to_eeh_dev(PCI_DN(dn)); |
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if (edev->pe) |
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edev = list_first_entry(&edev->pe->edevs, struct eeh_dev, |
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entry); |
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dn = pci_device_to_OF_node(edev->pdev); |
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if (!dn) |
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return NULL; |
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/* We actually want the parent */ |
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dn = of_get_parent(dn); |
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if (!dn) |
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return NULL; |
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/* Hardcode of 8 for old firmwares */ |
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*total = 8; |
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pr_debug("rtas_msi: using PE dn %pOF\n", dn); |
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return dn; |
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} |
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struct msi_counts { |
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struct device_node *requestor; |
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int num_devices; |
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int request; |
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int quota; |
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int spare; |
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int over_quota; |
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}; |
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static void *count_non_bridge_devices(struct device_node *dn, void *data) |
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{ |
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struct msi_counts *counts = data; |
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const __be32 *p; |
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u32 class; |
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pr_debug("rtas_msi: counting %pOF\n", dn); |
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p = of_get_property(dn, "class-code", NULL); |
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class = p ? be32_to_cpup(p) : 0; |
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if ((class >> 8) != PCI_CLASS_BRIDGE_PCI) |
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counts->num_devices++; |
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return NULL; |
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} |
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static void *count_spare_msis(struct device_node *dn, void *data) |
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{ |
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struct msi_counts *counts = data; |
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const __be32 *p; |
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int req; |
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if (dn == counts->requestor) |
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req = counts->request; |
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else { |
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/* We don't know if a driver will try to use MSI or MSI-X, |
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* so we just have to punt and use the larger of the two. */ |
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req = 0; |
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p = of_get_property(dn, "ibm,req#msi", NULL); |
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if (p) |
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req = be32_to_cpup(p); |
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p = of_get_property(dn, "ibm,req#msi-x", NULL); |
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if (p) |
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req = max(req, (int)be32_to_cpup(p)); |
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} |
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if (req < counts->quota) |
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counts->spare += counts->quota - req; |
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else if (req > counts->quota) |
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counts->over_quota++; |
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return NULL; |
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} |
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static int msi_quota_for_device(struct pci_dev *dev, int request) |
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{ |
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struct device_node *pe_dn; |
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struct msi_counts counts; |
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int total; |
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pr_debug("rtas_msi: calc quota for %s, request %d\n", pci_name(dev), |
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request); |
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pe_dn = find_pe_total_msi(dev, &total); |
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if (!pe_dn) |
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pe_dn = find_pe_dn(dev, &total); |
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if (!pe_dn) { |
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pr_err("rtas_msi: couldn't find PE for %s\n", pci_name(dev)); |
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goto out; |
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} |
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pr_debug("rtas_msi: found PE %pOF\n", pe_dn); |
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memset(&counts, 0, sizeof(struct msi_counts)); |
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/* Work out how many devices we have below this PE */ |
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pci_traverse_device_nodes(pe_dn, count_non_bridge_devices, &counts); |
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if (counts.num_devices == 0) { |
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pr_err("rtas_msi: found 0 devices under PE for %s\n", |
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pci_name(dev)); |
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goto out; |
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} |
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counts.quota = total / counts.num_devices; |
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if (request <= counts.quota) |
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goto out; |
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/* else, we have some more calculating to do */ |
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counts.requestor = pci_device_to_OF_node(dev); |
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counts.request = request; |
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pci_traverse_device_nodes(pe_dn, count_spare_msis, &counts); |
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/* If the quota isn't an integer multiple of the total, we can |
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* use the remainder as spare MSIs for anyone that wants them. */ |
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counts.spare += total % counts.num_devices; |
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/* Divide any spare by the number of over-quota requestors */ |
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if (counts.over_quota) |
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counts.quota += counts.spare / counts.over_quota; |
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/* And finally clamp the request to the possibly adjusted quota */ |
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request = min(counts.quota, request); |
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pr_debug("rtas_msi: request clamped to quota %d\n", request); |
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out: |
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of_node_put(pe_dn); |
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return request; |
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} |
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static int check_msix_entries(struct pci_dev *pdev) |
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{ |
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struct msi_desc *entry; |
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int expected; |
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/* There's no way for us to express to firmware that we want |
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* a discontiguous, or non-zero based, range of MSI-X entries. |
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* So we must reject such requests. */ |
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expected = 0; |
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for_each_pci_msi_entry(entry, pdev) { |
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if (entry->msi_attrib.entry_nr != expected) { |
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pr_debug("rtas_msi: bad MSI-X entries.\n"); |
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return -EINVAL; |
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} |
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expected++; |
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} |
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return 0; |
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} |
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static void rtas_hack_32bit_msi_gen2(struct pci_dev *pdev) |
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{ |
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u32 addr_hi, addr_lo; |
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/* |
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* We should only get in here for IODA1 configs. This is based on the |
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* fact that we using RTAS for MSIs, we don't have the 32 bit MSI RTAS |
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* support, and we are in a PCIe Gen2 slot. |
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*/ |
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dev_info(&pdev->dev, |
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"rtas_msi: No 32 bit MSI firmware support, forcing 32 bit MSI\n"); |
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pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, &addr_hi); |
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addr_lo = 0xffff0000 | ((addr_hi >> (48 - 32)) << 4); |
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pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, addr_lo); |
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pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, 0); |
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} |
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static int rtas_prepare_msi_irqs(struct pci_dev *pdev, int nvec_in, int type, |
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msi_alloc_info_t *arg) |
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{ |
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struct pci_dn *pdn; |
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int quota, rc; |
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int nvec = nvec_in; |
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int use_32bit_msi_hack = 0; |
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if (type == PCI_CAP_ID_MSIX) |
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rc = check_req_msix(pdev, nvec); |
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else |
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rc = check_req_msi(pdev, nvec); |
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if (rc) |
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return rc; |
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quota = msi_quota_for_device(pdev, nvec); |
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if (quota && quota < nvec) |
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return quota; |
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if (type == PCI_CAP_ID_MSIX && check_msix_entries(pdev)) |
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return -EINVAL; |
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/* |
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* Firmware currently refuse any non power of two allocation |
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* so we round up if the quota will allow it. |
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*/ |
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if (type == PCI_CAP_ID_MSIX) { |
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int m = roundup_pow_of_two(nvec); |
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quota = msi_quota_for_device(pdev, m); |
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if (quota >= m) |
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nvec = m; |
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} |
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pdn = pci_get_pdn(pdev); |
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/* |
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* Try the new more explicit firmware interface, if that fails fall |
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* back to the old interface. The old interface is known to never |
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* return MSI-Xs. |
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*/ |
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again: |
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if (type == PCI_CAP_ID_MSI) { |
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if (pdev->no_64bit_msi) { |
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rc = rtas_change_msi(pdn, RTAS_CHANGE_32MSI_FN, nvec); |
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if (rc < 0) { |
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/* |
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* We only want to run the 32 bit MSI hack below if |
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* the max bus speed is Gen2 speed |
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*/ |
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if (pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT) |
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return rc; |
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use_32bit_msi_hack = 1; |
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} |
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} else |
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rc = -1; |
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if (rc < 0) |
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rc = rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, nvec); |
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if (rc < 0) { |
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pr_debug("rtas_msi: trying the old firmware call.\n"); |
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rc = rtas_change_msi(pdn, RTAS_CHANGE_FN, nvec); |
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} |
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if (use_32bit_msi_hack && rc > 0) |
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rtas_hack_32bit_msi_gen2(pdev); |
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} else |
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rc = rtas_change_msi(pdn, RTAS_CHANGE_MSIX_FN, nvec); |
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if (rc != nvec) { |
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if (nvec != nvec_in) { |
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nvec = nvec_in; |
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goto again; |
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} |
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pr_debug("rtas_msi: rtas_change_msi() failed\n"); |
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return rc; |
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} |
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return 0; |
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} |
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static int pseries_msi_ops_prepare(struct irq_domain *domain, struct device *dev, |
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int nvec, msi_alloc_info_t *arg) |
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{ |
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struct pci_dev *pdev = to_pci_dev(dev); |
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struct msi_desc *desc = first_pci_msi_entry(pdev); |
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int type = desc->msi_attrib.is_msix ? PCI_CAP_ID_MSIX : PCI_CAP_ID_MSI; |
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return rtas_prepare_msi_irqs(pdev, nvec, type, arg); |
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} |
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/* |
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* ->msi_free() is called before irq_domain_free_irqs_top() when the |
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* handler data is still available. Use that to clear the XIVE |
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* controller data. |
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*/ |
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static void pseries_msi_ops_msi_free(struct irq_domain *domain, |
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struct msi_domain_info *info, |
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unsigned int irq) |
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{ |
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if (xive_enabled()) |
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xive_irq_free_data(irq); |
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} |
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/* |
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* RTAS can not disable one MSI at a time. It's all or nothing. Do it |
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* at the end after all IRQs have been freed. |
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*/ |
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static void pseries_msi_domain_free_irqs(struct irq_domain *domain, |
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struct device *dev) |
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{ |
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if (WARN_ON_ONCE(!dev_is_pci(dev))) |
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return; |
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__msi_domain_free_irqs(domain, dev); |
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rtas_disable_msi(to_pci_dev(dev)); |
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} |
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static struct msi_domain_ops pseries_pci_msi_domain_ops = { |
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.msi_prepare = pseries_msi_ops_prepare, |
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.msi_free = pseries_msi_ops_msi_free, |
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.domain_free_irqs = pseries_msi_domain_free_irqs, |
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}; |
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static void pseries_msi_shutdown(struct irq_data *d) |
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{ |
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d = d->parent_data; |
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if (d->chip->irq_shutdown) |
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d->chip->irq_shutdown(d); |
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} |
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static void pseries_msi_mask(struct irq_data *d) |
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{ |
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pci_msi_mask_irq(d); |
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irq_chip_mask_parent(d); |
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} |
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static void pseries_msi_unmask(struct irq_data *d) |
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{ |
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pci_msi_unmask_irq(d); |
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irq_chip_unmask_parent(d); |
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} |
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static void pseries_msi_write_msg(struct irq_data *data, struct msi_msg *msg) |
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{ |
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struct msi_desc *entry = irq_data_get_msi_desc(data); |
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|
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/* |
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* Do not update the MSIx vector table. It's not strictly necessary |
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* because the table is initialized by the underlying hypervisor, PowerVM |
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* or QEMU/KVM. However, if the MSIx vector entry is cleared, any further |
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* activation will fail. This can happen in some drivers (eg. IPR) which |
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* deactivate an IRQ used for testing MSI support. |
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*/ |
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entry->msg = *msg; |
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} |
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static struct irq_chip pseries_pci_msi_irq_chip = { |
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.name = "pSeries-PCI-MSI", |
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.irq_shutdown = pseries_msi_shutdown, |
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.irq_mask = pseries_msi_mask, |
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.irq_unmask = pseries_msi_unmask, |
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.irq_eoi = irq_chip_eoi_parent, |
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.irq_write_msi_msg = pseries_msi_write_msg, |
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}; |
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static struct msi_domain_info pseries_msi_domain_info = { |
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | |
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MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX), |
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.ops = &pseries_pci_msi_domain_ops, |
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.chip = &pseries_pci_msi_irq_chip, |
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}; |
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static void pseries_msi_compose_msg(struct irq_data *data, struct msi_msg *msg) |
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{ |
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__pci_read_msi_msg(irq_data_get_msi_desc(data), msg); |
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} |
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static struct irq_chip pseries_msi_irq_chip = { |
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.name = "pSeries-MSI", |
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.irq_shutdown = pseries_msi_shutdown, |
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.irq_mask = irq_chip_mask_parent, |
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.irq_unmask = irq_chip_unmask_parent, |
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.irq_eoi = irq_chip_eoi_parent, |
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.irq_set_affinity = irq_chip_set_affinity_parent, |
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.irq_compose_msi_msg = pseries_msi_compose_msg, |
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}; |
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static int pseries_irq_parent_domain_alloc(struct irq_domain *domain, unsigned int virq, |
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irq_hw_number_t hwirq) |
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{ |
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struct irq_fwspec parent_fwspec; |
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int ret; |
|
|
|
parent_fwspec.fwnode = domain->parent->fwnode; |
|
parent_fwspec.param_count = 2; |
|
parent_fwspec.param[0] = hwirq; |
|
parent_fwspec.param[1] = IRQ_TYPE_EDGE_RISING; |
|
|
|
ret = irq_domain_alloc_irqs_parent(domain, virq, 1, &parent_fwspec); |
|
if (ret) |
|
return ret; |
|
|
|
return 0; |
|
} |
|
|
|
static int pseries_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, |
|
unsigned int nr_irqs, void *arg) |
|
{ |
|
struct pci_controller *phb = domain->host_data; |
|
msi_alloc_info_t *info = arg; |
|
struct msi_desc *desc = info->desc; |
|
struct pci_dev *pdev = msi_desc_to_pci_dev(desc); |
|
int hwirq; |
|
int i, ret; |
|
|
|
hwirq = rtas_query_irq_number(pci_get_pdn(pdev), desc->msi_attrib.entry_nr); |
|
if (hwirq < 0) { |
|
dev_err(&pdev->dev, "Failed to query HW IRQ: %d\n", hwirq); |
|
return hwirq; |
|
} |
|
|
|
dev_dbg(&pdev->dev, "%s bridge %pOF %d/%x #%d\n", __func__, |
|
phb->dn, virq, hwirq, nr_irqs); |
|
|
|
for (i = 0; i < nr_irqs; i++) { |
|
ret = pseries_irq_parent_domain_alloc(domain, virq + i, hwirq + i); |
|
if (ret) |
|
goto out; |
|
|
|
irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, |
|
&pseries_msi_irq_chip, domain->host_data); |
|
} |
|
|
|
return 0; |
|
|
|
out: |
|
/* TODO: handle RTAS cleanup in ->msi_finish() ? */ |
|
irq_domain_free_irqs_parent(domain, virq, i - 1); |
|
return ret; |
|
} |
|
|
|
static void pseries_irq_domain_free(struct irq_domain *domain, unsigned int virq, |
|
unsigned int nr_irqs) |
|
{ |
|
struct irq_data *d = irq_domain_get_irq_data(domain, virq); |
|
struct pci_controller *phb = irq_data_get_irq_chip_data(d); |
|
|
|
pr_debug("%s bridge %pOF %d #%d\n", __func__, phb->dn, virq, nr_irqs); |
|
|
|
/* XIVE domain data is cleared through ->msi_free() */ |
|
} |
|
|
|
static const struct irq_domain_ops pseries_irq_domain_ops = { |
|
.alloc = pseries_irq_domain_alloc, |
|
.free = pseries_irq_domain_free, |
|
}; |
|
|
|
static int __pseries_msi_allocate_domains(struct pci_controller *phb, |
|
unsigned int count) |
|
{ |
|
struct irq_domain *parent = irq_get_default_host(); |
|
|
|
phb->fwnode = irq_domain_alloc_named_id_fwnode("pSeries-MSI", |
|
phb->global_number); |
|
if (!phb->fwnode) |
|
return -ENOMEM; |
|
|
|
phb->dev_domain = irq_domain_create_hierarchy(parent, 0, count, |
|
phb->fwnode, |
|
&pseries_irq_domain_ops, phb); |
|
if (!phb->dev_domain) { |
|
pr_err("PCI: failed to create IRQ domain bridge %pOF (domain %d)\n", |
|
phb->dn, phb->global_number); |
|
irq_domain_free_fwnode(phb->fwnode); |
|
return -ENOMEM; |
|
} |
|
|
|
phb->msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(phb->dn), |
|
&pseries_msi_domain_info, |
|
phb->dev_domain); |
|
if (!phb->msi_domain) { |
|
pr_err("PCI: failed to create MSI IRQ domain bridge %pOF (domain %d)\n", |
|
phb->dn, phb->global_number); |
|
irq_domain_free_fwnode(phb->fwnode); |
|
irq_domain_remove(phb->dev_domain); |
|
return -ENOMEM; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
int pseries_msi_allocate_domains(struct pci_controller *phb) |
|
{ |
|
int count; |
|
|
|
if (!__find_pe_total_msi(phb->dn, &count)) { |
|
pr_err("PCI: failed to find MSIs for bridge %pOF (domain %d)\n", |
|
phb->dn, phb->global_number); |
|
return -ENOSPC; |
|
} |
|
|
|
return __pseries_msi_allocate_domains(phb, count); |
|
} |
|
|
|
void pseries_msi_free_domains(struct pci_controller *phb) |
|
{ |
|
if (phb->msi_domain) |
|
irq_domain_remove(phb->msi_domain); |
|
if (phb->dev_domain) |
|
irq_domain_remove(phb->dev_domain); |
|
if (phb->fwnode) |
|
irq_domain_free_fwnode(phb->fwnode); |
|
} |
|
|
|
static void rtas_msi_pci_irq_fixup(struct pci_dev *pdev) |
|
{ |
|
/* No LSI -> leave MSIs (if any) configured */ |
|
if (!pdev->irq) { |
|
dev_dbg(&pdev->dev, "rtas_msi: no LSI, nothing to do.\n"); |
|
return; |
|
} |
|
|
|
/* No MSI -> MSIs can't have been assigned by fw, leave LSI */ |
|
if (check_req_msi(pdev, 1) && check_req_msix(pdev, 1)) { |
|
dev_dbg(&pdev->dev, "rtas_msi: no req#msi/x, nothing to do.\n"); |
|
return; |
|
} |
|
|
|
dev_dbg(&pdev->dev, "rtas_msi: disabling existing MSI.\n"); |
|
rtas_disable_msi(pdev); |
|
} |
|
|
|
static int rtas_msi_init(void) |
|
{ |
|
query_token = rtas_token("ibm,query-interrupt-source-number"); |
|
change_token = rtas_token("ibm,change-msi"); |
|
|
|
if ((query_token == RTAS_UNKNOWN_SERVICE) || |
|
(change_token == RTAS_UNKNOWN_SERVICE)) { |
|
pr_debug("rtas_msi: no RTAS tokens, no MSI support.\n"); |
|
return -1; |
|
} |
|
|
|
pr_debug("rtas_msi: Registering RTAS MSI callbacks.\n"); |
|
|
|
WARN_ON(ppc_md.pci_irq_fixup); |
|
ppc_md.pci_irq_fixup = rtas_msi_pci_irq_fixup; |
|
|
|
return 0; |
|
} |
|
machine_arch_initcall(pseries, rtas_msi_init);
|
|
|