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65 lines
1.7 KiB
65 lines
1.7 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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#ifndef __ASM_GENERIC_MMIOWB_H |
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#define __ASM_GENERIC_MMIOWB_H |
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/* |
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* Generic implementation of mmiowb() tracking for spinlocks. |
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* |
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* If your architecture doesn't ensure that writes to an I/O peripheral |
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* within two spinlocked sections on two different CPUs are seen by the |
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* peripheral in the order corresponding to the lock handover, then you |
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* need to follow these FIVE easy steps: |
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* |
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* 1. Implement mmiowb() (and arch_mmiowb_state() if you're fancy) |
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* in asm/mmiowb.h, then #include this file |
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* 2. Ensure your I/O write accessors call mmiowb_set_pending() |
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* 3. Select ARCH_HAS_MMIOWB |
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* 4. Untangle the resulting mess of header files |
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* 5. Complain to your architects |
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*/ |
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#ifdef CONFIG_MMIOWB |
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#include <linux/compiler.h> |
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#include <asm-generic/mmiowb_types.h> |
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#ifndef arch_mmiowb_state |
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#include <asm/percpu.h> |
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#include <asm/smp.h> |
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DECLARE_PER_CPU(struct mmiowb_state, __mmiowb_state); |
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#define __mmiowb_state() raw_cpu_ptr(&__mmiowb_state) |
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#else |
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#define __mmiowb_state() arch_mmiowb_state() |
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#endif /* arch_mmiowb_state */ |
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static inline void mmiowb_set_pending(void) |
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{ |
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struct mmiowb_state *ms = __mmiowb_state(); |
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if (likely(ms->nesting_count)) |
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ms->mmiowb_pending = ms->nesting_count; |
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} |
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static inline void mmiowb_spin_lock(void) |
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{ |
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struct mmiowb_state *ms = __mmiowb_state(); |
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ms->nesting_count++; |
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} |
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static inline void mmiowb_spin_unlock(void) |
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{ |
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struct mmiowb_state *ms = __mmiowb_state(); |
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if (unlikely(ms->mmiowb_pending)) { |
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ms->mmiowb_pending = 0; |
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mmiowb(); |
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} |
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ms->nesting_count--; |
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} |
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#else |
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#define mmiowb_set_pending() do { } while (0) |
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#define mmiowb_spin_lock() do { } while (0) |
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#define mmiowb_spin_unlock() do { } while (0) |
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#endif /* CONFIG_MMIOWB */ |
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#endif /* __ASM_GENERIC_MMIOWB_H */
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